core.c 21 KB

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  1. /*
  2. * ACPI implementation
  3. *
  4. * Copyright (c) 2006 Fabrice Bellard
  5. *
  6. * This library is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU Lesser General Public
  8. * License version 2 as published by the Free Software Foundation.
  9. *
  10. * This library is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  13. * Lesser General Public License for more details.
  14. *
  15. * You should have received a copy of the GNU Lesser General Public
  16. * License along with this library; if not, see <http://www.gnu.org/licenses/>
  17. *
  18. * Contributions after 2012-01-13 are licensed under the terms of the
  19. * GNU GPL, version 2 or (at your option) any later version.
  20. */
  21. #include "qemu/osdep.h"
  22. #include "sysemu/sysemu.h"
  23. #include "hw/hw.h"
  24. #include "hw/i386/pc.h"
  25. #include "hw/acpi/acpi.h"
  26. #include "hw/nvram/fw_cfg.h"
  27. #include "qemu/config-file.h"
  28. #include "qapi/opts-visitor.h"
  29. #include "qapi-visit.h"
  30. #include "qapi-event.h"
  31. struct acpi_table_header {
  32. uint16_t _length; /* our length, not actual part of the hdr */
  33. /* allows easier parsing for fw_cfg clients */
  34. char sig[4]; /* ACPI signature (4 ASCII characters) */
  35. uint32_t length; /* Length of table, in bytes, including header */
  36. uint8_t revision; /* ACPI Specification minor version # */
  37. uint8_t checksum; /* To make sum of entire table == 0 */
  38. char oem_id[6]; /* OEM identification */
  39. char oem_table_id[8]; /* OEM table identification */
  40. uint32_t oem_revision; /* OEM revision number */
  41. char asl_compiler_id[4]; /* ASL compiler vendor ID */
  42. uint32_t asl_compiler_revision; /* ASL compiler revision number */
  43. } QEMU_PACKED;
  44. #define ACPI_TABLE_HDR_SIZE sizeof(struct acpi_table_header)
  45. #define ACPI_TABLE_PFX_SIZE sizeof(uint16_t) /* size of the extra prefix */
  46. static const char unsigned dfl_hdr[ACPI_TABLE_HDR_SIZE - ACPI_TABLE_PFX_SIZE] =
  47. "QEMU\0\0\0\0\1\0" /* sig (4), len(4), revno (1), csum (1) */
  48. "QEMUQEQEMUQEMU\1\0\0\0" /* OEM id (6), table (8), revno (4) */
  49. "QEMU\1\0\0\0" /* ASL compiler ID (4), version (4) */
  50. ;
  51. char unsigned *acpi_tables;
  52. size_t acpi_tables_len;
  53. static QemuOptsList qemu_acpi_opts = {
  54. .name = "acpi",
  55. .implied_opt_name = "data",
  56. .head = QTAILQ_HEAD_INITIALIZER(qemu_acpi_opts.head),
  57. .desc = { { 0 } } /* validated with OptsVisitor */
  58. };
  59. static void acpi_register_config(void)
  60. {
  61. qemu_add_opts(&qemu_acpi_opts);
  62. }
  63. opts_init(acpi_register_config);
  64. static int acpi_checksum(const uint8_t *data, int len)
  65. {
  66. int sum, i;
  67. sum = 0;
  68. for (i = 0; i < len; i++) {
  69. sum += data[i];
  70. }
  71. return (-sum) & 0xff;
  72. }
  73. /* Install a copy of the ACPI table specified in @blob.
  74. *
  75. * If @has_header is set, @blob starts with the System Description Table Header
  76. * structure. Otherwise, "dfl_hdr" is prepended. In any case, each header field
  77. * is optionally overwritten from @hdrs.
  78. *
  79. * It is valid to call this function with
  80. * (@blob == NULL && bloblen == 0 && !has_header).
  81. *
  82. * @hdrs->file and @hdrs->data are ignored.
  83. *
  84. * SIZE_MAX is considered "infinity" in this function.
  85. *
  86. * The number of tables that can be installed is not limited, but the 16-bit
  87. * counter at the beginning of "acpi_tables" wraps around after UINT16_MAX.
  88. */
  89. static void acpi_table_install(const char unsigned *blob, size_t bloblen,
  90. bool has_header,
  91. const struct AcpiTableOptions *hdrs,
  92. Error **errp)
  93. {
  94. size_t body_start;
  95. const char unsigned *hdr_src;
  96. size_t body_size, acpi_payload_size;
  97. struct acpi_table_header *ext_hdr;
  98. unsigned changed_fields;
  99. /* Calculate where the ACPI table body starts within the blob, plus where
  100. * to copy the ACPI table header from.
  101. */
  102. if (has_header) {
  103. /* _length | ACPI header in blob | blob body
  104. * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^
  105. * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
  106. * == body_start
  107. *
  108. * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  109. * acpi_payload_size == bloblen
  110. */
  111. body_start = sizeof dfl_hdr;
  112. if (bloblen < body_start) {
  113. error_setg(errp, "ACPI table claiming to have header is too "
  114. "short, available: %zu, expected: %zu", bloblen,
  115. body_start);
  116. return;
  117. }
  118. hdr_src = blob;
  119. } else {
  120. /* _length | ACPI header in template | blob body
  121. * ^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^^^^^^^^^^^^^^ ^^^^^^^^^^
  122. * ACPI_TABLE_PFX_SIZE sizeof dfl_hdr body_size
  123. * == bloblen
  124. *
  125. * ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
  126. * acpi_payload_size
  127. */
  128. body_start = 0;
  129. hdr_src = dfl_hdr;
  130. }
  131. body_size = bloblen - body_start;
  132. acpi_payload_size = sizeof dfl_hdr + body_size;
  133. if (acpi_payload_size > UINT16_MAX) {
  134. error_setg(errp, "ACPI table too big, requested: %zu, max: %u",
  135. acpi_payload_size, (unsigned)UINT16_MAX);
  136. return;
  137. }
  138. /* We won't fail from here on. Initialize / extend the globals. */
  139. if (acpi_tables == NULL) {
  140. acpi_tables_len = sizeof(uint16_t);
  141. acpi_tables = g_malloc0(acpi_tables_len);
  142. }
  143. acpi_tables = g_realloc(acpi_tables, acpi_tables_len +
  144. ACPI_TABLE_PFX_SIZE +
  145. sizeof dfl_hdr + body_size);
  146. ext_hdr = (struct acpi_table_header *)(acpi_tables + acpi_tables_len);
  147. acpi_tables_len += ACPI_TABLE_PFX_SIZE;
  148. memcpy(acpi_tables + acpi_tables_len, hdr_src, sizeof dfl_hdr);
  149. acpi_tables_len += sizeof dfl_hdr;
  150. if (blob != NULL) {
  151. memcpy(acpi_tables + acpi_tables_len, blob + body_start, body_size);
  152. acpi_tables_len += body_size;
  153. }
  154. /* increase number of tables */
  155. stw_le_p(acpi_tables, lduw_le_p(acpi_tables) + 1u);
  156. /* Update the header fields. The strings need not be NUL-terminated. */
  157. changed_fields = 0;
  158. ext_hdr->_length = cpu_to_le16(acpi_payload_size);
  159. if (hdrs->has_sig) {
  160. strncpy(ext_hdr->sig, hdrs->sig, sizeof ext_hdr->sig);
  161. ++changed_fields;
  162. }
  163. if (has_header && le32_to_cpu(ext_hdr->length) != acpi_payload_size) {
  164. fprintf(stderr,
  165. "warning: ACPI table has wrong length, header says "
  166. "%" PRIu32 ", actual size %zu bytes\n",
  167. le32_to_cpu(ext_hdr->length), acpi_payload_size);
  168. }
  169. ext_hdr->length = cpu_to_le32(acpi_payload_size);
  170. if (hdrs->has_rev) {
  171. ext_hdr->revision = hdrs->rev;
  172. ++changed_fields;
  173. }
  174. ext_hdr->checksum = 0;
  175. if (hdrs->has_oem_id) {
  176. strncpy(ext_hdr->oem_id, hdrs->oem_id, sizeof ext_hdr->oem_id);
  177. ++changed_fields;
  178. }
  179. if (hdrs->has_oem_table_id) {
  180. strncpy(ext_hdr->oem_table_id, hdrs->oem_table_id,
  181. sizeof ext_hdr->oem_table_id);
  182. ++changed_fields;
  183. }
  184. if (hdrs->has_oem_rev) {
  185. ext_hdr->oem_revision = cpu_to_le32(hdrs->oem_rev);
  186. ++changed_fields;
  187. }
  188. if (hdrs->has_asl_compiler_id) {
  189. strncpy(ext_hdr->asl_compiler_id, hdrs->asl_compiler_id,
  190. sizeof ext_hdr->asl_compiler_id);
  191. ++changed_fields;
  192. }
  193. if (hdrs->has_asl_compiler_rev) {
  194. ext_hdr->asl_compiler_revision = cpu_to_le32(hdrs->asl_compiler_rev);
  195. ++changed_fields;
  196. }
  197. if (!has_header && changed_fields == 0) {
  198. fprintf(stderr, "warning: ACPI table: no headers are specified\n");
  199. }
  200. /* recalculate checksum */
  201. ext_hdr->checksum = acpi_checksum((const char unsigned *)ext_hdr +
  202. ACPI_TABLE_PFX_SIZE, acpi_payload_size);
  203. }
  204. void acpi_table_add(const QemuOpts *opts, Error **errp)
  205. {
  206. AcpiTableOptions *hdrs = NULL;
  207. Error *err = NULL;
  208. char **pathnames = NULL;
  209. char **cur;
  210. size_t bloblen = 0;
  211. char unsigned *blob = NULL;
  212. {
  213. OptsVisitor *ov;
  214. ov = opts_visitor_new(opts);
  215. visit_type_AcpiTableOptions(opts_get_visitor(ov), NULL, &hdrs, &err);
  216. opts_visitor_cleanup(ov);
  217. }
  218. if (err) {
  219. goto out;
  220. }
  221. if (hdrs->has_file == hdrs->has_data) {
  222. error_setg(&err, "'-acpitable' requires one of 'data' or 'file'");
  223. goto out;
  224. }
  225. pathnames = g_strsplit(hdrs->has_file ? hdrs->file : hdrs->data, ":", 0);
  226. if (pathnames == NULL || pathnames[0] == NULL) {
  227. error_setg(&err, "'-acpitable' requires at least one pathname");
  228. goto out;
  229. }
  230. /* now read in the data files, reallocating buffer as needed */
  231. for (cur = pathnames; *cur; ++cur) {
  232. int fd = open(*cur, O_RDONLY | O_BINARY);
  233. if (fd < 0) {
  234. error_setg(&err, "can't open file %s: %s", *cur, strerror(errno));
  235. goto out;
  236. }
  237. for (;;) {
  238. char unsigned data[8192];
  239. ssize_t r;
  240. r = read(fd, data, sizeof data);
  241. if (r == 0) {
  242. break;
  243. } else if (r > 0) {
  244. blob = g_realloc(blob, bloblen + r);
  245. memcpy(blob + bloblen, data, r);
  246. bloblen += r;
  247. } else if (errno != EINTR) {
  248. error_setg(&err, "can't read file %s: %s",
  249. *cur, strerror(errno));
  250. close(fd);
  251. goto out;
  252. }
  253. }
  254. close(fd);
  255. }
  256. acpi_table_install(blob, bloblen, hdrs->has_file, hdrs, &err);
  257. out:
  258. g_free(blob);
  259. g_strfreev(pathnames);
  260. qapi_free_AcpiTableOptions(hdrs);
  261. error_propagate(errp, err);
  262. }
  263. static bool acpi_table_builtin = false;
  264. void acpi_table_add_builtin(const QemuOpts *opts, Error **errp)
  265. {
  266. acpi_table_builtin = true;
  267. acpi_table_add(opts, errp);
  268. }
  269. unsigned acpi_table_len(void *current)
  270. {
  271. struct acpi_table_header *hdr = current - sizeof(hdr->_length);
  272. return hdr->_length;
  273. }
  274. static
  275. void *acpi_table_hdr(void *h)
  276. {
  277. struct acpi_table_header *hdr = h;
  278. return &hdr->sig;
  279. }
  280. uint8_t *acpi_table_first(void)
  281. {
  282. if (acpi_table_builtin || !acpi_tables) {
  283. return NULL;
  284. }
  285. return acpi_table_hdr(acpi_tables + ACPI_TABLE_PFX_SIZE);
  286. }
  287. uint8_t *acpi_table_next(uint8_t *current)
  288. {
  289. uint8_t *next = current + acpi_table_len(current);
  290. if (next - acpi_tables >= acpi_tables_len) {
  291. return NULL;
  292. } else {
  293. return acpi_table_hdr(next);
  294. }
  295. }
  296. int acpi_get_slic_oem(AcpiSlicOem *oem)
  297. {
  298. uint8_t *u;
  299. for (u = acpi_table_first(); u; u = acpi_table_next(u)) {
  300. struct acpi_table_header *hdr = (void *)(u - sizeof(hdr->_length));
  301. if (memcmp(hdr->sig, "SLIC", 4) == 0) {
  302. oem->id = hdr->oem_id;
  303. oem->table_id = hdr->oem_table_id;
  304. return 0;
  305. }
  306. }
  307. return -1;
  308. }
  309. static void acpi_notify_wakeup(Notifier *notifier, void *data)
  310. {
  311. ACPIREGS *ar = container_of(notifier, ACPIREGS, wakeup);
  312. WakeupReason *reason = data;
  313. switch (*reason) {
  314. case QEMU_WAKEUP_REASON_RTC:
  315. ar->pm1.evt.sts |=
  316. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_RT_CLOCK_STATUS);
  317. break;
  318. case QEMU_WAKEUP_REASON_PMTIMER:
  319. ar->pm1.evt.sts |=
  320. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_TIMER_STATUS);
  321. break;
  322. case QEMU_WAKEUP_REASON_OTHER:
  323. /* ACPI_BITMASK_WAKE_STATUS should be set on resume.
  324. Pretend that resume was caused by power button */
  325. ar->pm1.evt.sts |=
  326. (ACPI_BITMASK_WAKE_STATUS | ACPI_BITMASK_POWER_BUTTON_STATUS);
  327. break;
  328. default:
  329. break;
  330. }
  331. }
  332. /* ACPI PM1a EVT */
  333. uint16_t acpi_pm1_evt_get_sts(ACPIREGS *ar)
  334. {
  335. /* Compare ns-clock, not PM timer ticks, because
  336. acpi_pm_tmr_update function uses ns for setting the timer. */
  337. int64_t d = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL);
  338. if (d >= muldiv64(ar->tmr.overflow_time,
  339. NANOSECONDS_PER_SECOND, PM_TIMER_FREQUENCY)) {
  340. ar->pm1.evt.sts |= ACPI_BITMASK_TIMER_STATUS;
  341. }
  342. return ar->pm1.evt.sts;
  343. }
  344. static void acpi_pm1_evt_write_sts(ACPIREGS *ar, uint16_t val)
  345. {
  346. uint16_t pm1_sts = acpi_pm1_evt_get_sts(ar);
  347. if (pm1_sts & val & ACPI_BITMASK_TIMER_STATUS) {
  348. /* if TMRSTS is reset, then compute the new overflow time */
  349. acpi_pm_tmr_calc_overflow_time(ar);
  350. }
  351. ar->pm1.evt.sts &= ~val;
  352. }
  353. static void acpi_pm1_evt_write_en(ACPIREGS *ar, uint16_t val)
  354. {
  355. ar->pm1.evt.en = val;
  356. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC,
  357. val & ACPI_BITMASK_RT_CLOCK_ENABLE);
  358. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER,
  359. val & ACPI_BITMASK_TIMER_ENABLE);
  360. }
  361. void acpi_pm1_evt_power_down(ACPIREGS *ar)
  362. {
  363. if (ar->pm1.evt.en & ACPI_BITMASK_POWER_BUTTON_ENABLE) {
  364. ar->pm1.evt.sts |= ACPI_BITMASK_POWER_BUTTON_STATUS;
  365. ar->tmr.update_sci(ar);
  366. }
  367. }
  368. void acpi_pm1_evt_reset(ACPIREGS *ar)
  369. {
  370. ar->pm1.evt.sts = 0;
  371. ar->pm1.evt.en = 0;
  372. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_RTC, 0);
  373. qemu_system_wakeup_enable(QEMU_WAKEUP_REASON_PMTIMER, 0);
  374. }
  375. static uint64_t acpi_pm_evt_read(void *opaque, hwaddr addr, unsigned width)
  376. {
  377. ACPIREGS *ar = opaque;
  378. switch (addr) {
  379. case 0:
  380. return acpi_pm1_evt_get_sts(ar);
  381. case 2:
  382. return ar->pm1.evt.en;
  383. default:
  384. return 0;
  385. }
  386. }
  387. static void acpi_pm_evt_write(void *opaque, hwaddr addr, uint64_t val,
  388. unsigned width)
  389. {
  390. ACPIREGS *ar = opaque;
  391. switch (addr) {
  392. case 0:
  393. acpi_pm1_evt_write_sts(ar, val);
  394. ar->pm1.evt.update_sci(ar);
  395. break;
  396. case 2:
  397. acpi_pm1_evt_write_en(ar, val);
  398. ar->pm1.evt.update_sci(ar);
  399. break;
  400. }
  401. }
  402. static const MemoryRegionOps acpi_pm_evt_ops = {
  403. .read = acpi_pm_evt_read,
  404. .write = acpi_pm_evt_write,
  405. .valid.min_access_size = 2,
  406. .valid.max_access_size = 2,
  407. .endianness = DEVICE_LITTLE_ENDIAN,
  408. };
  409. void acpi_pm1_evt_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
  410. MemoryRegion *parent)
  411. {
  412. ar->pm1.evt.update_sci = update_sci;
  413. memory_region_init_io(&ar->pm1.evt.io, memory_region_owner(parent),
  414. &acpi_pm_evt_ops, ar, "acpi-evt", 4);
  415. memory_region_add_subregion(parent, 0, &ar->pm1.evt.io);
  416. }
  417. /* ACPI PM_TMR */
  418. void acpi_pm_tmr_update(ACPIREGS *ar, bool enable)
  419. {
  420. int64_t expire_time;
  421. /* schedule a timer interruption if needed */
  422. if (enable) {
  423. expire_time = muldiv64(ar->tmr.overflow_time, NANOSECONDS_PER_SECOND,
  424. PM_TIMER_FREQUENCY);
  425. timer_mod(ar->tmr.timer, expire_time);
  426. } else {
  427. timer_del(ar->tmr.timer);
  428. }
  429. }
  430. void acpi_pm_tmr_calc_overflow_time(ACPIREGS *ar)
  431. {
  432. int64_t d = acpi_pm_tmr_get_clock();
  433. ar->tmr.overflow_time = (d + 0x800000LL) & ~0x7fffffLL;
  434. }
  435. static uint32_t acpi_pm_tmr_get(ACPIREGS *ar)
  436. {
  437. uint32_t d = acpi_pm_tmr_get_clock();
  438. return d & 0xffffff;
  439. }
  440. static void acpi_pm_tmr_timer(void *opaque)
  441. {
  442. ACPIREGS *ar = opaque;
  443. qemu_system_wakeup_request(QEMU_WAKEUP_REASON_PMTIMER);
  444. ar->tmr.update_sci(ar);
  445. }
  446. static uint64_t acpi_pm_tmr_read(void *opaque, hwaddr addr, unsigned width)
  447. {
  448. return acpi_pm_tmr_get(opaque);
  449. }
  450. static void acpi_pm_tmr_write(void *opaque, hwaddr addr, uint64_t val,
  451. unsigned width)
  452. {
  453. /* nothing */
  454. }
  455. static const MemoryRegionOps acpi_pm_tmr_ops = {
  456. .read = acpi_pm_tmr_read,
  457. .write = acpi_pm_tmr_write,
  458. .valid.min_access_size = 4,
  459. .valid.max_access_size = 4,
  460. .endianness = DEVICE_LITTLE_ENDIAN,
  461. };
  462. void acpi_pm_tmr_init(ACPIREGS *ar, acpi_update_sci_fn update_sci,
  463. MemoryRegion *parent)
  464. {
  465. ar->tmr.update_sci = update_sci;
  466. ar->tmr.timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, acpi_pm_tmr_timer, ar);
  467. memory_region_init_io(&ar->tmr.io, memory_region_owner(parent),
  468. &acpi_pm_tmr_ops, ar, "acpi-tmr", 4);
  469. memory_region_clear_global_locking(&ar->tmr.io);
  470. memory_region_add_subregion(parent, 8, &ar->tmr.io);
  471. }
  472. void acpi_pm_tmr_reset(ACPIREGS *ar)
  473. {
  474. ar->tmr.overflow_time = 0;
  475. timer_del(ar->tmr.timer);
  476. }
  477. /* ACPI PM1aCNT */
  478. static void acpi_pm1_cnt_write(ACPIREGS *ar, uint16_t val)
  479. {
  480. ar->pm1.cnt.cnt = val & ~(ACPI_BITMASK_SLEEP_ENABLE);
  481. if (val & ACPI_BITMASK_SLEEP_ENABLE) {
  482. /* change suspend type */
  483. uint16_t sus_typ = (val >> 10) & 7;
  484. switch(sus_typ) {
  485. case 0: /* soft power off */
  486. qemu_system_shutdown_request();
  487. break;
  488. case 1:
  489. qemu_system_suspend_request();
  490. break;
  491. default:
  492. if (sus_typ == ar->pm1.cnt.s4_val) { /* S4 request */
  493. qapi_event_send_suspend_disk(&error_abort);
  494. qemu_system_shutdown_request();
  495. }
  496. break;
  497. }
  498. }
  499. }
  500. void acpi_pm1_cnt_update(ACPIREGS *ar,
  501. bool sci_enable, bool sci_disable)
  502. {
  503. /* ACPI specs 3.0, 4.7.2.5 */
  504. if (sci_enable) {
  505. ar->pm1.cnt.cnt |= ACPI_BITMASK_SCI_ENABLE;
  506. } else if (sci_disable) {
  507. ar->pm1.cnt.cnt &= ~ACPI_BITMASK_SCI_ENABLE;
  508. }
  509. }
  510. static uint64_t acpi_pm_cnt_read(void *opaque, hwaddr addr, unsigned width)
  511. {
  512. ACPIREGS *ar = opaque;
  513. return ar->pm1.cnt.cnt;
  514. }
  515. static void acpi_pm_cnt_write(void *opaque, hwaddr addr, uint64_t val,
  516. unsigned width)
  517. {
  518. acpi_pm1_cnt_write(opaque, val);
  519. }
  520. static const MemoryRegionOps acpi_pm_cnt_ops = {
  521. .read = acpi_pm_cnt_read,
  522. .write = acpi_pm_cnt_write,
  523. .valid.min_access_size = 2,
  524. .valid.max_access_size = 2,
  525. .endianness = DEVICE_LITTLE_ENDIAN,
  526. };
  527. void acpi_pm1_cnt_init(ACPIREGS *ar, MemoryRegion *parent,
  528. bool disable_s3, bool disable_s4, uint8_t s4_val)
  529. {
  530. FWCfgState *fw_cfg;
  531. ar->pm1.cnt.s4_val = s4_val;
  532. ar->wakeup.notify = acpi_notify_wakeup;
  533. qemu_register_wakeup_notifier(&ar->wakeup);
  534. memory_region_init_io(&ar->pm1.cnt.io, memory_region_owner(parent),
  535. &acpi_pm_cnt_ops, ar, "acpi-cnt", 2);
  536. memory_region_add_subregion(parent, 4, &ar->pm1.cnt.io);
  537. fw_cfg = fw_cfg_find();
  538. if (fw_cfg) {
  539. uint8_t suspend[6] = {128, 0, 0, 129, 128, 128};
  540. suspend[3] = 1 | ((!disable_s3) << 7);
  541. suspend[4] = s4_val | ((!disable_s4) << 7);
  542. fw_cfg_add_file(fw_cfg, "etc/system-states", g_memdup(suspend, 6), 6);
  543. }
  544. }
  545. void acpi_pm1_cnt_reset(ACPIREGS *ar)
  546. {
  547. ar->pm1.cnt.cnt = 0;
  548. }
  549. /* ACPI GPE */
  550. void acpi_gpe_init(ACPIREGS *ar, uint8_t len)
  551. {
  552. ar->gpe.len = len;
  553. /* Only first len / 2 bytes are ever used,
  554. * but the caller in ich9.c migrates full len bytes.
  555. * TODO: fix ich9.c and drop the extra allocation.
  556. */
  557. ar->gpe.sts = g_malloc0(len);
  558. ar->gpe.en = g_malloc0(len);
  559. }
  560. void acpi_gpe_reset(ACPIREGS *ar)
  561. {
  562. memset(ar->gpe.sts, 0, ar->gpe.len / 2);
  563. memset(ar->gpe.en, 0, ar->gpe.len / 2);
  564. }
  565. static uint8_t *acpi_gpe_ioport_get_ptr(ACPIREGS *ar, uint32_t addr)
  566. {
  567. uint8_t *cur = NULL;
  568. if (addr < ar->gpe.len / 2) {
  569. cur = ar->gpe.sts + addr;
  570. } else if (addr < ar->gpe.len) {
  571. cur = ar->gpe.en + addr - ar->gpe.len / 2;
  572. } else {
  573. abort();
  574. }
  575. return cur;
  576. }
  577. void acpi_gpe_ioport_writeb(ACPIREGS *ar, uint32_t addr, uint32_t val)
  578. {
  579. uint8_t *cur;
  580. cur = acpi_gpe_ioport_get_ptr(ar, addr);
  581. if (addr < ar->gpe.len / 2) {
  582. /* GPE_STS */
  583. *cur = (*cur) & ~val;
  584. } else if (addr < ar->gpe.len) {
  585. /* GPE_EN */
  586. *cur = val;
  587. } else {
  588. abort();
  589. }
  590. }
  591. uint32_t acpi_gpe_ioport_readb(ACPIREGS *ar, uint32_t addr)
  592. {
  593. uint8_t *cur;
  594. uint32_t val;
  595. cur = acpi_gpe_ioport_get_ptr(ar, addr);
  596. val = 0;
  597. if (cur != NULL) {
  598. val = *cur;
  599. }
  600. return val;
  601. }
  602. void acpi_send_gpe_event(ACPIREGS *ar, qemu_irq irq,
  603. AcpiGPEStatusBits status)
  604. {
  605. ar->gpe.sts[0] |= status;
  606. acpi_update_sci(ar, irq);
  607. }
  608. void acpi_update_sci(ACPIREGS *regs, qemu_irq irq)
  609. {
  610. int sci_level, pm1a_sts;
  611. pm1a_sts = acpi_pm1_evt_get_sts(regs);
  612. sci_level = ((pm1a_sts &
  613. regs->pm1.evt.en & ACPI_BITMASK_PM1_COMMON_ENABLED) != 0) ||
  614. ((regs->gpe.sts[0] & regs->gpe.en[0]) != 0);
  615. qemu_set_irq(irq, sci_level);
  616. /* schedule a timer interruption if needed */
  617. acpi_pm_tmr_update(regs,
  618. (regs->pm1.evt.en & ACPI_BITMASK_TIMER_ENABLE) &&
  619. !(pm1a_sts & ACPI_BITMASK_TIMER_STATUS));
  620. }