cuda.c 19 KB

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  1. /*
  2. * QEMU PowerMac CUDA device support
  3. *
  4. * Copyright (c) 2004-2007 Fabrice Bellard
  5. * Copyright (c) 2007 Jocelyn Mayer
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a copy
  8. * of this software and associated documentation files (the "Software"), to deal
  9. * in the Software without restriction, including without limitation the rights
  10. * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
  11. * copies of the Software, and to permit persons to whom the Software is
  12. * furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice shall be included in
  15. * all copies or substantial portions of the Software.
  16. *
  17. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  18. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  19. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  20. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  21. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  22. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
  23. * THE SOFTWARE.
  24. */
  25. #include "qemu/osdep.h"
  26. #include "qemu-common.h"
  27. #include "hw/ppc/mac.h"
  28. #include "hw/qdev-properties.h"
  29. #include "migration/vmstate.h"
  30. #include "hw/input/adb.h"
  31. #include "hw/misc/mos6522.h"
  32. #include "hw/misc/macio/cuda.h"
  33. #include "qemu/timer.h"
  34. #include "sysemu/runstate.h"
  35. #include "qemu/cutils.h"
  36. #include "qemu/log.h"
  37. #include "qemu/module.h"
  38. #include "trace.h"
  39. /* Bits in B data register: all active low */
  40. #define TREQ 0x08 /* Transfer request (input) */
  41. #define TACK 0x10 /* Transfer acknowledge (output) */
  42. #define TIP 0x20 /* Transfer in progress (output) */
  43. /* commands (1st byte) */
  44. #define ADB_PACKET 0
  45. #define CUDA_PACKET 1
  46. #define ERROR_PACKET 2
  47. #define TIMER_PACKET 3
  48. #define POWER_PACKET 4
  49. #define MACIIC_PACKET 5
  50. #define PMU_PACKET 6
  51. #define CUDA_TIMER_FREQ (4700000 / 6)
  52. /* CUDA returns time_t's offset from Jan 1, 1904, not 1970 */
  53. #define RTC_OFFSET 2082844800
  54. static void cuda_receive_packet_from_host(CUDAState *s,
  55. const uint8_t *data, int len);
  56. /* MacOS uses timer 1 for calibration on startup, so we use
  57. * the timebase frequency and cuda_get_counter_value() with
  58. * cuda_get_load_time() to steer MacOS to calculate calibrate its timers
  59. * correctly for both TCG and KVM (see commit b981289c49 "PPC: Cuda: Use cuda
  60. * timer to expose tbfreq to guest" for more information) */
  61. static uint64_t cuda_get_counter_value(MOS6522State *s, MOS6522Timer *ti)
  62. {
  63. MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
  64. CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
  65. /* Reverse of the tb calculation algorithm that Mac OS X uses on bootup */
  66. uint64_t tb_diff = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
  67. cs->tb_frequency, NANOSECONDS_PER_SECOND) -
  68. ti->load_time;
  69. return (tb_diff * 0xBF401675E5DULL) / (cs->tb_frequency << 24);
  70. }
  71. static uint64_t cuda_get_load_time(MOS6522State *s, MOS6522Timer *ti)
  72. {
  73. MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
  74. CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
  75. uint64_t load_time = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
  76. cs->tb_frequency, NANOSECONDS_PER_SECOND);
  77. return load_time;
  78. }
  79. static void cuda_set_sr_int(void *opaque)
  80. {
  81. CUDAState *s = opaque;
  82. MOS6522CUDAState *mcs = &s->mos6522_cuda;
  83. MOS6522State *ms = MOS6522(mcs);
  84. MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
  85. mdc->set_sr_int(ms);
  86. }
  87. static void cuda_delay_set_sr_int(CUDAState *s)
  88. {
  89. int64_t expire;
  90. trace_cuda_delay_set_sr_int();
  91. expire = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + s->sr_delay_ns;
  92. timer_mod(s->sr_delay_timer, expire);
  93. }
  94. /* NOTE: TIP and TREQ are negated */
  95. static void cuda_update(CUDAState *s)
  96. {
  97. MOS6522CUDAState *mcs = &s->mos6522_cuda;
  98. MOS6522State *ms = MOS6522(mcs);
  99. int packet_received, len;
  100. packet_received = 0;
  101. if (!(ms->b & TIP)) {
  102. /* transfer requested from host */
  103. if (ms->acr & SR_OUT) {
  104. /* data output */
  105. if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
  106. if (s->data_out_index < sizeof(s->data_out)) {
  107. trace_cuda_data_send(ms->sr);
  108. s->data_out[s->data_out_index++] = ms->sr;
  109. cuda_delay_set_sr_int(s);
  110. }
  111. }
  112. } else {
  113. if (s->data_in_index < s->data_in_size) {
  114. /* data input */
  115. if ((ms->b & (TACK | TIP)) != (s->last_b & (TACK | TIP))) {
  116. ms->sr = s->data_in[s->data_in_index++];
  117. trace_cuda_data_recv(ms->sr);
  118. /* indicate end of transfer */
  119. if (s->data_in_index >= s->data_in_size) {
  120. ms->b = (ms->b | TREQ);
  121. }
  122. cuda_delay_set_sr_int(s);
  123. }
  124. }
  125. }
  126. } else {
  127. /* no transfer requested: handle sync case */
  128. if ((s->last_b & TIP) && (ms->b & TACK) != (s->last_b & TACK)) {
  129. /* update TREQ state each time TACK change state */
  130. if (ms->b & TACK) {
  131. ms->b = (ms->b | TREQ);
  132. } else {
  133. ms->b = (ms->b & ~TREQ);
  134. }
  135. cuda_delay_set_sr_int(s);
  136. } else {
  137. if (!(s->last_b & TIP)) {
  138. /* handle end of host to cuda transfer */
  139. packet_received = (s->data_out_index > 0);
  140. /* always an IRQ at the end of transfer */
  141. cuda_delay_set_sr_int(s);
  142. }
  143. /* signal if there is data to read */
  144. if (s->data_in_index < s->data_in_size) {
  145. ms->b = (ms->b & ~TREQ);
  146. }
  147. }
  148. }
  149. s->last_acr = ms->acr;
  150. s->last_b = ms->b;
  151. /* NOTE: cuda_receive_packet_from_host() can call cuda_update()
  152. recursively */
  153. if (packet_received) {
  154. len = s->data_out_index;
  155. s->data_out_index = 0;
  156. cuda_receive_packet_from_host(s, s->data_out, len);
  157. }
  158. }
  159. static void cuda_send_packet_to_host(CUDAState *s,
  160. const uint8_t *data, int len)
  161. {
  162. int i;
  163. trace_cuda_packet_send(len);
  164. for (i = 0; i < len; i++) {
  165. trace_cuda_packet_send_data(i, data[i]);
  166. }
  167. memcpy(s->data_in, data, len);
  168. s->data_in_size = len;
  169. s->data_in_index = 0;
  170. cuda_update(s);
  171. cuda_delay_set_sr_int(s);
  172. }
  173. static void cuda_adb_poll(void *opaque)
  174. {
  175. CUDAState *s = opaque;
  176. uint8_t obuf[ADB_MAX_OUT_LEN + 2];
  177. int olen;
  178. olen = adb_poll(&s->adb_bus, obuf + 2, s->adb_poll_mask);
  179. if (olen > 0) {
  180. obuf[0] = ADB_PACKET;
  181. obuf[1] = 0x40; /* polled data */
  182. cuda_send_packet_to_host(s, obuf, olen + 2);
  183. }
  184. timer_mod(s->adb_poll_timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
  185. (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
  186. }
  187. /* description of commands */
  188. typedef struct CudaCommand {
  189. uint8_t command;
  190. const char *name;
  191. bool (*handler)(CUDAState *s,
  192. const uint8_t *in_args, int in_len,
  193. uint8_t *out_args, int *out_len);
  194. } CudaCommand;
  195. static bool cuda_cmd_autopoll(CUDAState *s,
  196. const uint8_t *in_data, int in_len,
  197. uint8_t *out_data, int *out_len)
  198. {
  199. int autopoll;
  200. if (in_len != 1) {
  201. return false;
  202. }
  203. autopoll = (in_data[0] != 0);
  204. if (autopoll != s->autopoll) {
  205. s->autopoll = autopoll;
  206. if (autopoll) {
  207. timer_mod(s->adb_poll_timer,
  208. qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
  209. (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
  210. } else {
  211. timer_del(s->adb_poll_timer);
  212. }
  213. }
  214. return true;
  215. }
  216. static bool cuda_cmd_set_autorate(CUDAState *s,
  217. const uint8_t *in_data, int in_len,
  218. uint8_t *out_data, int *out_len)
  219. {
  220. if (in_len != 1) {
  221. return false;
  222. }
  223. /* we don't want a period of 0 ms */
  224. /* FIXME: check what real hardware does */
  225. if (in_data[0] == 0) {
  226. return false;
  227. }
  228. s->autopoll_rate_ms = in_data[0];
  229. if (s->autopoll) {
  230. timer_mod(s->adb_poll_timer,
  231. qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) +
  232. (NANOSECONDS_PER_SECOND / (1000 / s->autopoll_rate_ms)));
  233. }
  234. return true;
  235. }
  236. static bool cuda_cmd_set_device_list(CUDAState *s,
  237. const uint8_t *in_data, int in_len,
  238. uint8_t *out_data, int *out_len)
  239. {
  240. if (in_len != 2) {
  241. return false;
  242. }
  243. s->adb_poll_mask = (((uint16_t)in_data[0]) << 8) | in_data[1];
  244. return true;
  245. }
  246. static bool cuda_cmd_powerdown(CUDAState *s,
  247. const uint8_t *in_data, int in_len,
  248. uint8_t *out_data, int *out_len)
  249. {
  250. if (in_len != 0) {
  251. return false;
  252. }
  253. qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
  254. return true;
  255. }
  256. static bool cuda_cmd_reset_system(CUDAState *s,
  257. const uint8_t *in_data, int in_len,
  258. uint8_t *out_data, int *out_len)
  259. {
  260. if (in_len != 0) {
  261. return false;
  262. }
  263. qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET);
  264. return true;
  265. }
  266. static bool cuda_cmd_set_file_server_flag(CUDAState *s,
  267. const uint8_t *in_data, int in_len,
  268. uint8_t *out_data, int *out_len)
  269. {
  270. if (in_len != 1) {
  271. return false;
  272. }
  273. qemu_log_mask(LOG_UNIMP,
  274. "CUDA: unimplemented command FILE_SERVER_FLAG %d\n",
  275. in_data[0]);
  276. return true;
  277. }
  278. static bool cuda_cmd_set_power_message(CUDAState *s,
  279. const uint8_t *in_data, int in_len,
  280. uint8_t *out_data, int *out_len)
  281. {
  282. if (in_len != 1) {
  283. return false;
  284. }
  285. qemu_log_mask(LOG_UNIMP,
  286. "CUDA: unimplemented command SET_POWER_MESSAGE %d\n",
  287. in_data[0]);
  288. return true;
  289. }
  290. static bool cuda_cmd_get_time(CUDAState *s,
  291. const uint8_t *in_data, int in_len,
  292. uint8_t *out_data, int *out_len)
  293. {
  294. uint32_t ti;
  295. if (in_len != 0) {
  296. return false;
  297. }
  298. ti = s->tick_offset + (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  299. / NANOSECONDS_PER_SECOND);
  300. out_data[0] = ti >> 24;
  301. out_data[1] = ti >> 16;
  302. out_data[2] = ti >> 8;
  303. out_data[3] = ti;
  304. *out_len = 4;
  305. return true;
  306. }
  307. static bool cuda_cmd_set_time(CUDAState *s,
  308. const uint8_t *in_data, int in_len,
  309. uint8_t *out_data, int *out_len)
  310. {
  311. uint32_t ti;
  312. if (in_len != 4) {
  313. return false;
  314. }
  315. ti = (((uint32_t)in_data[0]) << 24) + (((uint32_t)in_data[1]) << 16)
  316. + (((uint32_t)in_data[2]) << 8) + in_data[3];
  317. s->tick_offset = ti - (qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)
  318. / NANOSECONDS_PER_SECOND);
  319. return true;
  320. }
  321. static const CudaCommand handlers[] = {
  322. { CUDA_AUTOPOLL, "AUTOPOLL", cuda_cmd_autopoll },
  323. { CUDA_SET_AUTO_RATE, "SET_AUTO_RATE", cuda_cmd_set_autorate },
  324. { CUDA_SET_DEVICE_LIST, "SET_DEVICE_LIST", cuda_cmd_set_device_list },
  325. { CUDA_POWERDOWN, "POWERDOWN", cuda_cmd_powerdown },
  326. { CUDA_RESET_SYSTEM, "RESET_SYSTEM", cuda_cmd_reset_system },
  327. { CUDA_FILE_SERVER_FLAG, "FILE_SERVER_FLAG",
  328. cuda_cmd_set_file_server_flag },
  329. { CUDA_SET_POWER_MESSAGES, "SET_POWER_MESSAGES",
  330. cuda_cmd_set_power_message },
  331. { CUDA_GET_TIME, "GET_TIME", cuda_cmd_get_time },
  332. { CUDA_SET_TIME, "SET_TIME", cuda_cmd_set_time },
  333. };
  334. static void cuda_receive_packet(CUDAState *s,
  335. const uint8_t *data, int len)
  336. {
  337. uint8_t obuf[16] = { CUDA_PACKET, 0, data[0] };
  338. int i, out_len = 0;
  339. for (i = 0; i < ARRAY_SIZE(handlers); i++) {
  340. const CudaCommand *desc = &handlers[i];
  341. if (desc->command == data[0]) {
  342. trace_cuda_receive_packet_cmd(desc->name);
  343. out_len = 0;
  344. if (desc->handler(s, data + 1, len - 1, obuf + 3, &out_len)) {
  345. cuda_send_packet_to_host(s, obuf, 3 + out_len);
  346. } else {
  347. qemu_log_mask(LOG_GUEST_ERROR,
  348. "CUDA: %s: wrong parameters %d\n",
  349. desc->name, len);
  350. obuf[0] = ERROR_PACKET;
  351. obuf[1] = 0x5; /* bad parameters */
  352. obuf[2] = CUDA_PACKET;
  353. obuf[3] = data[0];
  354. cuda_send_packet_to_host(s, obuf, 4);
  355. }
  356. return;
  357. }
  358. }
  359. qemu_log_mask(LOG_GUEST_ERROR, "CUDA: unknown command 0x%02x\n", data[0]);
  360. obuf[0] = ERROR_PACKET;
  361. obuf[1] = 0x2; /* unknown command */
  362. obuf[2] = CUDA_PACKET;
  363. obuf[3] = data[0];
  364. cuda_send_packet_to_host(s, obuf, 4);
  365. }
  366. static void cuda_receive_packet_from_host(CUDAState *s,
  367. const uint8_t *data, int len)
  368. {
  369. int i;
  370. trace_cuda_packet_receive(len);
  371. for (i = 0; i < len; i++) {
  372. trace_cuda_packet_receive_data(i, data[i]);
  373. }
  374. switch(data[0]) {
  375. case ADB_PACKET:
  376. {
  377. uint8_t obuf[ADB_MAX_OUT_LEN + 3];
  378. int olen;
  379. olen = adb_request(&s->adb_bus, obuf + 2, data + 1, len - 1);
  380. if (olen > 0) {
  381. obuf[0] = ADB_PACKET;
  382. obuf[1] = 0x00;
  383. cuda_send_packet_to_host(s, obuf, olen + 2);
  384. } else {
  385. /* error */
  386. obuf[0] = ADB_PACKET;
  387. obuf[1] = -olen;
  388. obuf[2] = data[1];
  389. olen = 0;
  390. cuda_send_packet_to_host(s, obuf, olen + 3);
  391. }
  392. }
  393. break;
  394. case CUDA_PACKET:
  395. cuda_receive_packet(s, data + 1, len - 1);
  396. break;
  397. }
  398. }
  399. static uint64_t mos6522_cuda_read(void *opaque, hwaddr addr, unsigned size)
  400. {
  401. CUDAState *s = opaque;
  402. MOS6522CUDAState *mcs = &s->mos6522_cuda;
  403. MOS6522State *ms = MOS6522(mcs);
  404. addr = (addr >> 9) & 0xf;
  405. return mos6522_read(ms, addr, size);
  406. }
  407. static void mos6522_cuda_write(void *opaque, hwaddr addr, uint64_t val,
  408. unsigned size)
  409. {
  410. CUDAState *s = opaque;
  411. MOS6522CUDAState *mcs = &s->mos6522_cuda;
  412. MOS6522State *ms = MOS6522(mcs);
  413. addr = (addr >> 9) & 0xf;
  414. mos6522_write(ms, addr, val, size);
  415. }
  416. static const MemoryRegionOps mos6522_cuda_ops = {
  417. .read = mos6522_cuda_read,
  418. .write = mos6522_cuda_write,
  419. .endianness = DEVICE_BIG_ENDIAN,
  420. .valid = {
  421. .min_access_size = 1,
  422. .max_access_size = 1,
  423. },
  424. };
  425. static const VMStateDescription vmstate_cuda = {
  426. .name = "cuda",
  427. .version_id = 5,
  428. .minimum_version_id = 5,
  429. .fields = (VMStateField[]) {
  430. VMSTATE_STRUCT(mos6522_cuda.parent_obj, CUDAState, 0, vmstate_mos6522,
  431. MOS6522State),
  432. VMSTATE_UINT8(last_b, CUDAState),
  433. VMSTATE_UINT8(last_acr, CUDAState),
  434. VMSTATE_INT32(data_in_size, CUDAState),
  435. VMSTATE_INT32(data_in_index, CUDAState),
  436. VMSTATE_INT32(data_out_index, CUDAState),
  437. VMSTATE_UINT8(autopoll, CUDAState),
  438. VMSTATE_UINT8(autopoll_rate_ms, CUDAState),
  439. VMSTATE_UINT16(adb_poll_mask, CUDAState),
  440. VMSTATE_BUFFER(data_in, CUDAState),
  441. VMSTATE_BUFFER(data_out, CUDAState),
  442. VMSTATE_UINT32(tick_offset, CUDAState),
  443. VMSTATE_TIMER_PTR(adb_poll_timer, CUDAState),
  444. VMSTATE_TIMER_PTR(sr_delay_timer, CUDAState),
  445. VMSTATE_END_OF_LIST()
  446. }
  447. };
  448. static void cuda_reset(DeviceState *dev)
  449. {
  450. CUDAState *s = CUDA(dev);
  451. s->data_in_size = 0;
  452. s->data_in_index = 0;
  453. s->data_out_index = 0;
  454. s->autopoll = 0;
  455. }
  456. static void cuda_realize(DeviceState *dev, Error **errp)
  457. {
  458. CUDAState *s = CUDA(dev);
  459. SysBusDevice *sbd;
  460. MOS6522State *ms;
  461. DeviceState *d;
  462. struct tm tm;
  463. /* Pass IRQ from 6522 */
  464. d = DEVICE(&s->mos6522_cuda);
  465. ms = MOS6522(d);
  466. sbd = SYS_BUS_DEVICE(s);
  467. sysbus_pass_irq(sbd, SYS_BUS_DEVICE(ms));
  468. qemu_get_timedate(&tm, 0);
  469. s->tick_offset = (uint32_t)mktimegm(&tm) + RTC_OFFSET;
  470. s->sr_delay_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_set_sr_int, s);
  471. s->sr_delay_ns = 20 * SCALE_US;
  472. s->adb_poll_timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, cuda_adb_poll, s);
  473. s->adb_poll_mask = 0xffff;
  474. s->autopoll_rate_ms = 20;
  475. }
  476. static void cuda_init(Object *obj)
  477. {
  478. CUDAState *s = CUDA(obj);
  479. SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
  480. sysbus_init_child_obj(obj, "mos6522-cuda", &s->mos6522_cuda,
  481. sizeof(s->mos6522_cuda), TYPE_MOS6522_CUDA);
  482. memory_region_init_io(&s->mem, obj, &mos6522_cuda_ops, s, "cuda", 0x2000);
  483. sysbus_init_mmio(sbd, &s->mem);
  484. qbus_create_inplace(&s->adb_bus, sizeof(s->adb_bus), TYPE_ADB_BUS,
  485. DEVICE(obj), "adb.0");
  486. }
  487. static Property cuda_properties[] = {
  488. DEFINE_PROP_UINT64("timebase-frequency", CUDAState, tb_frequency, 0),
  489. DEFINE_PROP_END_OF_LIST()
  490. };
  491. static void cuda_class_init(ObjectClass *oc, void *data)
  492. {
  493. DeviceClass *dc = DEVICE_CLASS(oc);
  494. dc->realize = cuda_realize;
  495. dc->reset = cuda_reset;
  496. dc->vmsd = &vmstate_cuda;
  497. dc->props = cuda_properties;
  498. set_bit(DEVICE_CATEGORY_BRIDGE, dc->categories);
  499. }
  500. static const TypeInfo cuda_type_info = {
  501. .name = TYPE_CUDA,
  502. .parent = TYPE_SYS_BUS_DEVICE,
  503. .instance_size = sizeof(CUDAState),
  504. .instance_init = cuda_init,
  505. .class_init = cuda_class_init,
  506. };
  507. static void mos6522_cuda_portB_write(MOS6522State *s)
  508. {
  509. MOS6522CUDAState *mcs = container_of(s, MOS6522CUDAState, parent_obj);
  510. CUDAState *cs = container_of(mcs, CUDAState, mos6522_cuda);
  511. cuda_update(cs);
  512. }
  513. static void mos6522_cuda_reset(DeviceState *dev)
  514. {
  515. MOS6522State *ms = MOS6522(dev);
  516. MOS6522DeviceClass *mdc = MOS6522_DEVICE_GET_CLASS(ms);
  517. mdc->parent_reset(dev);
  518. ms->timers[0].frequency = CUDA_TIMER_FREQ;
  519. ms->timers[1].frequency = (SCALE_US * 6000) / 4700;
  520. }
  521. static void mos6522_cuda_class_init(ObjectClass *oc, void *data)
  522. {
  523. DeviceClass *dc = DEVICE_CLASS(oc);
  524. MOS6522DeviceClass *mdc = MOS6522_DEVICE_CLASS(oc);
  525. dc->reset = mos6522_cuda_reset;
  526. mdc->portB_write = mos6522_cuda_portB_write;
  527. mdc->get_timer1_counter_value = cuda_get_counter_value;
  528. mdc->get_timer2_counter_value = cuda_get_counter_value;
  529. mdc->get_timer1_load_time = cuda_get_load_time;
  530. mdc->get_timer2_load_time = cuda_get_load_time;
  531. }
  532. static const TypeInfo mos6522_cuda_type_info = {
  533. .name = TYPE_MOS6522_CUDA,
  534. .parent = TYPE_MOS6522,
  535. .instance_size = sizeof(MOS6522CUDAState),
  536. .class_init = mos6522_cuda_class_init,
  537. };
  538. static void cuda_register_types(void)
  539. {
  540. type_register_static(&mos6522_cuda_type_info);
  541. type_register_static(&cuda_type_info);
  542. }
  543. type_init(cuda_register_types)