memory.c 100 KB

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  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "cpu.h"
  18. #include "exec/memory.h"
  19. #include "exec/address-spaces.h"
  20. #include "qapi/visitor.h"
  21. #include "qemu/bitops.h"
  22. #include "qemu/error-report.h"
  23. #include "qemu/main-loop.h"
  24. #include "qemu/qemu-print.h"
  25. #include "qom/object.h"
  26. #include "trace-root.h"
  27. #include "exec/memory-internal.h"
  28. #include "exec/ram_addr.h"
  29. #include "sysemu/kvm.h"
  30. #include "sysemu/runstate.h"
  31. #include "sysemu/tcg.h"
  32. #include "sysemu/accel.h"
  33. #include "hw/boards.h"
  34. #include "migration/vmstate.h"
  35. //#define DEBUG_UNASSIGNED
  36. static unsigned memory_region_transaction_depth;
  37. static bool memory_region_update_pending;
  38. static bool ioeventfd_update_pending;
  39. bool global_dirty_log;
  40. static QTAILQ_HEAD(, MemoryListener) memory_listeners
  41. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  42. static QTAILQ_HEAD(, AddressSpace) address_spaces
  43. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  44. static GHashTable *flat_views;
  45. typedef struct AddrRange AddrRange;
  46. /*
  47. * Note that signed integers are needed for negative offsetting in aliases
  48. * (large MemoryRegion::alias_offset).
  49. */
  50. struct AddrRange {
  51. Int128 start;
  52. Int128 size;
  53. };
  54. static AddrRange addrrange_make(Int128 start, Int128 size)
  55. {
  56. return (AddrRange) { start, size };
  57. }
  58. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  59. {
  60. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  61. }
  62. static Int128 addrrange_end(AddrRange r)
  63. {
  64. return int128_add(r.start, r.size);
  65. }
  66. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  67. {
  68. int128_addto(&range.start, delta);
  69. return range;
  70. }
  71. static bool addrrange_contains(AddrRange range, Int128 addr)
  72. {
  73. return int128_ge(addr, range.start)
  74. && int128_lt(addr, addrrange_end(range));
  75. }
  76. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  77. {
  78. return addrrange_contains(r1, r2.start)
  79. || addrrange_contains(r2, r1.start);
  80. }
  81. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  82. {
  83. Int128 start = int128_max(r1.start, r2.start);
  84. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  85. return addrrange_make(start, int128_sub(end, start));
  86. }
  87. enum ListenerDirection { Forward, Reverse };
  88. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  89. do { \
  90. MemoryListener *_listener; \
  91. \
  92. switch (_direction) { \
  93. case Forward: \
  94. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  95. if (_listener->_callback) { \
  96. _listener->_callback(_listener, ##_args); \
  97. } \
  98. } \
  99. break; \
  100. case Reverse: \
  101. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, link) { \
  102. if (_listener->_callback) { \
  103. _listener->_callback(_listener, ##_args); \
  104. } \
  105. } \
  106. break; \
  107. default: \
  108. abort(); \
  109. } \
  110. } while (0)
  111. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  112. do { \
  113. MemoryListener *_listener; \
  114. \
  115. switch (_direction) { \
  116. case Forward: \
  117. QTAILQ_FOREACH(_listener, &(_as)->listeners, link_as) { \
  118. if (_listener->_callback) { \
  119. _listener->_callback(_listener, _section, ##_args); \
  120. } \
  121. } \
  122. break; \
  123. case Reverse: \
  124. QTAILQ_FOREACH_REVERSE(_listener, &(_as)->listeners, link_as) { \
  125. if (_listener->_callback) { \
  126. _listener->_callback(_listener, _section, ##_args); \
  127. } \
  128. } \
  129. break; \
  130. default: \
  131. abort(); \
  132. } \
  133. } while (0)
  134. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  135. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  136. do { \
  137. MemoryRegionSection mrs = section_from_flat_range(fr, \
  138. address_space_to_flatview(as)); \
  139. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  140. } while(0)
  141. struct CoalescedMemoryRange {
  142. AddrRange addr;
  143. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  144. };
  145. struct MemoryRegionIoeventfd {
  146. AddrRange addr;
  147. bool match_data;
  148. uint64_t data;
  149. EventNotifier *e;
  150. };
  151. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
  152. MemoryRegionIoeventfd *b)
  153. {
  154. if (int128_lt(a->addr.start, b->addr.start)) {
  155. return true;
  156. } else if (int128_gt(a->addr.start, b->addr.start)) {
  157. return false;
  158. } else if (int128_lt(a->addr.size, b->addr.size)) {
  159. return true;
  160. } else if (int128_gt(a->addr.size, b->addr.size)) {
  161. return false;
  162. } else if (a->match_data < b->match_data) {
  163. return true;
  164. } else if (a->match_data > b->match_data) {
  165. return false;
  166. } else if (a->match_data) {
  167. if (a->data < b->data) {
  168. return true;
  169. } else if (a->data > b->data) {
  170. return false;
  171. }
  172. }
  173. if (a->e < b->e) {
  174. return true;
  175. } else if (a->e > b->e) {
  176. return false;
  177. }
  178. return false;
  179. }
  180. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
  181. MemoryRegionIoeventfd *b)
  182. {
  183. return !memory_region_ioeventfd_before(a, b)
  184. && !memory_region_ioeventfd_before(b, a);
  185. }
  186. /* Range of memory in the global map. Addresses are absolute. */
  187. struct FlatRange {
  188. MemoryRegion *mr;
  189. hwaddr offset_in_region;
  190. AddrRange addr;
  191. uint8_t dirty_log_mask;
  192. bool romd_mode;
  193. bool readonly;
  194. bool nonvolatile;
  195. };
  196. #define FOR_EACH_FLAT_RANGE(var, view) \
  197. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  198. static inline MemoryRegionSection
  199. section_from_flat_range(FlatRange *fr, FlatView *fv)
  200. {
  201. return (MemoryRegionSection) {
  202. .mr = fr->mr,
  203. .fv = fv,
  204. .offset_within_region = fr->offset_in_region,
  205. .size = fr->addr.size,
  206. .offset_within_address_space = int128_get64(fr->addr.start),
  207. .readonly = fr->readonly,
  208. .nonvolatile = fr->nonvolatile,
  209. };
  210. }
  211. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  212. {
  213. return a->mr == b->mr
  214. && addrrange_equal(a->addr, b->addr)
  215. && a->offset_in_region == b->offset_in_region
  216. && a->romd_mode == b->romd_mode
  217. && a->readonly == b->readonly
  218. && a->nonvolatile == b->nonvolatile;
  219. }
  220. static FlatView *flatview_new(MemoryRegion *mr_root)
  221. {
  222. FlatView *view;
  223. view = g_new0(FlatView, 1);
  224. view->ref = 1;
  225. view->root = mr_root;
  226. memory_region_ref(mr_root);
  227. trace_flatview_new(view, mr_root);
  228. return view;
  229. }
  230. /* Insert a range into a given position. Caller is responsible for maintaining
  231. * sorting order.
  232. */
  233. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  234. {
  235. if (view->nr == view->nr_allocated) {
  236. view->nr_allocated = MAX(2 * view->nr, 10);
  237. view->ranges = g_realloc(view->ranges,
  238. view->nr_allocated * sizeof(*view->ranges));
  239. }
  240. memmove(view->ranges + pos + 1, view->ranges + pos,
  241. (view->nr - pos) * sizeof(FlatRange));
  242. view->ranges[pos] = *range;
  243. memory_region_ref(range->mr);
  244. ++view->nr;
  245. }
  246. static void flatview_destroy(FlatView *view)
  247. {
  248. int i;
  249. trace_flatview_destroy(view, view->root);
  250. if (view->dispatch) {
  251. address_space_dispatch_free(view->dispatch);
  252. }
  253. for (i = 0; i < view->nr; i++) {
  254. memory_region_unref(view->ranges[i].mr);
  255. }
  256. g_free(view->ranges);
  257. memory_region_unref(view->root);
  258. g_free(view);
  259. }
  260. static bool flatview_ref(FlatView *view)
  261. {
  262. return atomic_fetch_inc_nonzero(&view->ref) > 0;
  263. }
  264. void flatview_unref(FlatView *view)
  265. {
  266. if (atomic_fetch_dec(&view->ref) == 1) {
  267. trace_flatview_destroy_rcu(view, view->root);
  268. assert(view->root);
  269. call_rcu(view, flatview_destroy, rcu);
  270. }
  271. }
  272. static bool can_merge(FlatRange *r1, FlatRange *r2)
  273. {
  274. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  275. && r1->mr == r2->mr
  276. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  277. r1->addr.size),
  278. int128_make64(r2->offset_in_region))
  279. && r1->dirty_log_mask == r2->dirty_log_mask
  280. && r1->romd_mode == r2->romd_mode
  281. && r1->readonly == r2->readonly
  282. && r1->nonvolatile == r2->nonvolatile;
  283. }
  284. /* Attempt to simplify a view by merging adjacent ranges */
  285. static void flatview_simplify(FlatView *view)
  286. {
  287. unsigned i, j, k;
  288. i = 0;
  289. while (i < view->nr) {
  290. j = i + 1;
  291. while (j < view->nr
  292. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  293. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  294. ++j;
  295. }
  296. ++i;
  297. for (k = i; k < j; k++) {
  298. memory_region_unref(view->ranges[k].mr);
  299. }
  300. memmove(&view->ranges[i], &view->ranges[j],
  301. (view->nr - j) * sizeof(view->ranges[j]));
  302. view->nr -= j - i;
  303. }
  304. }
  305. static bool memory_region_big_endian(MemoryRegion *mr)
  306. {
  307. #ifdef TARGET_WORDS_BIGENDIAN
  308. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  309. #else
  310. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  311. #endif
  312. }
  313. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, MemOp op)
  314. {
  315. if ((op & MO_BSWAP) != devend_memop(mr->ops->endianness)) {
  316. switch (op & MO_SIZE) {
  317. case MO_8:
  318. break;
  319. case MO_16:
  320. *data = bswap16(*data);
  321. break;
  322. case MO_32:
  323. *data = bswap32(*data);
  324. break;
  325. case MO_64:
  326. *data = bswap64(*data);
  327. break;
  328. default:
  329. g_assert_not_reached();
  330. }
  331. }
  332. }
  333. static inline void memory_region_shift_read_access(uint64_t *value,
  334. signed shift,
  335. uint64_t mask,
  336. uint64_t tmp)
  337. {
  338. if (shift >= 0) {
  339. *value |= (tmp & mask) << shift;
  340. } else {
  341. *value |= (tmp & mask) >> -shift;
  342. }
  343. }
  344. static inline uint64_t memory_region_shift_write_access(uint64_t *value,
  345. signed shift,
  346. uint64_t mask)
  347. {
  348. uint64_t tmp;
  349. if (shift >= 0) {
  350. tmp = (*value >> shift) & mask;
  351. } else {
  352. tmp = (*value << -shift) & mask;
  353. }
  354. return tmp;
  355. }
  356. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  357. {
  358. MemoryRegion *root;
  359. hwaddr abs_addr = offset;
  360. abs_addr += mr->addr;
  361. for (root = mr; root->container; ) {
  362. root = root->container;
  363. abs_addr += root->addr;
  364. }
  365. return abs_addr;
  366. }
  367. static int get_cpu_index(void)
  368. {
  369. if (current_cpu) {
  370. return current_cpu->cpu_index;
  371. }
  372. return -1;
  373. }
  374. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  375. hwaddr addr,
  376. uint64_t *value,
  377. unsigned size,
  378. signed shift,
  379. uint64_t mask,
  380. MemTxAttrs attrs)
  381. {
  382. uint64_t tmp;
  383. tmp = mr->ops->read(mr->opaque, addr, size);
  384. if (mr->subpage) {
  385. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  386. } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
  387. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  388. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  389. }
  390. memory_region_shift_read_access(value, shift, mask, tmp);
  391. return MEMTX_OK;
  392. }
  393. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  394. hwaddr addr,
  395. uint64_t *value,
  396. unsigned size,
  397. signed shift,
  398. uint64_t mask,
  399. MemTxAttrs attrs)
  400. {
  401. uint64_t tmp = 0;
  402. MemTxResult r;
  403. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  404. if (mr->subpage) {
  405. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  406. } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_READ)) {
  407. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  408. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  409. }
  410. memory_region_shift_read_access(value, shift, mask, tmp);
  411. return r;
  412. }
  413. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  414. hwaddr addr,
  415. uint64_t *value,
  416. unsigned size,
  417. signed shift,
  418. uint64_t mask,
  419. MemTxAttrs attrs)
  420. {
  421. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  422. if (mr->subpage) {
  423. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  424. } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
  425. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  426. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  427. }
  428. mr->ops->write(mr->opaque, addr, tmp, size);
  429. return MEMTX_OK;
  430. }
  431. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  432. hwaddr addr,
  433. uint64_t *value,
  434. unsigned size,
  435. signed shift,
  436. uint64_t mask,
  437. MemTxAttrs attrs)
  438. {
  439. uint64_t tmp = memory_region_shift_write_access(value, shift, mask);
  440. if (mr->subpage) {
  441. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  442. } else if (trace_event_get_state_backends(TRACE_MEMORY_REGION_OPS_WRITE)) {
  443. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  444. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  445. }
  446. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  447. }
  448. static MemTxResult access_with_adjusted_size(hwaddr addr,
  449. uint64_t *value,
  450. unsigned size,
  451. unsigned access_size_min,
  452. unsigned access_size_max,
  453. MemTxResult (*access_fn)
  454. (MemoryRegion *mr,
  455. hwaddr addr,
  456. uint64_t *value,
  457. unsigned size,
  458. signed shift,
  459. uint64_t mask,
  460. MemTxAttrs attrs),
  461. MemoryRegion *mr,
  462. MemTxAttrs attrs)
  463. {
  464. uint64_t access_mask;
  465. unsigned access_size;
  466. unsigned i;
  467. MemTxResult r = MEMTX_OK;
  468. if (!access_size_min) {
  469. access_size_min = 1;
  470. }
  471. if (!access_size_max) {
  472. access_size_max = 4;
  473. }
  474. /* FIXME: support unaligned access? */
  475. access_size = MAX(MIN(size, access_size_max), access_size_min);
  476. access_mask = MAKE_64BIT_MASK(0, access_size * 8);
  477. if (memory_region_big_endian(mr)) {
  478. for (i = 0; i < size; i += access_size) {
  479. r |= access_fn(mr, addr + i, value, access_size,
  480. (size - access_size - i) * 8, access_mask, attrs);
  481. }
  482. } else {
  483. for (i = 0; i < size; i += access_size) {
  484. r |= access_fn(mr, addr + i, value, access_size, i * 8,
  485. access_mask, attrs);
  486. }
  487. }
  488. return r;
  489. }
  490. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  491. {
  492. AddressSpace *as;
  493. while (mr->container) {
  494. mr = mr->container;
  495. }
  496. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  497. if (mr == as->root) {
  498. return as;
  499. }
  500. }
  501. return NULL;
  502. }
  503. /* Render a memory region into the global view. Ranges in @view obscure
  504. * ranges in @mr.
  505. */
  506. static void render_memory_region(FlatView *view,
  507. MemoryRegion *mr,
  508. Int128 base,
  509. AddrRange clip,
  510. bool readonly,
  511. bool nonvolatile)
  512. {
  513. MemoryRegion *subregion;
  514. unsigned i;
  515. hwaddr offset_in_region;
  516. Int128 remain;
  517. Int128 now;
  518. FlatRange fr;
  519. AddrRange tmp;
  520. if (!mr->enabled) {
  521. return;
  522. }
  523. int128_addto(&base, int128_make64(mr->addr));
  524. readonly |= mr->readonly;
  525. nonvolatile |= mr->nonvolatile;
  526. tmp = addrrange_make(base, mr->size);
  527. if (!addrrange_intersects(tmp, clip)) {
  528. return;
  529. }
  530. clip = addrrange_intersection(tmp, clip);
  531. if (mr->alias) {
  532. int128_subfrom(&base, int128_make64(mr->alias->addr));
  533. int128_subfrom(&base, int128_make64(mr->alias_offset));
  534. render_memory_region(view, mr->alias, base, clip,
  535. readonly, nonvolatile);
  536. return;
  537. }
  538. /* Render subregions in priority order. */
  539. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  540. render_memory_region(view, subregion, base, clip,
  541. readonly, nonvolatile);
  542. }
  543. if (!mr->terminates) {
  544. return;
  545. }
  546. offset_in_region = int128_get64(int128_sub(clip.start, base));
  547. base = clip.start;
  548. remain = clip.size;
  549. fr.mr = mr;
  550. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  551. fr.romd_mode = mr->romd_mode;
  552. fr.readonly = readonly;
  553. fr.nonvolatile = nonvolatile;
  554. /* Render the region itself into any gaps left by the current view. */
  555. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  556. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  557. continue;
  558. }
  559. if (int128_lt(base, view->ranges[i].addr.start)) {
  560. now = int128_min(remain,
  561. int128_sub(view->ranges[i].addr.start, base));
  562. fr.offset_in_region = offset_in_region;
  563. fr.addr = addrrange_make(base, now);
  564. flatview_insert(view, i, &fr);
  565. ++i;
  566. int128_addto(&base, now);
  567. offset_in_region += int128_get64(now);
  568. int128_subfrom(&remain, now);
  569. }
  570. now = int128_sub(int128_min(int128_add(base, remain),
  571. addrrange_end(view->ranges[i].addr)),
  572. base);
  573. int128_addto(&base, now);
  574. offset_in_region += int128_get64(now);
  575. int128_subfrom(&remain, now);
  576. }
  577. if (int128_nz(remain)) {
  578. fr.offset_in_region = offset_in_region;
  579. fr.addr = addrrange_make(base, remain);
  580. flatview_insert(view, i, &fr);
  581. }
  582. }
  583. static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
  584. {
  585. while (mr->enabled) {
  586. if (mr->alias) {
  587. if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
  588. /* The alias is included in its entirety. Use it as
  589. * the "real" root, so that we can share more FlatViews.
  590. */
  591. mr = mr->alias;
  592. continue;
  593. }
  594. } else if (!mr->terminates) {
  595. unsigned int found = 0;
  596. MemoryRegion *child, *next = NULL;
  597. QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
  598. if (child->enabled) {
  599. if (++found > 1) {
  600. next = NULL;
  601. break;
  602. }
  603. if (!child->addr && int128_ge(mr->size, child->size)) {
  604. /* A child is included in its entirety. If it's the only
  605. * enabled one, use it in the hope of finding an alias down the
  606. * way. This will also let us share FlatViews.
  607. */
  608. next = child;
  609. }
  610. }
  611. }
  612. if (found == 0) {
  613. return NULL;
  614. }
  615. if (next) {
  616. mr = next;
  617. continue;
  618. }
  619. }
  620. return mr;
  621. }
  622. return NULL;
  623. }
  624. /* Render a memory topology into a list of disjoint absolute ranges. */
  625. static FlatView *generate_memory_topology(MemoryRegion *mr)
  626. {
  627. int i;
  628. FlatView *view;
  629. view = flatview_new(mr);
  630. if (mr) {
  631. render_memory_region(view, mr, int128_zero(),
  632. addrrange_make(int128_zero(), int128_2_64()),
  633. false, false);
  634. }
  635. flatview_simplify(view);
  636. view->dispatch = address_space_dispatch_new(view);
  637. for (i = 0; i < view->nr; i++) {
  638. MemoryRegionSection mrs =
  639. section_from_flat_range(&view->ranges[i], view);
  640. flatview_add_to_dispatch(view, &mrs);
  641. }
  642. address_space_dispatch_compact(view->dispatch);
  643. g_hash_table_replace(flat_views, mr, view);
  644. return view;
  645. }
  646. static void address_space_add_del_ioeventfds(AddressSpace *as,
  647. MemoryRegionIoeventfd *fds_new,
  648. unsigned fds_new_nb,
  649. MemoryRegionIoeventfd *fds_old,
  650. unsigned fds_old_nb)
  651. {
  652. unsigned iold, inew;
  653. MemoryRegionIoeventfd *fd;
  654. MemoryRegionSection section;
  655. /* Generate a symmetric difference of the old and new fd sets, adding
  656. * and deleting as necessary.
  657. */
  658. iold = inew = 0;
  659. while (iold < fds_old_nb || inew < fds_new_nb) {
  660. if (iold < fds_old_nb
  661. && (inew == fds_new_nb
  662. || memory_region_ioeventfd_before(&fds_old[iold],
  663. &fds_new[inew]))) {
  664. fd = &fds_old[iold];
  665. section = (MemoryRegionSection) {
  666. .fv = address_space_to_flatview(as),
  667. .offset_within_address_space = int128_get64(fd->addr.start),
  668. .size = fd->addr.size,
  669. };
  670. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  671. fd->match_data, fd->data, fd->e);
  672. ++iold;
  673. } else if (inew < fds_new_nb
  674. && (iold == fds_old_nb
  675. || memory_region_ioeventfd_before(&fds_new[inew],
  676. &fds_old[iold]))) {
  677. fd = &fds_new[inew];
  678. section = (MemoryRegionSection) {
  679. .fv = address_space_to_flatview(as),
  680. .offset_within_address_space = int128_get64(fd->addr.start),
  681. .size = fd->addr.size,
  682. };
  683. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  684. fd->match_data, fd->data, fd->e);
  685. ++inew;
  686. } else {
  687. ++iold;
  688. ++inew;
  689. }
  690. }
  691. }
  692. FlatView *address_space_get_flatview(AddressSpace *as)
  693. {
  694. FlatView *view;
  695. RCU_READ_LOCK_GUARD();
  696. do {
  697. view = address_space_to_flatview(as);
  698. /* If somebody has replaced as->current_map concurrently,
  699. * flatview_ref returns false.
  700. */
  701. } while (!flatview_ref(view));
  702. return view;
  703. }
  704. static void address_space_update_ioeventfds(AddressSpace *as)
  705. {
  706. FlatView *view;
  707. FlatRange *fr;
  708. unsigned ioeventfd_nb = 0;
  709. unsigned ioeventfd_max;
  710. MemoryRegionIoeventfd *ioeventfds;
  711. AddrRange tmp;
  712. unsigned i;
  713. /*
  714. * It is likely that the number of ioeventfds hasn't changed much, so use
  715. * the previous size as the starting value, with some headroom to avoid
  716. * gratuitous reallocations.
  717. */
  718. ioeventfd_max = QEMU_ALIGN_UP(as->ioeventfd_nb, 4);
  719. ioeventfds = g_new(MemoryRegionIoeventfd, ioeventfd_max);
  720. view = address_space_get_flatview(as);
  721. FOR_EACH_FLAT_RANGE(fr, view) {
  722. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  723. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  724. int128_sub(fr->addr.start,
  725. int128_make64(fr->offset_in_region)));
  726. if (addrrange_intersects(fr->addr, tmp)) {
  727. ++ioeventfd_nb;
  728. if (ioeventfd_nb > ioeventfd_max) {
  729. ioeventfd_max = MAX(ioeventfd_max * 2, 4);
  730. ioeventfds = g_realloc(ioeventfds,
  731. ioeventfd_max * sizeof(*ioeventfds));
  732. }
  733. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  734. ioeventfds[ioeventfd_nb-1].addr = tmp;
  735. }
  736. }
  737. }
  738. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  739. as->ioeventfds, as->ioeventfd_nb);
  740. g_free(as->ioeventfds);
  741. as->ioeventfds = ioeventfds;
  742. as->ioeventfd_nb = ioeventfd_nb;
  743. flatview_unref(view);
  744. }
  745. /*
  746. * Notify the memory listeners about the coalesced IO change events of
  747. * range `cmr'. Only the part that has intersection of the specified
  748. * FlatRange will be sent.
  749. */
  750. static void flat_range_coalesced_io_notify(FlatRange *fr, AddressSpace *as,
  751. CoalescedMemoryRange *cmr, bool add)
  752. {
  753. AddrRange tmp;
  754. tmp = addrrange_shift(cmr->addr,
  755. int128_sub(fr->addr.start,
  756. int128_make64(fr->offset_in_region)));
  757. if (!addrrange_intersects(tmp, fr->addr)) {
  758. return;
  759. }
  760. tmp = addrrange_intersection(tmp, fr->addr);
  761. if (add) {
  762. MEMORY_LISTENER_UPDATE_REGION(fr, as, Forward, coalesced_io_add,
  763. int128_get64(tmp.start),
  764. int128_get64(tmp.size));
  765. } else {
  766. MEMORY_LISTENER_UPDATE_REGION(fr, as, Reverse, coalesced_io_del,
  767. int128_get64(tmp.start),
  768. int128_get64(tmp.size));
  769. }
  770. }
  771. static void flat_range_coalesced_io_del(FlatRange *fr, AddressSpace *as)
  772. {
  773. CoalescedMemoryRange *cmr;
  774. QTAILQ_FOREACH(cmr, &fr->mr->coalesced, link) {
  775. flat_range_coalesced_io_notify(fr, as, cmr, false);
  776. }
  777. }
  778. static void flat_range_coalesced_io_add(FlatRange *fr, AddressSpace *as)
  779. {
  780. MemoryRegion *mr = fr->mr;
  781. CoalescedMemoryRange *cmr;
  782. if (QTAILQ_EMPTY(&mr->coalesced)) {
  783. return;
  784. }
  785. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  786. flat_range_coalesced_io_notify(fr, as, cmr, true);
  787. }
  788. }
  789. static void address_space_update_topology_pass(AddressSpace *as,
  790. const FlatView *old_view,
  791. const FlatView *new_view,
  792. bool adding)
  793. {
  794. unsigned iold, inew;
  795. FlatRange *frold, *frnew;
  796. /* Generate a symmetric difference of the old and new memory maps.
  797. * Kill ranges in the old map, and instantiate ranges in the new map.
  798. */
  799. iold = inew = 0;
  800. while (iold < old_view->nr || inew < new_view->nr) {
  801. if (iold < old_view->nr) {
  802. frold = &old_view->ranges[iold];
  803. } else {
  804. frold = NULL;
  805. }
  806. if (inew < new_view->nr) {
  807. frnew = &new_view->ranges[inew];
  808. } else {
  809. frnew = NULL;
  810. }
  811. if (frold
  812. && (!frnew
  813. || int128_lt(frold->addr.start, frnew->addr.start)
  814. || (int128_eq(frold->addr.start, frnew->addr.start)
  815. && !flatrange_equal(frold, frnew)))) {
  816. /* In old but not in new, or in both but attributes changed. */
  817. if (!adding) {
  818. flat_range_coalesced_io_del(frold, as);
  819. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  820. }
  821. ++iold;
  822. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  823. /* In both and unchanged (except logging may have changed) */
  824. if (adding) {
  825. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  826. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  827. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  828. frold->dirty_log_mask,
  829. frnew->dirty_log_mask);
  830. }
  831. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  832. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  833. frold->dirty_log_mask,
  834. frnew->dirty_log_mask);
  835. }
  836. }
  837. ++iold;
  838. ++inew;
  839. } else {
  840. /* In new */
  841. if (adding) {
  842. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  843. flat_range_coalesced_io_add(frnew, as);
  844. }
  845. ++inew;
  846. }
  847. }
  848. }
  849. static void flatviews_init(void)
  850. {
  851. static FlatView *empty_view;
  852. if (flat_views) {
  853. return;
  854. }
  855. flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
  856. (GDestroyNotify) flatview_unref);
  857. if (!empty_view) {
  858. empty_view = generate_memory_topology(NULL);
  859. /* We keep it alive forever in the global variable. */
  860. flatview_ref(empty_view);
  861. } else {
  862. g_hash_table_replace(flat_views, NULL, empty_view);
  863. flatview_ref(empty_view);
  864. }
  865. }
  866. static void flatviews_reset(void)
  867. {
  868. AddressSpace *as;
  869. if (flat_views) {
  870. g_hash_table_unref(flat_views);
  871. flat_views = NULL;
  872. }
  873. flatviews_init();
  874. /* Render unique FVs */
  875. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  876. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  877. if (g_hash_table_lookup(flat_views, physmr)) {
  878. continue;
  879. }
  880. generate_memory_topology(physmr);
  881. }
  882. }
  883. static void address_space_set_flatview(AddressSpace *as)
  884. {
  885. FlatView *old_view = address_space_to_flatview(as);
  886. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  887. FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
  888. assert(new_view);
  889. if (old_view == new_view) {
  890. return;
  891. }
  892. if (old_view) {
  893. flatview_ref(old_view);
  894. }
  895. flatview_ref(new_view);
  896. if (!QTAILQ_EMPTY(&as->listeners)) {
  897. FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
  898. if (!old_view2) {
  899. old_view2 = &tmpview;
  900. }
  901. address_space_update_topology_pass(as, old_view2, new_view, false);
  902. address_space_update_topology_pass(as, old_view2, new_view, true);
  903. }
  904. /* Writes are protected by the BQL. */
  905. atomic_rcu_set(&as->current_map, new_view);
  906. if (old_view) {
  907. flatview_unref(old_view);
  908. }
  909. /* Note that all the old MemoryRegions are still alive up to this
  910. * point. This relieves most MemoryListeners from the need to
  911. * ref/unref the MemoryRegions they get---unless they use them
  912. * outside the iothread mutex, in which case precise reference
  913. * counting is necessary.
  914. */
  915. if (old_view) {
  916. flatview_unref(old_view);
  917. }
  918. }
  919. static void address_space_update_topology(AddressSpace *as)
  920. {
  921. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  922. flatviews_init();
  923. if (!g_hash_table_lookup(flat_views, physmr)) {
  924. generate_memory_topology(physmr);
  925. }
  926. address_space_set_flatview(as);
  927. }
  928. void memory_region_transaction_begin(void)
  929. {
  930. qemu_flush_coalesced_mmio_buffer();
  931. ++memory_region_transaction_depth;
  932. }
  933. void memory_region_transaction_commit(void)
  934. {
  935. AddressSpace *as;
  936. assert(memory_region_transaction_depth);
  937. assert(qemu_mutex_iothread_locked());
  938. --memory_region_transaction_depth;
  939. if (!memory_region_transaction_depth) {
  940. if (memory_region_update_pending) {
  941. flatviews_reset();
  942. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  943. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  944. address_space_set_flatview(as);
  945. address_space_update_ioeventfds(as);
  946. }
  947. memory_region_update_pending = false;
  948. ioeventfd_update_pending = false;
  949. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  950. } else if (ioeventfd_update_pending) {
  951. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  952. address_space_update_ioeventfds(as);
  953. }
  954. ioeventfd_update_pending = false;
  955. }
  956. }
  957. }
  958. static void memory_region_destructor_none(MemoryRegion *mr)
  959. {
  960. }
  961. static void memory_region_destructor_ram(MemoryRegion *mr)
  962. {
  963. qemu_ram_free(mr->ram_block);
  964. }
  965. static bool memory_region_need_escape(char c)
  966. {
  967. return c == '/' || c == '[' || c == '\\' || c == ']';
  968. }
  969. static char *memory_region_escape_name(const char *name)
  970. {
  971. const char *p;
  972. char *escaped, *q;
  973. uint8_t c;
  974. size_t bytes = 0;
  975. for (p = name; *p; p++) {
  976. bytes += memory_region_need_escape(*p) ? 4 : 1;
  977. }
  978. if (bytes == p - name) {
  979. return g_memdup(name, bytes + 1);
  980. }
  981. escaped = g_malloc(bytes + 1);
  982. for (p = name, q = escaped; *p; p++) {
  983. c = *p;
  984. if (unlikely(memory_region_need_escape(c))) {
  985. *q++ = '\\';
  986. *q++ = 'x';
  987. *q++ = "0123456789abcdef"[c >> 4];
  988. c = "0123456789abcdef"[c & 15];
  989. }
  990. *q++ = c;
  991. }
  992. *q = 0;
  993. return escaped;
  994. }
  995. static void memory_region_do_init(MemoryRegion *mr,
  996. Object *owner,
  997. const char *name,
  998. uint64_t size)
  999. {
  1000. mr->size = int128_make64(size);
  1001. if (size == UINT64_MAX) {
  1002. mr->size = int128_2_64();
  1003. }
  1004. mr->name = g_strdup(name);
  1005. mr->owner = owner;
  1006. mr->ram_block = NULL;
  1007. if (name) {
  1008. char *escaped_name = memory_region_escape_name(name);
  1009. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  1010. if (!owner) {
  1011. owner = container_get(qdev_get_machine(), "/unattached");
  1012. }
  1013. object_property_add_child(owner, name_array, OBJECT(mr));
  1014. object_unref(OBJECT(mr));
  1015. g_free(name_array);
  1016. g_free(escaped_name);
  1017. }
  1018. }
  1019. void memory_region_init(MemoryRegion *mr,
  1020. Object *owner,
  1021. const char *name,
  1022. uint64_t size)
  1023. {
  1024. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  1025. memory_region_do_init(mr, owner, name, size);
  1026. }
  1027. static void memory_region_get_container(Object *obj, Visitor *v,
  1028. const char *name, void *opaque,
  1029. Error **errp)
  1030. {
  1031. MemoryRegion *mr = MEMORY_REGION(obj);
  1032. char *path = (char *)"";
  1033. if (mr->container) {
  1034. path = object_get_canonical_path(OBJECT(mr->container));
  1035. }
  1036. visit_type_str(v, name, &path, errp);
  1037. if (mr->container) {
  1038. g_free(path);
  1039. }
  1040. }
  1041. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  1042. const char *part)
  1043. {
  1044. MemoryRegion *mr = MEMORY_REGION(obj);
  1045. return OBJECT(mr->container);
  1046. }
  1047. static void memory_region_get_priority(Object *obj, Visitor *v,
  1048. const char *name, void *opaque,
  1049. Error **errp)
  1050. {
  1051. MemoryRegion *mr = MEMORY_REGION(obj);
  1052. int32_t value = mr->priority;
  1053. visit_type_int32(v, name, &value, errp);
  1054. }
  1055. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  1056. void *opaque, Error **errp)
  1057. {
  1058. MemoryRegion *mr = MEMORY_REGION(obj);
  1059. uint64_t value = memory_region_size(mr);
  1060. visit_type_uint64(v, name, &value, errp);
  1061. }
  1062. static void memory_region_initfn(Object *obj)
  1063. {
  1064. MemoryRegion *mr = MEMORY_REGION(obj);
  1065. ObjectProperty *op;
  1066. mr->ops = &unassigned_mem_ops;
  1067. mr->enabled = true;
  1068. mr->romd_mode = true;
  1069. mr->global_locking = true;
  1070. mr->destructor = memory_region_destructor_none;
  1071. QTAILQ_INIT(&mr->subregions);
  1072. QTAILQ_INIT(&mr->coalesced);
  1073. op = object_property_add(OBJECT(mr), "container",
  1074. "link<" TYPE_MEMORY_REGION ">",
  1075. memory_region_get_container,
  1076. NULL, /* memory_region_set_container */
  1077. NULL, NULL);
  1078. op->resolve = memory_region_resolve_container;
  1079. object_property_add_uint64_ptr(OBJECT(mr), "addr",
  1080. &mr->addr, OBJ_PROP_FLAG_READ);
  1081. object_property_add(OBJECT(mr), "priority", "uint32",
  1082. memory_region_get_priority,
  1083. NULL, /* memory_region_set_priority */
  1084. NULL, NULL);
  1085. object_property_add(OBJECT(mr), "size", "uint64",
  1086. memory_region_get_size,
  1087. NULL, /* memory_region_set_size, */
  1088. NULL, NULL);
  1089. }
  1090. static void iommu_memory_region_initfn(Object *obj)
  1091. {
  1092. MemoryRegion *mr = MEMORY_REGION(obj);
  1093. mr->is_iommu = true;
  1094. }
  1095. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  1096. unsigned size)
  1097. {
  1098. #ifdef DEBUG_UNASSIGNED
  1099. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  1100. #endif
  1101. return 0;
  1102. }
  1103. static void unassigned_mem_write(void *opaque, hwaddr addr,
  1104. uint64_t val, unsigned size)
  1105. {
  1106. #ifdef DEBUG_UNASSIGNED
  1107. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  1108. #endif
  1109. }
  1110. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  1111. unsigned size, bool is_write,
  1112. MemTxAttrs attrs)
  1113. {
  1114. return false;
  1115. }
  1116. const MemoryRegionOps unassigned_mem_ops = {
  1117. .valid.accepts = unassigned_mem_accepts,
  1118. .endianness = DEVICE_NATIVE_ENDIAN,
  1119. };
  1120. static uint64_t memory_region_ram_device_read(void *opaque,
  1121. hwaddr addr, unsigned size)
  1122. {
  1123. MemoryRegion *mr = opaque;
  1124. uint64_t data = (uint64_t)~0;
  1125. switch (size) {
  1126. case 1:
  1127. data = *(uint8_t *)(mr->ram_block->host + addr);
  1128. break;
  1129. case 2:
  1130. data = *(uint16_t *)(mr->ram_block->host + addr);
  1131. break;
  1132. case 4:
  1133. data = *(uint32_t *)(mr->ram_block->host + addr);
  1134. break;
  1135. case 8:
  1136. data = *(uint64_t *)(mr->ram_block->host + addr);
  1137. break;
  1138. }
  1139. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1140. return data;
  1141. }
  1142. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1143. uint64_t data, unsigned size)
  1144. {
  1145. MemoryRegion *mr = opaque;
  1146. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1147. switch (size) {
  1148. case 1:
  1149. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1150. break;
  1151. case 2:
  1152. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1153. break;
  1154. case 4:
  1155. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1156. break;
  1157. case 8:
  1158. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1159. break;
  1160. }
  1161. }
  1162. static const MemoryRegionOps ram_device_mem_ops = {
  1163. .read = memory_region_ram_device_read,
  1164. .write = memory_region_ram_device_write,
  1165. .endianness = DEVICE_HOST_ENDIAN,
  1166. .valid = {
  1167. .min_access_size = 1,
  1168. .max_access_size = 8,
  1169. .unaligned = true,
  1170. },
  1171. .impl = {
  1172. .min_access_size = 1,
  1173. .max_access_size = 8,
  1174. .unaligned = true,
  1175. },
  1176. };
  1177. bool memory_region_access_valid(MemoryRegion *mr,
  1178. hwaddr addr,
  1179. unsigned size,
  1180. bool is_write,
  1181. MemTxAttrs attrs)
  1182. {
  1183. int access_size_min, access_size_max;
  1184. int access_size, i;
  1185. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1186. return false;
  1187. }
  1188. if (!mr->ops->valid.accepts) {
  1189. return true;
  1190. }
  1191. access_size_min = mr->ops->valid.min_access_size;
  1192. if (!mr->ops->valid.min_access_size) {
  1193. access_size_min = 1;
  1194. }
  1195. access_size_max = mr->ops->valid.max_access_size;
  1196. if (!mr->ops->valid.max_access_size) {
  1197. access_size_max = 4;
  1198. }
  1199. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1200. for (i = 0; i < size; i += access_size) {
  1201. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1202. is_write, attrs)) {
  1203. return false;
  1204. }
  1205. }
  1206. return true;
  1207. }
  1208. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1209. hwaddr addr,
  1210. uint64_t *pval,
  1211. unsigned size,
  1212. MemTxAttrs attrs)
  1213. {
  1214. *pval = 0;
  1215. if (mr->ops->read) {
  1216. return access_with_adjusted_size(addr, pval, size,
  1217. mr->ops->impl.min_access_size,
  1218. mr->ops->impl.max_access_size,
  1219. memory_region_read_accessor,
  1220. mr, attrs);
  1221. } else {
  1222. return access_with_adjusted_size(addr, pval, size,
  1223. mr->ops->impl.min_access_size,
  1224. mr->ops->impl.max_access_size,
  1225. memory_region_read_with_attrs_accessor,
  1226. mr, attrs);
  1227. }
  1228. }
  1229. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1230. hwaddr addr,
  1231. uint64_t *pval,
  1232. MemOp op,
  1233. MemTxAttrs attrs)
  1234. {
  1235. unsigned size = memop_size(op);
  1236. MemTxResult r;
  1237. if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
  1238. *pval = unassigned_mem_read(mr, addr, size);
  1239. return MEMTX_DECODE_ERROR;
  1240. }
  1241. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1242. adjust_endianness(mr, pval, op);
  1243. return r;
  1244. }
  1245. /* Return true if an eventfd was signalled */
  1246. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1247. hwaddr addr,
  1248. uint64_t data,
  1249. unsigned size,
  1250. MemTxAttrs attrs)
  1251. {
  1252. MemoryRegionIoeventfd ioeventfd = {
  1253. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1254. .data = data,
  1255. };
  1256. unsigned i;
  1257. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1258. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1259. ioeventfd.e = mr->ioeventfds[i].e;
  1260. if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
  1261. event_notifier_set(ioeventfd.e);
  1262. return true;
  1263. }
  1264. }
  1265. return false;
  1266. }
  1267. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1268. hwaddr addr,
  1269. uint64_t data,
  1270. MemOp op,
  1271. MemTxAttrs attrs)
  1272. {
  1273. unsigned size = memop_size(op);
  1274. if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
  1275. unassigned_mem_write(mr, addr, data, size);
  1276. return MEMTX_DECODE_ERROR;
  1277. }
  1278. adjust_endianness(mr, &data, op);
  1279. if ((!kvm_eventfds_enabled()) &&
  1280. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1281. return MEMTX_OK;
  1282. }
  1283. if (mr->ops->write) {
  1284. return access_with_adjusted_size(addr, &data, size,
  1285. mr->ops->impl.min_access_size,
  1286. mr->ops->impl.max_access_size,
  1287. memory_region_write_accessor, mr,
  1288. attrs);
  1289. } else {
  1290. return
  1291. access_with_adjusted_size(addr, &data, size,
  1292. mr->ops->impl.min_access_size,
  1293. mr->ops->impl.max_access_size,
  1294. memory_region_write_with_attrs_accessor,
  1295. mr, attrs);
  1296. }
  1297. }
  1298. void memory_region_init_io(MemoryRegion *mr,
  1299. Object *owner,
  1300. const MemoryRegionOps *ops,
  1301. void *opaque,
  1302. const char *name,
  1303. uint64_t size)
  1304. {
  1305. memory_region_init(mr, owner, name, size);
  1306. mr->ops = ops ? ops : &unassigned_mem_ops;
  1307. mr->opaque = opaque;
  1308. mr->terminates = true;
  1309. }
  1310. void memory_region_init_ram_nomigrate(MemoryRegion *mr,
  1311. Object *owner,
  1312. const char *name,
  1313. uint64_t size,
  1314. Error **errp)
  1315. {
  1316. memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
  1317. }
  1318. void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
  1319. Object *owner,
  1320. const char *name,
  1321. uint64_t size,
  1322. bool share,
  1323. Error **errp)
  1324. {
  1325. Error *err = NULL;
  1326. memory_region_init(mr, owner, name, size);
  1327. mr->ram = true;
  1328. mr->terminates = true;
  1329. mr->destructor = memory_region_destructor_ram;
  1330. mr->ram_block = qemu_ram_alloc(size, share, mr, &err);
  1331. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1332. if (err) {
  1333. mr->size = int128_zero();
  1334. object_unparent(OBJECT(mr));
  1335. error_propagate(errp, err);
  1336. }
  1337. }
  1338. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1339. Object *owner,
  1340. const char *name,
  1341. uint64_t size,
  1342. uint64_t max_size,
  1343. void (*resized)(const char*,
  1344. uint64_t length,
  1345. void *host),
  1346. Error **errp)
  1347. {
  1348. Error *err = NULL;
  1349. memory_region_init(mr, owner, name, size);
  1350. mr->ram = true;
  1351. mr->terminates = true;
  1352. mr->destructor = memory_region_destructor_ram;
  1353. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1354. mr, &err);
  1355. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1356. if (err) {
  1357. mr->size = int128_zero();
  1358. object_unparent(OBJECT(mr));
  1359. error_propagate(errp, err);
  1360. }
  1361. }
  1362. #ifdef CONFIG_POSIX
  1363. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1364. struct Object *owner,
  1365. const char *name,
  1366. uint64_t size,
  1367. uint64_t align,
  1368. uint32_t ram_flags,
  1369. const char *path,
  1370. Error **errp)
  1371. {
  1372. Error *err = NULL;
  1373. memory_region_init(mr, owner, name, size);
  1374. mr->ram = true;
  1375. mr->terminates = true;
  1376. mr->destructor = memory_region_destructor_ram;
  1377. mr->align = align;
  1378. mr->ram_block = qemu_ram_alloc_from_file(size, mr, ram_flags, path, &err);
  1379. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1380. if (err) {
  1381. mr->size = int128_zero();
  1382. object_unparent(OBJECT(mr));
  1383. error_propagate(errp, err);
  1384. }
  1385. }
  1386. void memory_region_init_ram_from_fd(MemoryRegion *mr,
  1387. struct Object *owner,
  1388. const char *name,
  1389. uint64_t size,
  1390. bool share,
  1391. int fd,
  1392. Error **errp)
  1393. {
  1394. Error *err = NULL;
  1395. memory_region_init(mr, owner, name, size);
  1396. mr->ram = true;
  1397. mr->terminates = true;
  1398. mr->destructor = memory_region_destructor_ram;
  1399. mr->ram_block = qemu_ram_alloc_from_fd(size, mr,
  1400. share ? RAM_SHARED : 0,
  1401. fd, &err);
  1402. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1403. if (err) {
  1404. mr->size = int128_zero();
  1405. object_unparent(OBJECT(mr));
  1406. error_propagate(errp, err);
  1407. }
  1408. }
  1409. #endif
  1410. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1411. Object *owner,
  1412. const char *name,
  1413. uint64_t size,
  1414. void *ptr)
  1415. {
  1416. memory_region_init(mr, owner, name, size);
  1417. mr->ram = true;
  1418. mr->terminates = true;
  1419. mr->destructor = memory_region_destructor_ram;
  1420. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1421. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1422. assert(ptr != NULL);
  1423. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1424. }
  1425. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1426. Object *owner,
  1427. const char *name,
  1428. uint64_t size,
  1429. void *ptr)
  1430. {
  1431. memory_region_init(mr, owner, name, size);
  1432. mr->ram = true;
  1433. mr->terminates = true;
  1434. mr->ram_device = true;
  1435. mr->ops = &ram_device_mem_ops;
  1436. mr->opaque = mr;
  1437. mr->destructor = memory_region_destructor_ram;
  1438. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1439. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1440. assert(ptr != NULL);
  1441. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1442. }
  1443. void memory_region_init_alias(MemoryRegion *mr,
  1444. Object *owner,
  1445. const char *name,
  1446. MemoryRegion *orig,
  1447. hwaddr offset,
  1448. uint64_t size)
  1449. {
  1450. memory_region_init(mr, owner, name, size);
  1451. mr->alias = orig;
  1452. mr->alias_offset = offset;
  1453. }
  1454. void memory_region_init_rom_nomigrate(MemoryRegion *mr,
  1455. struct Object *owner,
  1456. const char *name,
  1457. uint64_t size,
  1458. Error **errp)
  1459. {
  1460. memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
  1461. mr->readonly = true;
  1462. }
  1463. void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
  1464. Object *owner,
  1465. const MemoryRegionOps *ops,
  1466. void *opaque,
  1467. const char *name,
  1468. uint64_t size,
  1469. Error **errp)
  1470. {
  1471. Error *err = NULL;
  1472. assert(ops);
  1473. memory_region_init(mr, owner, name, size);
  1474. mr->ops = ops;
  1475. mr->opaque = opaque;
  1476. mr->terminates = true;
  1477. mr->rom_device = true;
  1478. mr->destructor = memory_region_destructor_ram;
  1479. mr->ram_block = qemu_ram_alloc(size, false, mr, &err);
  1480. if (err) {
  1481. mr->size = int128_zero();
  1482. object_unparent(OBJECT(mr));
  1483. error_propagate(errp, err);
  1484. }
  1485. }
  1486. void memory_region_init_iommu(void *_iommu_mr,
  1487. size_t instance_size,
  1488. const char *mrtypename,
  1489. Object *owner,
  1490. const char *name,
  1491. uint64_t size)
  1492. {
  1493. struct IOMMUMemoryRegion *iommu_mr;
  1494. struct MemoryRegion *mr;
  1495. object_initialize(_iommu_mr, instance_size, mrtypename);
  1496. mr = MEMORY_REGION(_iommu_mr);
  1497. memory_region_do_init(mr, owner, name, size);
  1498. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1499. mr->terminates = true; /* then re-forwards */
  1500. QLIST_INIT(&iommu_mr->iommu_notify);
  1501. iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1502. }
  1503. static void memory_region_finalize(Object *obj)
  1504. {
  1505. MemoryRegion *mr = MEMORY_REGION(obj);
  1506. assert(!mr->container);
  1507. /* We know the region is not visible in any address space (it
  1508. * does not have a container and cannot be a root either because
  1509. * it has no references, so we can blindly clear mr->enabled.
  1510. * memory_region_set_enabled instead could trigger a transaction
  1511. * and cause an infinite loop.
  1512. */
  1513. mr->enabled = false;
  1514. memory_region_transaction_begin();
  1515. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1516. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1517. memory_region_del_subregion(mr, subregion);
  1518. }
  1519. memory_region_transaction_commit();
  1520. mr->destructor(mr);
  1521. memory_region_clear_coalescing(mr);
  1522. g_free((char *)mr->name);
  1523. g_free(mr->ioeventfds);
  1524. }
  1525. Object *memory_region_owner(MemoryRegion *mr)
  1526. {
  1527. Object *obj = OBJECT(mr);
  1528. return obj->parent;
  1529. }
  1530. void memory_region_ref(MemoryRegion *mr)
  1531. {
  1532. /* MMIO callbacks most likely will access data that belongs
  1533. * to the owner, hence the need to ref/unref the owner whenever
  1534. * the memory region is in use.
  1535. *
  1536. * The memory region is a child of its owner. As long as the
  1537. * owner doesn't call unparent itself on the memory region,
  1538. * ref-ing the owner will also keep the memory region alive.
  1539. * Memory regions without an owner are supposed to never go away;
  1540. * we do not ref/unref them because it slows down DMA sensibly.
  1541. */
  1542. if (mr && mr->owner) {
  1543. object_ref(mr->owner);
  1544. }
  1545. }
  1546. void memory_region_unref(MemoryRegion *mr)
  1547. {
  1548. if (mr && mr->owner) {
  1549. object_unref(mr->owner);
  1550. }
  1551. }
  1552. uint64_t memory_region_size(MemoryRegion *mr)
  1553. {
  1554. if (int128_eq(mr->size, int128_2_64())) {
  1555. return UINT64_MAX;
  1556. }
  1557. return int128_get64(mr->size);
  1558. }
  1559. const char *memory_region_name(const MemoryRegion *mr)
  1560. {
  1561. if (!mr->name) {
  1562. ((MemoryRegion *)mr)->name =
  1563. object_get_canonical_path_component(OBJECT(mr));
  1564. }
  1565. return mr->name;
  1566. }
  1567. bool memory_region_is_ram_device(MemoryRegion *mr)
  1568. {
  1569. return mr->ram_device;
  1570. }
  1571. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1572. {
  1573. uint8_t mask = mr->dirty_log_mask;
  1574. if (global_dirty_log && mr->ram_block) {
  1575. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1576. }
  1577. return mask;
  1578. }
  1579. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1580. {
  1581. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1582. }
  1583. static int memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr,
  1584. Error **errp)
  1585. {
  1586. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1587. IOMMUNotifier *iommu_notifier;
  1588. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1589. int ret = 0;
  1590. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1591. flags |= iommu_notifier->notifier_flags;
  1592. }
  1593. if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
  1594. ret = imrc->notify_flag_changed(iommu_mr,
  1595. iommu_mr->iommu_notify_flags,
  1596. flags, errp);
  1597. }
  1598. if (!ret) {
  1599. iommu_mr->iommu_notify_flags = flags;
  1600. }
  1601. return ret;
  1602. }
  1603. int memory_region_register_iommu_notifier(MemoryRegion *mr,
  1604. IOMMUNotifier *n, Error **errp)
  1605. {
  1606. IOMMUMemoryRegion *iommu_mr;
  1607. int ret;
  1608. if (mr->alias) {
  1609. return memory_region_register_iommu_notifier(mr->alias, n, errp);
  1610. }
  1611. /* We need to register for at least one bitfield */
  1612. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1613. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1614. assert(n->start <= n->end);
  1615. assert(n->iommu_idx >= 0 &&
  1616. n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
  1617. QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
  1618. ret = memory_region_update_iommu_notify_flags(iommu_mr, errp);
  1619. if (ret) {
  1620. QLIST_REMOVE(n, node);
  1621. }
  1622. return ret;
  1623. }
  1624. uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
  1625. {
  1626. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1627. if (imrc->get_min_page_size) {
  1628. return imrc->get_min_page_size(iommu_mr);
  1629. }
  1630. return TARGET_PAGE_SIZE;
  1631. }
  1632. void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
  1633. {
  1634. MemoryRegion *mr = MEMORY_REGION(iommu_mr);
  1635. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1636. hwaddr addr, granularity;
  1637. IOMMUTLBEntry iotlb;
  1638. /* If the IOMMU has its own replay callback, override */
  1639. if (imrc->replay) {
  1640. imrc->replay(iommu_mr, n);
  1641. return;
  1642. }
  1643. granularity = memory_region_iommu_get_min_page_size(iommu_mr);
  1644. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1645. iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
  1646. if (iotlb.perm != IOMMU_NONE) {
  1647. n->notify(n, &iotlb);
  1648. }
  1649. /* if (2^64 - MR size) < granularity, it's possible to get an
  1650. * infinite loop here. This should catch such a wraparound */
  1651. if ((addr + granularity) < addr) {
  1652. break;
  1653. }
  1654. }
  1655. }
  1656. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1657. IOMMUNotifier *n)
  1658. {
  1659. IOMMUMemoryRegion *iommu_mr;
  1660. if (mr->alias) {
  1661. memory_region_unregister_iommu_notifier(mr->alias, n);
  1662. return;
  1663. }
  1664. QLIST_REMOVE(n, node);
  1665. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1666. memory_region_update_iommu_notify_flags(iommu_mr, NULL);
  1667. }
  1668. void memory_region_notify_one(IOMMUNotifier *notifier,
  1669. IOMMUTLBEntry *entry)
  1670. {
  1671. IOMMUNotifierFlag request_flags;
  1672. hwaddr entry_end = entry->iova + entry->addr_mask;
  1673. /*
  1674. * Skip the notification if the notification does not overlap
  1675. * with registered range.
  1676. */
  1677. if (notifier->start > entry_end || notifier->end < entry->iova) {
  1678. return;
  1679. }
  1680. assert(entry->iova >= notifier->start && entry_end <= notifier->end);
  1681. if (entry->perm & IOMMU_RW) {
  1682. request_flags = IOMMU_NOTIFIER_MAP;
  1683. } else {
  1684. request_flags = IOMMU_NOTIFIER_UNMAP;
  1685. }
  1686. if (notifier->notifier_flags & request_flags) {
  1687. notifier->notify(notifier, entry);
  1688. }
  1689. }
  1690. void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
  1691. int iommu_idx,
  1692. IOMMUTLBEntry entry)
  1693. {
  1694. IOMMUNotifier *iommu_notifier;
  1695. assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
  1696. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1697. if (iommu_notifier->iommu_idx == iommu_idx) {
  1698. memory_region_notify_one(iommu_notifier, &entry);
  1699. }
  1700. }
  1701. }
  1702. int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
  1703. enum IOMMUMemoryRegionAttr attr,
  1704. void *data)
  1705. {
  1706. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1707. if (!imrc->get_attr) {
  1708. return -EINVAL;
  1709. }
  1710. return imrc->get_attr(iommu_mr, attr, data);
  1711. }
  1712. int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
  1713. MemTxAttrs attrs)
  1714. {
  1715. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1716. if (!imrc->attrs_to_index) {
  1717. return 0;
  1718. }
  1719. return imrc->attrs_to_index(iommu_mr, attrs);
  1720. }
  1721. int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
  1722. {
  1723. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1724. if (!imrc->num_indexes) {
  1725. return 1;
  1726. }
  1727. return imrc->num_indexes(iommu_mr);
  1728. }
  1729. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1730. {
  1731. uint8_t mask = 1 << client;
  1732. uint8_t old_logging;
  1733. assert(client == DIRTY_MEMORY_VGA);
  1734. old_logging = mr->vga_logging_count;
  1735. mr->vga_logging_count += log ? 1 : -1;
  1736. if (!!old_logging == !!mr->vga_logging_count) {
  1737. return;
  1738. }
  1739. memory_region_transaction_begin();
  1740. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1741. memory_region_update_pending |= mr->enabled;
  1742. memory_region_transaction_commit();
  1743. }
  1744. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1745. hwaddr size)
  1746. {
  1747. assert(mr->ram_block);
  1748. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1749. size,
  1750. memory_region_get_dirty_log_mask(mr));
  1751. }
  1752. static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1753. {
  1754. MemoryListener *listener;
  1755. AddressSpace *as;
  1756. FlatView *view;
  1757. FlatRange *fr;
  1758. /* If the same address space has multiple log_sync listeners, we
  1759. * visit that address space's FlatView multiple times. But because
  1760. * log_sync listeners are rare, it's still cheaper than walking each
  1761. * address space once.
  1762. */
  1763. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1764. if (!listener->log_sync) {
  1765. continue;
  1766. }
  1767. as = listener->address_space;
  1768. view = address_space_get_flatview(as);
  1769. FOR_EACH_FLAT_RANGE(fr, view) {
  1770. if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
  1771. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  1772. listener->log_sync(listener, &mrs);
  1773. }
  1774. }
  1775. flatview_unref(view);
  1776. }
  1777. }
  1778. void memory_region_clear_dirty_bitmap(MemoryRegion *mr, hwaddr start,
  1779. hwaddr len)
  1780. {
  1781. MemoryRegionSection mrs;
  1782. MemoryListener *listener;
  1783. AddressSpace *as;
  1784. FlatView *view;
  1785. FlatRange *fr;
  1786. hwaddr sec_start, sec_end, sec_size;
  1787. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1788. if (!listener->log_clear) {
  1789. continue;
  1790. }
  1791. as = listener->address_space;
  1792. view = address_space_get_flatview(as);
  1793. FOR_EACH_FLAT_RANGE(fr, view) {
  1794. if (!fr->dirty_log_mask || fr->mr != mr) {
  1795. /*
  1796. * Clear dirty bitmap operation only applies to those
  1797. * regions whose dirty logging is at least enabled
  1798. */
  1799. continue;
  1800. }
  1801. mrs = section_from_flat_range(fr, view);
  1802. sec_start = MAX(mrs.offset_within_region, start);
  1803. sec_end = mrs.offset_within_region + int128_get64(mrs.size);
  1804. sec_end = MIN(sec_end, start + len);
  1805. if (sec_start >= sec_end) {
  1806. /*
  1807. * If this memory region section has no intersection
  1808. * with the requested range, skip.
  1809. */
  1810. continue;
  1811. }
  1812. /* Valid case; shrink the section if needed */
  1813. mrs.offset_within_address_space +=
  1814. sec_start - mrs.offset_within_region;
  1815. mrs.offset_within_region = sec_start;
  1816. sec_size = sec_end - sec_start;
  1817. mrs.size = int128_make64(sec_size);
  1818. listener->log_clear(listener, &mrs);
  1819. }
  1820. flatview_unref(view);
  1821. }
  1822. }
  1823. DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
  1824. hwaddr addr,
  1825. hwaddr size,
  1826. unsigned client)
  1827. {
  1828. DirtyBitmapSnapshot *snapshot;
  1829. assert(mr->ram_block);
  1830. memory_region_sync_dirty_bitmap(mr);
  1831. snapshot = cpu_physical_memory_snapshot_and_clear_dirty(mr, addr, size, client);
  1832. memory_global_after_dirty_log_sync();
  1833. return snapshot;
  1834. }
  1835. bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
  1836. hwaddr addr, hwaddr size)
  1837. {
  1838. assert(mr->ram_block);
  1839. return cpu_physical_memory_snapshot_get_dirty(snap,
  1840. memory_region_get_ram_addr(mr) + addr, size);
  1841. }
  1842. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1843. {
  1844. if (mr->readonly != readonly) {
  1845. memory_region_transaction_begin();
  1846. mr->readonly = readonly;
  1847. memory_region_update_pending |= mr->enabled;
  1848. memory_region_transaction_commit();
  1849. }
  1850. }
  1851. void memory_region_set_nonvolatile(MemoryRegion *mr, bool nonvolatile)
  1852. {
  1853. if (mr->nonvolatile != nonvolatile) {
  1854. memory_region_transaction_begin();
  1855. mr->nonvolatile = nonvolatile;
  1856. memory_region_update_pending |= mr->enabled;
  1857. memory_region_transaction_commit();
  1858. }
  1859. }
  1860. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1861. {
  1862. if (mr->romd_mode != romd_mode) {
  1863. memory_region_transaction_begin();
  1864. mr->romd_mode = romd_mode;
  1865. memory_region_update_pending |= mr->enabled;
  1866. memory_region_transaction_commit();
  1867. }
  1868. }
  1869. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1870. hwaddr size, unsigned client)
  1871. {
  1872. assert(mr->ram_block);
  1873. cpu_physical_memory_test_and_clear_dirty(
  1874. memory_region_get_ram_addr(mr) + addr, size, client);
  1875. }
  1876. int memory_region_get_fd(MemoryRegion *mr)
  1877. {
  1878. int fd;
  1879. RCU_READ_LOCK_GUARD();
  1880. while (mr->alias) {
  1881. mr = mr->alias;
  1882. }
  1883. fd = mr->ram_block->fd;
  1884. return fd;
  1885. }
  1886. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1887. {
  1888. void *ptr;
  1889. uint64_t offset = 0;
  1890. RCU_READ_LOCK_GUARD();
  1891. while (mr->alias) {
  1892. offset += mr->alias_offset;
  1893. mr = mr->alias;
  1894. }
  1895. assert(mr->ram_block);
  1896. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1897. return ptr;
  1898. }
  1899. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1900. {
  1901. RAMBlock *block;
  1902. block = qemu_ram_block_from_host(ptr, false, offset);
  1903. if (!block) {
  1904. return NULL;
  1905. }
  1906. return block->mr;
  1907. }
  1908. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1909. {
  1910. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1911. }
  1912. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1913. {
  1914. assert(mr->ram_block);
  1915. qemu_ram_resize(mr->ram_block, newsize, errp);
  1916. }
  1917. void memory_region_do_writeback(MemoryRegion *mr, hwaddr addr, hwaddr size)
  1918. {
  1919. /*
  1920. * Might be extended case needed to cover
  1921. * different types of memory regions
  1922. */
  1923. if (mr->ram_block && mr->dirty_log_mask) {
  1924. qemu_ram_writeback(mr->ram_block, addr, size);
  1925. }
  1926. }
  1927. /*
  1928. * Call proper memory listeners about the change on the newly
  1929. * added/removed CoalescedMemoryRange.
  1930. */
  1931. static void memory_region_update_coalesced_range(MemoryRegion *mr,
  1932. CoalescedMemoryRange *cmr,
  1933. bool add)
  1934. {
  1935. AddressSpace *as;
  1936. FlatView *view;
  1937. FlatRange *fr;
  1938. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1939. view = address_space_get_flatview(as);
  1940. FOR_EACH_FLAT_RANGE(fr, view) {
  1941. if (fr->mr == mr) {
  1942. flat_range_coalesced_io_notify(fr, as, cmr, add);
  1943. }
  1944. }
  1945. flatview_unref(view);
  1946. }
  1947. }
  1948. void memory_region_set_coalescing(MemoryRegion *mr)
  1949. {
  1950. memory_region_clear_coalescing(mr);
  1951. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1952. }
  1953. void memory_region_add_coalescing(MemoryRegion *mr,
  1954. hwaddr offset,
  1955. uint64_t size)
  1956. {
  1957. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1958. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1959. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1960. memory_region_update_coalesced_range(mr, cmr, true);
  1961. memory_region_set_flush_coalesced(mr);
  1962. }
  1963. void memory_region_clear_coalescing(MemoryRegion *mr)
  1964. {
  1965. CoalescedMemoryRange *cmr;
  1966. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1967. return;
  1968. }
  1969. qemu_flush_coalesced_mmio_buffer();
  1970. mr->flush_coalesced_mmio = false;
  1971. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1972. cmr = QTAILQ_FIRST(&mr->coalesced);
  1973. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1974. memory_region_update_coalesced_range(mr, cmr, false);
  1975. g_free(cmr);
  1976. }
  1977. }
  1978. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1979. {
  1980. mr->flush_coalesced_mmio = true;
  1981. }
  1982. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  1983. {
  1984. qemu_flush_coalesced_mmio_buffer();
  1985. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1986. mr->flush_coalesced_mmio = false;
  1987. }
  1988. }
  1989. void memory_region_clear_global_locking(MemoryRegion *mr)
  1990. {
  1991. mr->global_locking = false;
  1992. }
  1993. static bool userspace_eventfd_warning;
  1994. void memory_region_add_eventfd(MemoryRegion *mr,
  1995. hwaddr addr,
  1996. unsigned size,
  1997. bool match_data,
  1998. uint64_t data,
  1999. EventNotifier *e)
  2000. {
  2001. MemoryRegionIoeventfd mrfd = {
  2002. .addr.start = int128_make64(addr),
  2003. .addr.size = int128_make64(size),
  2004. .match_data = match_data,
  2005. .data = data,
  2006. .e = e,
  2007. };
  2008. unsigned i;
  2009. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  2010. userspace_eventfd_warning))) {
  2011. userspace_eventfd_warning = true;
  2012. error_report("Using eventfd without MMIO binding in KVM. "
  2013. "Suboptimal performance expected");
  2014. }
  2015. if (size) {
  2016. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2017. }
  2018. memory_region_transaction_begin();
  2019. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2020. if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
  2021. break;
  2022. }
  2023. }
  2024. ++mr->ioeventfd_nb;
  2025. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2026. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  2027. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  2028. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  2029. mr->ioeventfds[i] = mrfd;
  2030. ioeventfd_update_pending |= mr->enabled;
  2031. memory_region_transaction_commit();
  2032. }
  2033. void memory_region_del_eventfd(MemoryRegion *mr,
  2034. hwaddr addr,
  2035. unsigned size,
  2036. bool match_data,
  2037. uint64_t data,
  2038. EventNotifier *e)
  2039. {
  2040. MemoryRegionIoeventfd mrfd = {
  2041. .addr.start = int128_make64(addr),
  2042. .addr.size = int128_make64(size),
  2043. .match_data = match_data,
  2044. .data = data,
  2045. .e = e,
  2046. };
  2047. unsigned i;
  2048. if (size) {
  2049. adjust_endianness(mr, &mrfd.data, size_memop(size) | MO_TE);
  2050. }
  2051. memory_region_transaction_begin();
  2052. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  2053. if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
  2054. break;
  2055. }
  2056. }
  2057. assert(i != mr->ioeventfd_nb);
  2058. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  2059. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  2060. --mr->ioeventfd_nb;
  2061. mr->ioeventfds = g_realloc(mr->ioeventfds,
  2062. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  2063. ioeventfd_update_pending |= mr->enabled;
  2064. memory_region_transaction_commit();
  2065. }
  2066. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  2067. {
  2068. MemoryRegion *mr = subregion->container;
  2069. MemoryRegion *other;
  2070. memory_region_transaction_begin();
  2071. memory_region_ref(subregion);
  2072. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  2073. if (subregion->priority >= other->priority) {
  2074. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  2075. goto done;
  2076. }
  2077. }
  2078. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  2079. done:
  2080. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2081. memory_region_transaction_commit();
  2082. }
  2083. static void memory_region_add_subregion_common(MemoryRegion *mr,
  2084. hwaddr offset,
  2085. MemoryRegion *subregion)
  2086. {
  2087. assert(!subregion->container);
  2088. subregion->container = mr;
  2089. subregion->addr = offset;
  2090. memory_region_update_container_subregions(subregion);
  2091. }
  2092. void memory_region_add_subregion(MemoryRegion *mr,
  2093. hwaddr offset,
  2094. MemoryRegion *subregion)
  2095. {
  2096. subregion->priority = 0;
  2097. memory_region_add_subregion_common(mr, offset, subregion);
  2098. }
  2099. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  2100. hwaddr offset,
  2101. MemoryRegion *subregion,
  2102. int priority)
  2103. {
  2104. subregion->priority = priority;
  2105. memory_region_add_subregion_common(mr, offset, subregion);
  2106. }
  2107. void memory_region_del_subregion(MemoryRegion *mr,
  2108. MemoryRegion *subregion)
  2109. {
  2110. memory_region_transaction_begin();
  2111. assert(subregion->container == mr);
  2112. subregion->container = NULL;
  2113. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  2114. memory_region_unref(subregion);
  2115. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2116. memory_region_transaction_commit();
  2117. }
  2118. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  2119. {
  2120. if (enabled == mr->enabled) {
  2121. return;
  2122. }
  2123. memory_region_transaction_begin();
  2124. mr->enabled = enabled;
  2125. memory_region_update_pending = true;
  2126. memory_region_transaction_commit();
  2127. }
  2128. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  2129. {
  2130. Int128 s = int128_make64(size);
  2131. if (size == UINT64_MAX) {
  2132. s = int128_2_64();
  2133. }
  2134. if (int128_eq(s, mr->size)) {
  2135. return;
  2136. }
  2137. memory_region_transaction_begin();
  2138. mr->size = s;
  2139. memory_region_update_pending = true;
  2140. memory_region_transaction_commit();
  2141. }
  2142. static void memory_region_readd_subregion(MemoryRegion *mr)
  2143. {
  2144. MemoryRegion *container = mr->container;
  2145. if (container) {
  2146. memory_region_transaction_begin();
  2147. memory_region_ref(mr);
  2148. memory_region_del_subregion(container, mr);
  2149. mr->container = container;
  2150. memory_region_update_container_subregions(mr);
  2151. memory_region_unref(mr);
  2152. memory_region_transaction_commit();
  2153. }
  2154. }
  2155. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  2156. {
  2157. if (addr != mr->addr) {
  2158. mr->addr = addr;
  2159. memory_region_readd_subregion(mr);
  2160. }
  2161. }
  2162. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  2163. {
  2164. assert(mr->alias);
  2165. if (offset == mr->alias_offset) {
  2166. return;
  2167. }
  2168. memory_region_transaction_begin();
  2169. mr->alias_offset = offset;
  2170. memory_region_update_pending |= mr->enabled;
  2171. memory_region_transaction_commit();
  2172. }
  2173. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  2174. {
  2175. return mr->align;
  2176. }
  2177. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  2178. {
  2179. const AddrRange *addr = addr_;
  2180. const FlatRange *fr = fr_;
  2181. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  2182. return -1;
  2183. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  2184. return 1;
  2185. }
  2186. return 0;
  2187. }
  2188. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  2189. {
  2190. return bsearch(&addr, view->ranges, view->nr,
  2191. sizeof(FlatRange), cmp_flatrange_addr);
  2192. }
  2193. bool memory_region_is_mapped(MemoryRegion *mr)
  2194. {
  2195. return mr->container ? true : false;
  2196. }
  2197. /* Same as memory_region_find, but it does not add a reference to the
  2198. * returned region. It must be called from an RCU critical section.
  2199. */
  2200. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  2201. hwaddr addr, uint64_t size)
  2202. {
  2203. MemoryRegionSection ret = { .mr = NULL };
  2204. MemoryRegion *root;
  2205. AddressSpace *as;
  2206. AddrRange range;
  2207. FlatView *view;
  2208. FlatRange *fr;
  2209. addr += mr->addr;
  2210. for (root = mr; root->container; ) {
  2211. root = root->container;
  2212. addr += root->addr;
  2213. }
  2214. as = memory_region_to_address_space(root);
  2215. if (!as) {
  2216. return ret;
  2217. }
  2218. range = addrrange_make(int128_make64(addr), int128_make64(size));
  2219. view = address_space_to_flatview(as);
  2220. fr = flatview_lookup(view, range);
  2221. if (!fr) {
  2222. return ret;
  2223. }
  2224. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  2225. --fr;
  2226. }
  2227. ret.mr = fr->mr;
  2228. ret.fv = view;
  2229. range = addrrange_intersection(range, fr->addr);
  2230. ret.offset_within_region = fr->offset_in_region;
  2231. ret.offset_within_region += int128_get64(int128_sub(range.start,
  2232. fr->addr.start));
  2233. ret.size = range.size;
  2234. ret.offset_within_address_space = int128_get64(range.start);
  2235. ret.readonly = fr->readonly;
  2236. ret.nonvolatile = fr->nonvolatile;
  2237. return ret;
  2238. }
  2239. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  2240. hwaddr addr, uint64_t size)
  2241. {
  2242. MemoryRegionSection ret;
  2243. RCU_READ_LOCK_GUARD();
  2244. ret = memory_region_find_rcu(mr, addr, size);
  2245. if (ret.mr) {
  2246. memory_region_ref(ret.mr);
  2247. }
  2248. return ret;
  2249. }
  2250. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  2251. {
  2252. MemoryRegion *mr;
  2253. RCU_READ_LOCK_GUARD();
  2254. mr = memory_region_find_rcu(container, addr, 1).mr;
  2255. return mr && mr != container;
  2256. }
  2257. void memory_global_dirty_log_sync(void)
  2258. {
  2259. memory_region_sync_dirty_bitmap(NULL);
  2260. }
  2261. void memory_global_after_dirty_log_sync(void)
  2262. {
  2263. MEMORY_LISTENER_CALL_GLOBAL(log_global_after_sync, Forward);
  2264. }
  2265. static VMChangeStateEntry *vmstate_change;
  2266. void memory_global_dirty_log_start(void)
  2267. {
  2268. if (vmstate_change) {
  2269. qemu_del_vm_change_state_handler(vmstate_change);
  2270. vmstate_change = NULL;
  2271. }
  2272. global_dirty_log = true;
  2273. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  2274. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2275. memory_region_transaction_begin();
  2276. memory_region_update_pending = true;
  2277. memory_region_transaction_commit();
  2278. }
  2279. static void memory_global_dirty_log_do_stop(void)
  2280. {
  2281. global_dirty_log = false;
  2282. /* Refresh DIRTY_MEMORY_MIGRATION bit. */
  2283. memory_region_transaction_begin();
  2284. memory_region_update_pending = true;
  2285. memory_region_transaction_commit();
  2286. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2287. }
  2288. static void memory_vm_change_state_handler(void *opaque, int running,
  2289. RunState state)
  2290. {
  2291. if (running) {
  2292. memory_global_dirty_log_do_stop();
  2293. if (vmstate_change) {
  2294. qemu_del_vm_change_state_handler(vmstate_change);
  2295. vmstate_change = NULL;
  2296. }
  2297. }
  2298. }
  2299. void memory_global_dirty_log_stop(void)
  2300. {
  2301. if (!runstate_is_running()) {
  2302. if (vmstate_change) {
  2303. return;
  2304. }
  2305. vmstate_change = qemu_add_vm_change_state_handler(
  2306. memory_vm_change_state_handler, NULL);
  2307. return;
  2308. }
  2309. memory_global_dirty_log_do_stop();
  2310. }
  2311. static void listener_add_address_space(MemoryListener *listener,
  2312. AddressSpace *as)
  2313. {
  2314. FlatView *view;
  2315. FlatRange *fr;
  2316. if (listener->begin) {
  2317. listener->begin(listener);
  2318. }
  2319. if (global_dirty_log) {
  2320. if (listener->log_global_start) {
  2321. listener->log_global_start(listener);
  2322. }
  2323. }
  2324. view = address_space_get_flatview(as);
  2325. FOR_EACH_FLAT_RANGE(fr, view) {
  2326. MemoryRegionSection section = section_from_flat_range(fr, view);
  2327. if (listener->region_add) {
  2328. listener->region_add(listener, &section);
  2329. }
  2330. if (fr->dirty_log_mask && listener->log_start) {
  2331. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2332. }
  2333. }
  2334. if (listener->commit) {
  2335. listener->commit(listener);
  2336. }
  2337. flatview_unref(view);
  2338. }
  2339. static void listener_del_address_space(MemoryListener *listener,
  2340. AddressSpace *as)
  2341. {
  2342. FlatView *view;
  2343. FlatRange *fr;
  2344. if (listener->begin) {
  2345. listener->begin(listener);
  2346. }
  2347. view = address_space_get_flatview(as);
  2348. FOR_EACH_FLAT_RANGE(fr, view) {
  2349. MemoryRegionSection section = section_from_flat_range(fr, view);
  2350. if (fr->dirty_log_mask && listener->log_stop) {
  2351. listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
  2352. }
  2353. if (listener->region_del) {
  2354. listener->region_del(listener, &section);
  2355. }
  2356. }
  2357. if (listener->commit) {
  2358. listener->commit(listener);
  2359. }
  2360. flatview_unref(view);
  2361. }
  2362. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2363. {
  2364. MemoryListener *other = NULL;
  2365. listener->address_space = as;
  2366. if (QTAILQ_EMPTY(&memory_listeners)
  2367. || listener->priority >= QTAILQ_LAST(&memory_listeners)->priority) {
  2368. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2369. } else {
  2370. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2371. if (listener->priority < other->priority) {
  2372. break;
  2373. }
  2374. }
  2375. QTAILQ_INSERT_BEFORE(other, listener, link);
  2376. }
  2377. if (QTAILQ_EMPTY(&as->listeners)
  2378. || listener->priority >= QTAILQ_LAST(&as->listeners)->priority) {
  2379. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2380. } else {
  2381. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2382. if (listener->priority < other->priority) {
  2383. break;
  2384. }
  2385. }
  2386. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2387. }
  2388. listener_add_address_space(listener, as);
  2389. }
  2390. void memory_listener_unregister(MemoryListener *listener)
  2391. {
  2392. if (!listener->address_space) {
  2393. return;
  2394. }
  2395. listener_del_address_space(listener, listener->address_space);
  2396. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2397. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2398. listener->address_space = NULL;
  2399. }
  2400. void address_space_remove_listeners(AddressSpace *as)
  2401. {
  2402. while (!QTAILQ_EMPTY(&as->listeners)) {
  2403. memory_listener_unregister(QTAILQ_FIRST(&as->listeners));
  2404. }
  2405. }
  2406. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2407. {
  2408. memory_region_ref(root);
  2409. as->root = root;
  2410. as->current_map = NULL;
  2411. as->ioeventfd_nb = 0;
  2412. as->ioeventfds = NULL;
  2413. QTAILQ_INIT(&as->listeners);
  2414. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2415. as->name = g_strdup(name ? name : "anonymous");
  2416. address_space_update_topology(as);
  2417. address_space_update_ioeventfds(as);
  2418. }
  2419. static void do_address_space_destroy(AddressSpace *as)
  2420. {
  2421. assert(QTAILQ_EMPTY(&as->listeners));
  2422. flatview_unref(as->current_map);
  2423. g_free(as->name);
  2424. g_free(as->ioeventfds);
  2425. memory_region_unref(as->root);
  2426. }
  2427. void address_space_destroy(AddressSpace *as)
  2428. {
  2429. MemoryRegion *root = as->root;
  2430. /* Flush out anything from MemoryListeners listening in on this */
  2431. memory_region_transaction_begin();
  2432. as->root = NULL;
  2433. memory_region_transaction_commit();
  2434. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2435. /* At this point, as->dispatch and as->current_map are dummy
  2436. * entries that the guest should never use. Wait for the old
  2437. * values to expire before freeing the data.
  2438. */
  2439. as->root = root;
  2440. call_rcu(as, do_address_space_destroy, rcu);
  2441. }
  2442. static const char *memory_region_type(MemoryRegion *mr)
  2443. {
  2444. if (mr->alias) {
  2445. return memory_region_type(mr->alias);
  2446. }
  2447. if (memory_region_is_ram_device(mr)) {
  2448. return "ramd";
  2449. } else if (memory_region_is_romd(mr)) {
  2450. return "romd";
  2451. } else if (memory_region_is_rom(mr)) {
  2452. return "rom";
  2453. } else if (memory_region_is_ram(mr)) {
  2454. return "ram";
  2455. } else {
  2456. return "i/o";
  2457. }
  2458. }
  2459. typedef struct MemoryRegionList MemoryRegionList;
  2460. struct MemoryRegionList {
  2461. const MemoryRegion *mr;
  2462. QTAILQ_ENTRY(MemoryRegionList) mrqueue;
  2463. };
  2464. typedef QTAILQ_HEAD(, MemoryRegionList) MemoryRegionListHead;
  2465. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2466. int128_sub((size), int128_one())) : 0)
  2467. #define MTREE_INDENT " "
  2468. static void mtree_expand_owner(const char *label, Object *obj)
  2469. {
  2470. DeviceState *dev = (DeviceState *) object_dynamic_cast(obj, TYPE_DEVICE);
  2471. qemu_printf(" %s:{%s", label, dev ? "dev" : "obj");
  2472. if (dev && dev->id) {
  2473. qemu_printf(" id=%s", dev->id);
  2474. } else {
  2475. char *canonical_path = object_get_canonical_path(obj);
  2476. if (canonical_path) {
  2477. qemu_printf(" path=%s", canonical_path);
  2478. g_free(canonical_path);
  2479. } else {
  2480. qemu_printf(" type=%s", object_get_typename(obj));
  2481. }
  2482. }
  2483. qemu_printf("}");
  2484. }
  2485. static void mtree_print_mr_owner(const MemoryRegion *mr)
  2486. {
  2487. Object *owner = mr->owner;
  2488. Object *parent = memory_region_owner((MemoryRegion *)mr);
  2489. if (!owner && !parent) {
  2490. qemu_printf(" orphan");
  2491. return;
  2492. }
  2493. if (owner) {
  2494. mtree_expand_owner("owner", owner);
  2495. }
  2496. if (parent && parent != owner) {
  2497. mtree_expand_owner("parent", parent);
  2498. }
  2499. }
  2500. static void mtree_print_mr(const MemoryRegion *mr, unsigned int level,
  2501. hwaddr base,
  2502. MemoryRegionListHead *alias_print_queue,
  2503. bool owner)
  2504. {
  2505. MemoryRegionList *new_ml, *ml, *next_ml;
  2506. MemoryRegionListHead submr_print_queue;
  2507. const MemoryRegion *submr;
  2508. unsigned int i;
  2509. hwaddr cur_start, cur_end;
  2510. if (!mr) {
  2511. return;
  2512. }
  2513. for (i = 0; i < level; i++) {
  2514. qemu_printf(MTREE_INDENT);
  2515. }
  2516. cur_start = base + mr->addr;
  2517. cur_end = cur_start + MR_SIZE(mr->size);
  2518. /*
  2519. * Try to detect overflow of memory region. This should never
  2520. * happen normally. When it happens, we dump something to warn the
  2521. * user who is observing this.
  2522. */
  2523. if (cur_start < base || cur_end < cur_start) {
  2524. qemu_printf("[DETECTED OVERFLOW!] ");
  2525. }
  2526. if (mr->alias) {
  2527. MemoryRegionList *ml;
  2528. bool found = false;
  2529. /* check if the alias is already in the queue */
  2530. QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
  2531. if (ml->mr == mr->alias) {
  2532. found = true;
  2533. }
  2534. }
  2535. if (!found) {
  2536. ml = g_new(MemoryRegionList, 1);
  2537. ml->mr = mr->alias;
  2538. QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
  2539. }
  2540. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2541. " (prio %d, %s%s): alias %s @%s " TARGET_FMT_plx
  2542. "-" TARGET_FMT_plx "%s",
  2543. cur_start, cur_end,
  2544. mr->priority,
  2545. mr->nonvolatile ? "nv-" : "",
  2546. memory_region_type((MemoryRegion *)mr),
  2547. memory_region_name(mr),
  2548. memory_region_name(mr->alias),
  2549. mr->alias_offset,
  2550. mr->alias_offset + MR_SIZE(mr->size),
  2551. mr->enabled ? "" : " [disabled]");
  2552. if (owner) {
  2553. mtree_print_mr_owner(mr);
  2554. }
  2555. } else {
  2556. qemu_printf(TARGET_FMT_plx "-" TARGET_FMT_plx
  2557. " (prio %d, %s%s): %s%s",
  2558. cur_start, cur_end,
  2559. mr->priority,
  2560. mr->nonvolatile ? "nv-" : "",
  2561. memory_region_type((MemoryRegion *)mr),
  2562. memory_region_name(mr),
  2563. mr->enabled ? "" : " [disabled]");
  2564. if (owner) {
  2565. mtree_print_mr_owner(mr);
  2566. }
  2567. }
  2568. qemu_printf("\n");
  2569. QTAILQ_INIT(&submr_print_queue);
  2570. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2571. new_ml = g_new(MemoryRegionList, 1);
  2572. new_ml->mr = submr;
  2573. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2574. if (new_ml->mr->addr < ml->mr->addr ||
  2575. (new_ml->mr->addr == ml->mr->addr &&
  2576. new_ml->mr->priority > ml->mr->priority)) {
  2577. QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
  2578. new_ml = NULL;
  2579. break;
  2580. }
  2581. }
  2582. if (new_ml) {
  2583. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
  2584. }
  2585. }
  2586. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2587. mtree_print_mr(ml->mr, level + 1, cur_start,
  2588. alias_print_queue, owner);
  2589. }
  2590. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
  2591. g_free(ml);
  2592. }
  2593. }
  2594. struct FlatViewInfo {
  2595. int counter;
  2596. bool dispatch_tree;
  2597. bool owner;
  2598. AccelClass *ac;
  2599. };
  2600. static void mtree_print_flatview(gpointer key, gpointer value,
  2601. gpointer user_data)
  2602. {
  2603. FlatView *view = key;
  2604. GArray *fv_address_spaces = value;
  2605. struct FlatViewInfo *fvi = user_data;
  2606. FlatRange *range = &view->ranges[0];
  2607. MemoryRegion *mr;
  2608. int n = view->nr;
  2609. int i;
  2610. AddressSpace *as;
  2611. qemu_printf("FlatView #%d\n", fvi->counter);
  2612. ++fvi->counter;
  2613. for (i = 0; i < fv_address_spaces->len; ++i) {
  2614. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2615. qemu_printf(" AS \"%s\", root: %s",
  2616. as->name, memory_region_name(as->root));
  2617. if (as->root->alias) {
  2618. qemu_printf(", alias %s", memory_region_name(as->root->alias));
  2619. }
  2620. qemu_printf("\n");
  2621. }
  2622. qemu_printf(" Root memory region: %s\n",
  2623. view->root ? memory_region_name(view->root) : "(none)");
  2624. if (n <= 0) {
  2625. qemu_printf(MTREE_INDENT "No rendered FlatView\n\n");
  2626. return;
  2627. }
  2628. while (n--) {
  2629. mr = range->mr;
  2630. if (range->offset_in_region) {
  2631. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2632. " (prio %d, %s%s): %s @" TARGET_FMT_plx,
  2633. int128_get64(range->addr.start),
  2634. int128_get64(range->addr.start)
  2635. + MR_SIZE(range->addr.size),
  2636. mr->priority,
  2637. range->nonvolatile ? "nv-" : "",
  2638. range->readonly ? "rom" : memory_region_type(mr),
  2639. memory_region_name(mr),
  2640. range->offset_in_region);
  2641. } else {
  2642. qemu_printf(MTREE_INDENT TARGET_FMT_plx "-" TARGET_FMT_plx
  2643. " (prio %d, %s%s): %s",
  2644. int128_get64(range->addr.start),
  2645. int128_get64(range->addr.start)
  2646. + MR_SIZE(range->addr.size),
  2647. mr->priority,
  2648. range->nonvolatile ? "nv-" : "",
  2649. range->readonly ? "rom" : memory_region_type(mr),
  2650. memory_region_name(mr));
  2651. }
  2652. if (fvi->owner) {
  2653. mtree_print_mr_owner(mr);
  2654. }
  2655. if (fvi->ac) {
  2656. for (i = 0; i < fv_address_spaces->len; ++i) {
  2657. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2658. if (fvi->ac->has_memory(current_machine, as,
  2659. int128_get64(range->addr.start),
  2660. MR_SIZE(range->addr.size) + 1)) {
  2661. qemu_printf(" %s", fvi->ac->name);
  2662. }
  2663. }
  2664. }
  2665. qemu_printf("\n");
  2666. range++;
  2667. }
  2668. #if !defined(CONFIG_USER_ONLY)
  2669. if (fvi->dispatch_tree && view->root) {
  2670. mtree_print_dispatch(view->dispatch, view->root);
  2671. }
  2672. #endif
  2673. qemu_printf("\n");
  2674. }
  2675. static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
  2676. gpointer user_data)
  2677. {
  2678. FlatView *view = key;
  2679. GArray *fv_address_spaces = value;
  2680. g_array_unref(fv_address_spaces);
  2681. flatview_unref(view);
  2682. return true;
  2683. }
  2684. void mtree_info(bool flatview, bool dispatch_tree, bool owner)
  2685. {
  2686. MemoryRegionListHead ml_head;
  2687. MemoryRegionList *ml, *ml2;
  2688. AddressSpace *as;
  2689. if (flatview) {
  2690. FlatView *view;
  2691. struct FlatViewInfo fvi = {
  2692. .counter = 0,
  2693. .dispatch_tree = dispatch_tree,
  2694. .owner = owner,
  2695. };
  2696. GArray *fv_address_spaces;
  2697. GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
  2698. AccelClass *ac = ACCEL_GET_CLASS(current_accel());
  2699. if (ac->has_memory) {
  2700. fvi.ac = ac;
  2701. }
  2702. /* Gather all FVs in one table */
  2703. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2704. view = address_space_get_flatview(as);
  2705. fv_address_spaces = g_hash_table_lookup(views, view);
  2706. if (!fv_address_spaces) {
  2707. fv_address_spaces = g_array_new(false, false, sizeof(as));
  2708. g_hash_table_insert(views, view, fv_address_spaces);
  2709. }
  2710. g_array_append_val(fv_address_spaces, as);
  2711. }
  2712. /* Print */
  2713. g_hash_table_foreach(views, mtree_print_flatview, &fvi);
  2714. /* Free */
  2715. g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
  2716. g_hash_table_unref(views);
  2717. return;
  2718. }
  2719. QTAILQ_INIT(&ml_head);
  2720. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2721. qemu_printf("address-space: %s\n", as->name);
  2722. mtree_print_mr(as->root, 1, 0, &ml_head, owner);
  2723. qemu_printf("\n");
  2724. }
  2725. /* print aliased regions */
  2726. QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
  2727. qemu_printf("memory-region: %s\n", memory_region_name(ml->mr));
  2728. mtree_print_mr(ml->mr, 1, 0, &ml_head, owner);
  2729. qemu_printf("\n");
  2730. }
  2731. QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
  2732. g_free(ml);
  2733. }
  2734. }
  2735. void memory_region_init_ram(MemoryRegion *mr,
  2736. struct Object *owner,
  2737. const char *name,
  2738. uint64_t size,
  2739. Error **errp)
  2740. {
  2741. DeviceState *owner_dev;
  2742. Error *err = NULL;
  2743. memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
  2744. if (err) {
  2745. error_propagate(errp, err);
  2746. return;
  2747. }
  2748. /* This will assert if owner is neither NULL nor a DeviceState.
  2749. * We only want the owner here for the purposes of defining a
  2750. * unique name for migration. TODO: Ideally we should implement
  2751. * a naming scheme for Objects which are not DeviceStates, in
  2752. * which case we can relax this restriction.
  2753. */
  2754. owner_dev = DEVICE(owner);
  2755. vmstate_register_ram(mr, owner_dev);
  2756. }
  2757. void memory_region_init_rom(MemoryRegion *mr,
  2758. struct Object *owner,
  2759. const char *name,
  2760. uint64_t size,
  2761. Error **errp)
  2762. {
  2763. DeviceState *owner_dev;
  2764. Error *err = NULL;
  2765. memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
  2766. if (err) {
  2767. error_propagate(errp, err);
  2768. return;
  2769. }
  2770. /* This will assert if owner is neither NULL nor a DeviceState.
  2771. * We only want the owner here for the purposes of defining a
  2772. * unique name for migration. TODO: Ideally we should implement
  2773. * a naming scheme for Objects which are not DeviceStates, in
  2774. * which case we can relax this restriction.
  2775. */
  2776. owner_dev = DEVICE(owner);
  2777. vmstate_register_ram(mr, owner_dev);
  2778. }
  2779. void memory_region_init_rom_device(MemoryRegion *mr,
  2780. struct Object *owner,
  2781. const MemoryRegionOps *ops,
  2782. void *opaque,
  2783. const char *name,
  2784. uint64_t size,
  2785. Error **errp)
  2786. {
  2787. DeviceState *owner_dev;
  2788. Error *err = NULL;
  2789. memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
  2790. name, size, &err);
  2791. if (err) {
  2792. error_propagate(errp, err);
  2793. return;
  2794. }
  2795. /* This will assert if owner is neither NULL nor a DeviceState.
  2796. * We only want the owner here for the purposes of defining a
  2797. * unique name for migration. TODO: Ideally we should implement
  2798. * a naming scheme for Objects which are not DeviceStates, in
  2799. * which case we can relax this restriction.
  2800. */
  2801. owner_dev = DEVICE(owner);
  2802. vmstate_register_ram(mr, owner_dev);
  2803. }
  2804. static const TypeInfo memory_region_info = {
  2805. .parent = TYPE_OBJECT,
  2806. .name = TYPE_MEMORY_REGION,
  2807. .class_size = sizeof(MemoryRegionClass),
  2808. .instance_size = sizeof(MemoryRegion),
  2809. .instance_init = memory_region_initfn,
  2810. .instance_finalize = memory_region_finalize,
  2811. };
  2812. static const TypeInfo iommu_memory_region_info = {
  2813. .parent = TYPE_MEMORY_REGION,
  2814. .name = TYPE_IOMMU_MEMORY_REGION,
  2815. .class_size = sizeof(IOMMUMemoryRegionClass),
  2816. .instance_size = sizeof(IOMMUMemoryRegion),
  2817. .instance_init = iommu_memory_region_initfn,
  2818. .abstract = true,
  2819. };
  2820. static void memory_register_types(void)
  2821. {
  2822. type_register_static(&memory_region_info);
  2823. type_register_static(&iommu_memory_region_info);
  2824. }
  2825. type_init(memory_register_types)