memory.c 100 KB

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  1. /*
  2. * Physical memory management
  3. *
  4. * Copyright 2011 Red Hat, Inc. and/or its affiliates
  5. *
  6. * Authors:
  7. * Avi Kivity <avi@redhat.com>
  8. *
  9. * This work is licensed under the terms of the GNU GPL, version 2. See
  10. * the COPYING file in the top-level directory.
  11. *
  12. * Contributions after 2012-01-13 are licensed under the terms of the
  13. * GNU GPL, version 2 or (at your option) any later version.
  14. */
  15. #include "qemu/osdep.h"
  16. #include "qapi/error.h"
  17. #include "qemu-common.h"
  18. #include "cpu.h"
  19. #include "exec/memory.h"
  20. #include "exec/address-spaces.h"
  21. #include "qapi/visitor.h"
  22. #include "qemu/bitops.h"
  23. #include "qemu/error-report.h"
  24. #include "qom/object.h"
  25. #include "trace-root.h"
  26. #include "exec/memory-internal.h"
  27. #include "exec/ram_addr.h"
  28. #include "sysemu/kvm.h"
  29. #include "sysemu/sysemu.h"
  30. #include "hw/misc/mmio_interface.h"
  31. #include "hw/qdev-properties.h"
  32. #include "migration/vmstate.h"
  33. //#define DEBUG_UNASSIGNED
  34. static unsigned memory_region_transaction_depth;
  35. static bool memory_region_update_pending;
  36. static bool ioeventfd_update_pending;
  37. static bool global_dirty_log = false;
  38. static QTAILQ_HEAD(memory_listeners, MemoryListener) memory_listeners
  39. = QTAILQ_HEAD_INITIALIZER(memory_listeners);
  40. static QTAILQ_HEAD(, AddressSpace) address_spaces
  41. = QTAILQ_HEAD_INITIALIZER(address_spaces);
  42. static GHashTable *flat_views;
  43. typedef struct AddrRange AddrRange;
  44. /*
  45. * Note that signed integers are needed for negative offsetting in aliases
  46. * (large MemoryRegion::alias_offset).
  47. */
  48. struct AddrRange {
  49. Int128 start;
  50. Int128 size;
  51. };
  52. static AddrRange addrrange_make(Int128 start, Int128 size)
  53. {
  54. return (AddrRange) { start, size };
  55. }
  56. static bool addrrange_equal(AddrRange r1, AddrRange r2)
  57. {
  58. return int128_eq(r1.start, r2.start) && int128_eq(r1.size, r2.size);
  59. }
  60. static Int128 addrrange_end(AddrRange r)
  61. {
  62. return int128_add(r.start, r.size);
  63. }
  64. static AddrRange addrrange_shift(AddrRange range, Int128 delta)
  65. {
  66. int128_addto(&range.start, delta);
  67. return range;
  68. }
  69. static bool addrrange_contains(AddrRange range, Int128 addr)
  70. {
  71. return int128_ge(addr, range.start)
  72. && int128_lt(addr, addrrange_end(range));
  73. }
  74. static bool addrrange_intersects(AddrRange r1, AddrRange r2)
  75. {
  76. return addrrange_contains(r1, r2.start)
  77. || addrrange_contains(r2, r1.start);
  78. }
  79. static AddrRange addrrange_intersection(AddrRange r1, AddrRange r2)
  80. {
  81. Int128 start = int128_max(r1.start, r2.start);
  82. Int128 end = int128_min(addrrange_end(r1), addrrange_end(r2));
  83. return addrrange_make(start, int128_sub(end, start));
  84. }
  85. enum ListenerDirection { Forward, Reverse };
  86. #define MEMORY_LISTENER_CALL_GLOBAL(_callback, _direction, _args...) \
  87. do { \
  88. MemoryListener *_listener; \
  89. \
  90. switch (_direction) { \
  91. case Forward: \
  92. QTAILQ_FOREACH(_listener, &memory_listeners, link) { \
  93. if (_listener->_callback) { \
  94. _listener->_callback(_listener, ##_args); \
  95. } \
  96. } \
  97. break; \
  98. case Reverse: \
  99. QTAILQ_FOREACH_REVERSE(_listener, &memory_listeners, \
  100. memory_listeners, link) { \
  101. if (_listener->_callback) { \
  102. _listener->_callback(_listener, ##_args); \
  103. } \
  104. } \
  105. break; \
  106. default: \
  107. abort(); \
  108. } \
  109. } while (0)
  110. #define MEMORY_LISTENER_CALL(_as, _callback, _direction, _section, _args...) \
  111. do { \
  112. MemoryListener *_listener; \
  113. struct memory_listeners_as *list = &(_as)->listeners; \
  114. \
  115. switch (_direction) { \
  116. case Forward: \
  117. QTAILQ_FOREACH(_listener, list, link_as) { \
  118. if (_listener->_callback) { \
  119. _listener->_callback(_listener, _section, ##_args); \
  120. } \
  121. } \
  122. break; \
  123. case Reverse: \
  124. QTAILQ_FOREACH_REVERSE(_listener, list, memory_listeners_as, \
  125. link_as) { \
  126. if (_listener->_callback) { \
  127. _listener->_callback(_listener, _section, ##_args); \
  128. } \
  129. } \
  130. break; \
  131. default: \
  132. abort(); \
  133. } \
  134. } while (0)
  135. /* No need to ref/unref .mr, the FlatRange keeps it alive. */
  136. #define MEMORY_LISTENER_UPDATE_REGION(fr, as, dir, callback, _args...) \
  137. do { \
  138. MemoryRegionSection mrs = section_from_flat_range(fr, \
  139. address_space_to_flatview(as)); \
  140. MEMORY_LISTENER_CALL(as, callback, dir, &mrs, ##_args); \
  141. } while(0)
  142. struct CoalescedMemoryRange {
  143. AddrRange addr;
  144. QTAILQ_ENTRY(CoalescedMemoryRange) link;
  145. };
  146. struct MemoryRegionIoeventfd {
  147. AddrRange addr;
  148. bool match_data;
  149. uint64_t data;
  150. EventNotifier *e;
  151. };
  152. static bool memory_region_ioeventfd_before(MemoryRegionIoeventfd *a,
  153. MemoryRegionIoeventfd *b)
  154. {
  155. if (int128_lt(a->addr.start, b->addr.start)) {
  156. return true;
  157. } else if (int128_gt(a->addr.start, b->addr.start)) {
  158. return false;
  159. } else if (int128_lt(a->addr.size, b->addr.size)) {
  160. return true;
  161. } else if (int128_gt(a->addr.size, b->addr.size)) {
  162. return false;
  163. } else if (a->match_data < b->match_data) {
  164. return true;
  165. } else if (a->match_data > b->match_data) {
  166. return false;
  167. } else if (a->match_data) {
  168. if (a->data < b->data) {
  169. return true;
  170. } else if (a->data > b->data) {
  171. return false;
  172. }
  173. }
  174. if (a->e < b->e) {
  175. return true;
  176. } else if (a->e > b->e) {
  177. return false;
  178. }
  179. return false;
  180. }
  181. static bool memory_region_ioeventfd_equal(MemoryRegionIoeventfd *a,
  182. MemoryRegionIoeventfd *b)
  183. {
  184. return !memory_region_ioeventfd_before(a, b)
  185. && !memory_region_ioeventfd_before(b, a);
  186. }
  187. /* Range of memory in the global map. Addresses are absolute. */
  188. struct FlatRange {
  189. MemoryRegion *mr;
  190. hwaddr offset_in_region;
  191. AddrRange addr;
  192. uint8_t dirty_log_mask;
  193. bool romd_mode;
  194. bool readonly;
  195. };
  196. #define FOR_EACH_FLAT_RANGE(var, view) \
  197. for (var = (view)->ranges; var < (view)->ranges + (view)->nr; ++var)
  198. static inline MemoryRegionSection
  199. section_from_flat_range(FlatRange *fr, FlatView *fv)
  200. {
  201. return (MemoryRegionSection) {
  202. .mr = fr->mr,
  203. .fv = fv,
  204. .offset_within_region = fr->offset_in_region,
  205. .size = fr->addr.size,
  206. .offset_within_address_space = int128_get64(fr->addr.start),
  207. .readonly = fr->readonly,
  208. };
  209. }
  210. static bool flatrange_equal(FlatRange *a, FlatRange *b)
  211. {
  212. return a->mr == b->mr
  213. && addrrange_equal(a->addr, b->addr)
  214. && a->offset_in_region == b->offset_in_region
  215. && a->romd_mode == b->romd_mode
  216. && a->readonly == b->readonly;
  217. }
  218. static FlatView *flatview_new(MemoryRegion *mr_root)
  219. {
  220. FlatView *view;
  221. view = g_new0(FlatView, 1);
  222. view->ref = 1;
  223. view->root = mr_root;
  224. memory_region_ref(mr_root);
  225. trace_flatview_new(view, mr_root);
  226. return view;
  227. }
  228. /* Insert a range into a given position. Caller is responsible for maintaining
  229. * sorting order.
  230. */
  231. static void flatview_insert(FlatView *view, unsigned pos, FlatRange *range)
  232. {
  233. if (view->nr == view->nr_allocated) {
  234. view->nr_allocated = MAX(2 * view->nr, 10);
  235. view->ranges = g_realloc(view->ranges,
  236. view->nr_allocated * sizeof(*view->ranges));
  237. }
  238. memmove(view->ranges + pos + 1, view->ranges + pos,
  239. (view->nr - pos) * sizeof(FlatRange));
  240. view->ranges[pos] = *range;
  241. memory_region_ref(range->mr);
  242. ++view->nr;
  243. }
  244. static void flatview_destroy(FlatView *view)
  245. {
  246. int i;
  247. trace_flatview_destroy(view, view->root);
  248. if (view->dispatch) {
  249. address_space_dispatch_free(view->dispatch);
  250. }
  251. for (i = 0; i < view->nr; i++) {
  252. memory_region_unref(view->ranges[i].mr);
  253. }
  254. g_free(view->ranges);
  255. memory_region_unref(view->root);
  256. g_free(view);
  257. }
  258. static bool flatview_ref(FlatView *view)
  259. {
  260. return atomic_fetch_inc_nonzero(&view->ref) > 0;
  261. }
  262. void flatview_unref(FlatView *view)
  263. {
  264. if (atomic_fetch_dec(&view->ref) == 1) {
  265. trace_flatview_destroy_rcu(view, view->root);
  266. assert(view->root);
  267. call_rcu(view, flatview_destroy, rcu);
  268. }
  269. }
  270. static bool can_merge(FlatRange *r1, FlatRange *r2)
  271. {
  272. return int128_eq(addrrange_end(r1->addr), r2->addr.start)
  273. && r1->mr == r2->mr
  274. && int128_eq(int128_add(int128_make64(r1->offset_in_region),
  275. r1->addr.size),
  276. int128_make64(r2->offset_in_region))
  277. && r1->dirty_log_mask == r2->dirty_log_mask
  278. && r1->romd_mode == r2->romd_mode
  279. && r1->readonly == r2->readonly;
  280. }
  281. /* Attempt to simplify a view by merging adjacent ranges */
  282. static void flatview_simplify(FlatView *view)
  283. {
  284. unsigned i, j;
  285. i = 0;
  286. while (i < view->nr) {
  287. j = i + 1;
  288. while (j < view->nr
  289. && can_merge(&view->ranges[j-1], &view->ranges[j])) {
  290. int128_addto(&view->ranges[i].addr.size, view->ranges[j].addr.size);
  291. ++j;
  292. }
  293. ++i;
  294. memmove(&view->ranges[i], &view->ranges[j],
  295. (view->nr - j) * sizeof(view->ranges[j]));
  296. view->nr -= j - i;
  297. }
  298. }
  299. static bool memory_region_big_endian(MemoryRegion *mr)
  300. {
  301. #ifdef TARGET_WORDS_BIGENDIAN
  302. return mr->ops->endianness != DEVICE_LITTLE_ENDIAN;
  303. #else
  304. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  305. #endif
  306. }
  307. static bool memory_region_wrong_endianness(MemoryRegion *mr)
  308. {
  309. #ifdef TARGET_WORDS_BIGENDIAN
  310. return mr->ops->endianness == DEVICE_LITTLE_ENDIAN;
  311. #else
  312. return mr->ops->endianness == DEVICE_BIG_ENDIAN;
  313. #endif
  314. }
  315. static void adjust_endianness(MemoryRegion *mr, uint64_t *data, unsigned size)
  316. {
  317. if (memory_region_wrong_endianness(mr)) {
  318. switch (size) {
  319. case 1:
  320. break;
  321. case 2:
  322. *data = bswap16(*data);
  323. break;
  324. case 4:
  325. *data = bswap32(*data);
  326. break;
  327. case 8:
  328. *data = bswap64(*data);
  329. break;
  330. default:
  331. abort();
  332. }
  333. }
  334. }
  335. static hwaddr memory_region_to_absolute_addr(MemoryRegion *mr, hwaddr offset)
  336. {
  337. MemoryRegion *root;
  338. hwaddr abs_addr = offset;
  339. abs_addr += mr->addr;
  340. for (root = mr; root->container; ) {
  341. root = root->container;
  342. abs_addr += root->addr;
  343. }
  344. return abs_addr;
  345. }
  346. static int get_cpu_index(void)
  347. {
  348. if (current_cpu) {
  349. return current_cpu->cpu_index;
  350. }
  351. return -1;
  352. }
  353. static MemTxResult memory_region_oldmmio_read_accessor(MemoryRegion *mr,
  354. hwaddr addr,
  355. uint64_t *value,
  356. unsigned size,
  357. unsigned shift,
  358. uint64_t mask,
  359. MemTxAttrs attrs)
  360. {
  361. uint64_t tmp;
  362. tmp = mr->ops->old_mmio.read[ctz32(size)](mr->opaque, addr);
  363. if (mr->subpage) {
  364. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  365. } else if (mr == &io_mem_notdirty) {
  366. /* Accesses to code which has previously been translated into a TB show
  367. * up in the MMIO path, as accesses to the io_mem_notdirty
  368. * MemoryRegion. */
  369. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  370. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  371. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  372. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  373. }
  374. *value |= (tmp & mask) << shift;
  375. return MEMTX_OK;
  376. }
  377. static MemTxResult memory_region_read_accessor(MemoryRegion *mr,
  378. hwaddr addr,
  379. uint64_t *value,
  380. unsigned size,
  381. unsigned shift,
  382. uint64_t mask,
  383. MemTxAttrs attrs)
  384. {
  385. uint64_t tmp;
  386. tmp = mr->ops->read(mr->opaque, addr, size);
  387. if (mr->subpage) {
  388. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  389. } else if (mr == &io_mem_notdirty) {
  390. /* Accesses to code which has previously been translated into a TB show
  391. * up in the MMIO path, as accesses to the io_mem_notdirty
  392. * MemoryRegion. */
  393. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  394. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  395. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  396. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  397. }
  398. *value |= (tmp & mask) << shift;
  399. return MEMTX_OK;
  400. }
  401. static MemTxResult memory_region_read_with_attrs_accessor(MemoryRegion *mr,
  402. hwaddr addr,
  403. uint64_t *value,
  404. unsigned size,
  405. unsigned shift,
  406. uint64_t mask,
  407. MemTxAttrs attrs)
  408. {
  409. uint64_t tmp = 0;
  410. MemTxResult r;
  411. r = mr->ops->read_with_attrs(mr->opaque, addr, &tmp, size, attrs);
  412. if (mr->subpage) {
  413. trace_memory_region_subpage_read(get_cpu_index(), mr, addr, tmp, size);
  414. } else if (mr == &io_mem_notdirty) {
  415. /* Accesses to code which has previously been translated into a TB show
  416. * up in the MMIO path, as accesses to the io_mem_notdirty
  417. * MemoryRegion. */
  418. trace_memory_region_tb_read(get_cpu_index(), addr, tmp, size);
  419. } else if (TRACE_MEMORY_REGION_OPS_READ_ENABLED) {
  420. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  421. trace_memory_region_ops_read(get_cpu_index(), mr, abs_addr, tmp, size);
  422. }
  423. *value |= (tmp & mask) << shift;
  424. return r;
  425. }
  426. static MemTxResult memory_region_oldmmio_write_accessor(MemoryRegion *mr,
  427. hwaddr addr,
  428. uint64_t *value,
  429. unsigned size,
  430. unsigned shift,
  431. uint64_t mask,
  432. MemTxAttrs attrs)
  433. {
  434. uint64_t tmp;
  435. tmp = (*value >> shift) & mask;
  436. if (mr->subpage) {
  437. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  438. } else if (mr == &io_mem_notdirty) {
  439. /* Accesses to code which has previously been translated into a TB show
  440. * up in the MMIO path, as accesses to the io_mem_notdirty
  441. * MemoryRegion. */
  442. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  443. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  444. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  445. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  446. }
  447. mr->ops->old_mmio.write[ctz32(size)](mr->opaque, addr, tmp);
  448. return MEMTX_OK;
  449. }
  450. static MemTxResult memory_region_write_accessor(MemoryRegion *mr,
  451. hwaddr addr,
  452. uint64_t *value,
  453. unsigned size,
  454. unsigned shift,
  455. uint64_t mask,
  456. MemTxAttrs attrs)
  457. {
  458. uint64_t tmp;
  459. tmp = (*value >> shift) & mask;
  460. if (mr->subpage) {
  461. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  462. } else if (mr == &io_mem_notdirty) {
  463. /* Accesses to code which has previously been translated into a TB show
  464. * up in the MMIO path, as accesses to the io_mem_notdirty
  465. * MemoryRegion. */
  466. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  467. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  468. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  469. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  470. }
  471. mr->ops->write(mr->opaque, addr, tmp, size);
  472. return MEMTX_OK;
  473. }
  474. static MemTxResult memory_region_write_with_attrs_accessor(MemoryRegion *mr,
  475. hwaddr addr,
  476. uint64_t *value,
  477. unsigned size,
  478. unsigned shift,
  479. uint64_t mask,
  480. MemTxAttrs attrs)
  481. {
  482. uint64_t tmp;
  483. tmp = (*value >> shift) & mask;
  484. if (mr->subpage) {
  485. trace_memory_region_subpage_write(get_cpu_index(), mr, addr, tmp, size);
  486. } else if (mr == &io_mem_notdirty) {
  487. /* Accesses to code which has previously been translated into a TB show
  488. * up in the MMIO path, as accesses to the io_mem_notdirty
  489. * MemoryRegion. */
  490. trace_memory_region_tb_write(get_cpu_index(), addr, tmp, size);
  491. } else if (TRACE_MEMORY_REGION_OPS_WRITE_ENABLED) {
  492. hwaddr abs_addr = memory_region_to_absolute_addr(mr, addr);
  493. trace_memory_region_ops_write(get_cpu_index(), mr, abs_addr, tmp, size);
  494. }
  495. return mr->ops->write_with_attrs(mr->opaque, addr, tmp, size, attrs);
  496. }
  497. static MemTxResult access_with_adjusted_size(hwaddr addr,
  498. uint64_t *value,
  499. unsigned size,
  500. unsigned access_size_min,
  501. unsigned access_size_max,
  502. MemTxResult (*access_fn)
  503. (MemoryRegion *mr,
  504. hwaddr addr,
  505. uint64_t *value,
  506. unsigned size,
  507. unsigned shift,
  508. uint64_t mask,
  509. MemTxAttrs attrs),
  510. MemoryRegion *mr,
  511. MemTxAttrs attrs)
  512. {
  513. uint64_t access_mask;
  514. unsigned access_size;
  515. unsigned i;
  516. MemTxResult r = MEMTX_OK;
  517. if (!access_size_min) {
  518. access_size_min = 1;
  519. }
  520. if (!access_size_max) {
  521. access_size_max = 4;
  522. }
  523. /* FIXME: support unaligned access? */
  524. access_size = MAX(MIN(size, access_size_max), access_size_min);
  525. access_mask = -1ULL >> (64 - access_size * 8);
  526. if (memory_region_big_endian(mr)) {
  527. for (i = 0; i < size; i += access_size) {
  528. r |= access_fn(mr, addr + i, value, access_size,
  529. (size - access_size - i) * 8, access_mask, attrs);
  530. }
  531. } else {
  532. for (i = 0; i < size; i += access_size) {
  533. r |= access_fn(mr, addr + i, value, access_size, i * 8,
  534. access_mask, attrs);
  535. }
  536. }
  537. return r;
  538. }
  539. static AddressSpace *memory_region_to_address_space(MemoryRegion *mr)
  540. {
  541. AddressSpace *as;
  542. while (mr->container) {
  543. mr = mr->container;
  544. }
  545. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  546. if (mr == as->root) {
  547. return as;
  548. }
  549. }
  550. return NULL;
  551. }
  552. /* Render a memory region into the global view. Ranges in @view obscure
  553. * ranges in @mr.
  554. */
  555. static void render_memory_region(FlatView *view,
  556. MemoryRegion *mr,
  557. Int128 base,
  558. AddrRange clip,
  559. bool readonly)
  560. {
  561. MemoryRegion *subregion;
  562. unsigned i;
  563. hwaddr offset_in_region;
  564. Int128 remain;
  565. Int128 now;
  566. FlatRange fr;
  567. AddrRange tmp;
  568. if (!mr->enabled) {
  569. return;
  570. }
  571. int128_addto(&base, int128_make64(mr->addr));
  572. readonly |= mr->readonly;
  573. tmp = addrrange_make(base, mr->size);
  574. if (!addrrange_intersects(tmp, clip)) {
  575. return;
  576. }
  577. clip = addrrange_intersection(tmp, clip);
  578. if (mr->alias) {
  579. int128_subfrom(&base, int128_make64(mr->alias->addr));
  580. int128_subfrom(&base, int128_make64(mr->alias_offset));
  581. render_memory_region(view, mr->alias, base, clip, readonly);
  582. return;
  583. }
  584. /* Render subregions in priority order. */
  585. QTAILQ_FOREACH(subregion, &mr->subregions, subregions_link) {
  586. render_memory_region(view, subregion, base, clip, readonly);
  587. }
  588. if (!mr->terminates) {
  589. return;
  590. }
  591. offset_in_region = int128_get64(int128_sub(clip.start, base));
  592. base = clip.start;
  593. remain = clip.size;
  594. fr.mr = mr;
  595. fr.dirty_log_mask = memory_region_get_dirty_log_mask(mr);
  596. fr.romd_mode = mr->romd_mode;
  597. fr.readonly = readonly;
  598. /* Render the region itself into any gaps left by the current view. */
  599. for (i = 0; i < view->nr && int128_nz(remain); ++i) {
  600. if (int128_ge(base, addrrange_end(view->ranges[i].addr))) {
  601. continue;
  602. }
  603. if (int128_lt(base, view->ranges[i].addr.start)) {
  604. now = int128_min(remain,
  605. int128_sub(view->ranges[i].addr.start, base));
  606. fr.offset_in_region = offset_in_region;
  607. fr.addr = addrrange_make(base, now);
  608. flatview_insert(view, i, &fr);
  609. ++i;
  610. int128_addto(&base, now);
  611. offset_in_region += int128_get64(now);
  612. int128_subfrom(&remain, now);
  613. }
  614. now = int128_sub(int128_min(int128_add(base, remain),
  615. addrrange_end(view->ranges[i].addr)),
  616. base);
  617. int128_addto(&base, now);
  618. offset_in_region += int128_get64(now);
  619. int128_subfrom(&remain, now);
  620. }
  621. if (int128_nz(remain)) {
  622. fr.offset_in_region = offset_in_region;
  623. fr.addr = addrrange_make(base, remain);
  624. flatview_insert(view, i, &fr);
  625. }
  626. }
  627. static MemoryRegion *memory_region_get_flatview_root(MemoryRegion *mr)
  628. {
  629. while (mr->enabled) {
  630. if (mr->alias) {
  631. if (!mr->alias_offset && int128_ge(mr->size, mr->alias->size)) {
  632. /* The alias is included in its entirety. Use it as
  633. * the "real" root, so that we can share more FlatViews.
  634. */
  635. mr = mr->alias;
  636. continue;
  637. }
  638. } else if (!mr->terminates) {
  639. unsigned int found = 0;
  640. MemoryRegion *child, *next = NULL;
  641. QTAILQ_FOREACH(child, &mr->subregions, subregions_link) {
  642. if (child->enabled) {
  643. if (++found > 1) {
  644. next = NULL;
  645. break;
  646. }
  647. if (!child->addr && int128_ge(mr->size, child->size)) {
  648. /* A child is included in its entirety. If it's the only
  649. * enabled one, use it in the hope of finding an alias down the
  650. * way. This will also let us share FlatViews.
  651. */
  652. next = child;
  653. }
  654. }
  655. }
  656. if (found == 0) {
  657. return NULL;
  658. }
  659. if (next) {
  660. mr = next;
  661. continue;
  662. }
  663. }
  664. return mr;
  665. }
  666. return NULL;
  667. }
  668. /* Render a memory topology into a list of disjoint absolute ranges. */
  669. static FlatView *generate_memory_topology(MemoryRegion *mr)
  670. {
  671. int i;
  672. FlatView *view;
  673. view = flatview_new(mr);
  674. if (mr) {
  675. render_memory_region(view, mr, int128_zero(),
  676. addrrange_make(int128_zero(), int128_2_64()), false);
  677. }
  678. flatview_simplify(view);
  679. view->dispatch = address_space_dispatch_new(view);
  680. for (i = 0; i < view->nr; i++) {
  681. MemoryRegionSection mrs =
  682. section_from_flat_range(&view->ranges[i], view);
  683. flatview_add_to_dispatch(view, &mrs);
  684. }
  685. address_space_dispatch_compact(view->dispatch);
  686. g_hash_table_replace(flat_views, mr, view);
  687. return view;
  688. }
  689. static void address_space_add_del_ioeventfds(AddressSpace *as,
  690. MemoryRegionIoeventfd *fds_new,
  691. unsigned fds_new_nb,
  692. MemoryRegionIoeventfd *fds_old,
  693. unsigned fds_old_nb)
  694. {
  695. unsigned iold, inew;
  696. MemoryRegionIoeventfd *fd;
  697. MemoryRegionSection section;
  698. /* Generate a symmetric difference of the old and new fd sets, adding
  699. * and deleting as necessary.
  700. */
  701. iold = inew = 0;
  702. while (iold < fds_old_nb || inew < fds_new_nb) {
  703. if (iold < fds_old_nb
  704. && (inew == fds_new_nb
  705. || memory_region_ioeventfd_before(&fds_old[iold],
  706. &fds_new[inew]))) {
  707. fd = &fds_old[iold];
  708. section = (MemoryRegionSection) {
  709. .fv = address_space_to_flatview(as),
  710. .offset_within_address_space = int128_get64(fd->addr.start),
  711. .size = fd->addr.size,
  712. };
  713. MEMORY_LISTENER_CALL(as, eventfd_del, Forward, &section,
  714. fd->match_data, fd->data, fd->e);
  715. ++iold;
  716. } else if (inew < fds_new_nb
  717. && (iold == fds_old_nb
  718. || memory_region_ioeventfd_before(&fds_new[inew],
  719. &fds_old[iold]))) {
  720. fd = &fds_new[inew];
  721. section = (MemoryRegionSection) {
  722. .fv = address_space_to_flatview(as),
  723. .offset_within_address_space = int128_get64(fd->addr.start),
  724. .size = fd->addr.size,
  725. };
  726. MEMORY_LISTENER_CALL(as, eventfd_add, Reverse, &section,
  727. fd->match_data, fd->data, fd->e);
  728. ++inew;
  729. } else {
  730. ++iold;
  731. ++inew;
  732. }
  733. }
  734. }
  735. FlatView *address_space_get_flatview(AddressSpace *as)
  736. {
  737. FlatView *view;
  738. rcu_read_lock();
  739. do {
  740. view = address_space_to_flatview(as);
  741. /* If somebody has replaced as->current_map concurrently,
  742. * flatview_ref returns false.
  743. */
  744. } while (!flatview_ref(view));
  745. rcu_read_unlock();
  746. return view;
  747. }
  748. static void address_space_update_ioeventfds(AddressSpace *as)
  749. {
  750. FlatView *view;
  751. FlatRange *fr;
  752. unsigned ioeventfd_nb = 0;
  753. MemoryRegionIoeventfd *ioeventfds = NULL;
  754. AddrRange tmp;
  755. unsigned i;
  756. view = address_space_get_flatview(as);
  757. FOR_EACH_FLAT_RANGE(fr, view) {
  758. for (i = 0; i < fr->mr->ioeventfd_nb; ++i) {
  759. tmp = addrrange_shift(fr->mr->ioeventfds[i].addr,
  760. int128_sub(fr->addr.start,
  761. int128_make64(fr->offset_in_region)));
  762. if (addrrange_intersects(fr->addr, tmp)) {
  763. ++ioeventfd_nb;
  764. ioeventfds = g_realloc(ioeventfds,
  765. ioeventfd_nb * sizeof(*ioeventfds));
  766. ioeventfds[ioeventfd_nb-1] = fr->mr->ioeventfds[i];
  767. ioeventfds[ioeventfd_nb-1].addr = tmp;
  768. }
  769. }
  770. }
  771. address_space_add_del_ioeventfds(as, ioeventfds, ioeventfd_nb,
  772. as->ioeventfds, as->ioeventfd_nb);
  773. g_free(as->ioeventfds);
  774. as->ioeventfds = ioeventfds;
  775. as->ioeventfd_nb = ioeventfd_nb;
  776. flatview_unref(view);
  777. }
  778. static void address_space_update_topology_pass(AddressSpace *as,
  779. const FlatView *old_view,
  780. const FlatView *new_view,
  781. bool adding)
  782. {
  783. unsigned iold, inew;
  784. FlatRange *frold, *frnew;
  785. /* Generate a symmetric difference of the old and new memory maps.
  786. * Kill ranges in the old map, and instantiate ranges in the new map.
  787. */
  788. iold = inew = 0;
  789. while (iold < old_view->nr || inew < new_view->nr) {
  790. if (iold < old_view->nr) {
  791. frold = &old_view->ranges[iold];
  792. } else {
  793. frold = NULL;
  794. }
  795. if (inew < new_view->nr) {
  796. frnew = &new_view->ranges[inew];
  797. } else {
  798. frnew = NULL;
  799. }
  800. if (frold
  801. && (!frnew
  802. || int128_lt(frold->addr.start, frnew->addr.start)
  803. || (int128_eq(frold->addr.start, frnew->addr.start)
  804. && !flatrange_equal(frold, frnew)))) {
  805. /* In old but not in new, or in both but attributes changed. */
  806. if (!adding) {
  807. MEMORY_LISTENER_UPDATE_REGION(frold, as, Reverse, region_del);
  808. }
  809. ++iold;
  810. } else if (frold && frnew && flatrange_equal(frold, frnew)) {
  811. /* In both and unchanged (except logging may have changed) */
  812. if (adding) {
  813. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_nop);
  814. if (frnew->dirty_log_mask & ~frold->dirty_log_mask) {
  815. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, log_start,
  816. frold->dirty_log_mask,
  817. frnew->dirty_log_mask);
  818. }
  819. if (frold->dirty_log_mask & ~frnew->dirty_log_mask) {
  820. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Reverse, log_stop,
  821. frold->dirty_log_mask,
  822. frnew->dirty_log_mask);
  823. }
  824. }
  825. ++iold;
  826. ++inew;
  827. } else {
  828. /* In new */
  829. if (adding) {
  830. MEMORY_LISTENER_UPDATE_REGION(frnew, as, Forward, region_add);
  831. }
  832. ++inew;
  833. }
  834. }
  835. }
  836. static void flatviews_init(void)
  837. {
  838. static FlatView *empty_view;
  839. if (flat_views) {
  840. return;
  841. }
  842. flat_views = g_hash_table_new_full(g_direct_hash, g_direct_equal, NULL,
  843. (GDestroyNotify) flatview_unref);
  844. if (!empty_view) {
  845. empty_view = generate_memory_topology(NULL);
  846. /* We keep it alive forever in the global variable. */
  847. flatview_ref(empty_view);
  848. } else {
  849. g_hash_table_replace(flat_views, NULL, empty_view);
  850. flatview_ref(empty_view);
  851. }
  852. }
  853. static void flatviews_reset(void)
  854. {
  855. AddressSpace *as;
  856. if (flat_views) {
  857. g_hash_table_unref(flat_views);
  858. flat_views = NULL;
  859. }
  860. flatviews_init();
  861. /* Render unique FVs */
  862. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  863. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  864. if (g_hash_table_lookup(flat_views, physmr)) {
  865. continue;
  866. }
  867. generate_memory_topology(physmr);
  868. }
  869. }
  870. static void address_space_set_flatview(AddressSpace *as)
  871. {
  872. FlatView *old_view = address_space_to_flatview(as);
  873. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  874. FlatView *new_view = g_hash_table_lookup(flat_views, physmr);
  875. assert(new_view);
  876. if (old_view == new_view) {
  877. return;
  878. }
  879. if (old_view) {
  880. flatview_ref(old_view);
  881. }
  882. flatview_ref(new_view);
  883. if (!QTAILQ_EMPTY(&as->listeners)) {
  884. FlatView tmpview = { .nr = 0 }, *old_view2 = old_view;
  885. if (!old_view2) {
  886. old_view2 = &tmpview;
  887. }
  888. address_space_update_topology_pass(as, old_view2, new_view, false);
  889. address_space_update_topology_pass(as, old_view2, new_view, true);
  890. }
  891. /* Writes are protected by the BQL. */
  892. atomic_rcu_set(&as->current_map, new_view);
  893. if (old_view) {
  894. flatview_unref(old_view);
  895. }
  896. /* Note that all the old MemoryRegions are still alive up to this
  897. * point. This relieves most MemoryListeners from the need to
  898. * ref/unref the MemoryRegions they get---unless they use them
  899. * outside the iothread mutex, in which case precise reference
  900. * counting is necessary.
  901. */
  902. if (old_view) {
  903. flatview_unref(old_view);
  904. }
  905. }
  906. static void address_space_update_topology(AddressSpace *as)
  907. {
  908. MemoryRegion *physmr = memory_region_get_flatview_root(as->root);
  909. flatviews_init();
  910. if (!g_hash_table_lookup(flat_views, physmr)) {
  911. generate_memory_topology(physmr);
  912. }
  913. address_space_set_flatview(as);
  914. }
  915. void memory_region_transaction_begin(void)
  916. {
  917. qemu_flush_coalesced_mmio_buffer();
  918. ++memory_region_transaction_depth;
  919. }
  920. void memory_region_transaction_commit(void)
  921. {
  922. AddressSpace *as;
  923. assert(memory_region_transaction_depth);
  924. assert(qemu_mutex_iothread_locked());
  925. --memory_region_transaction_depth;
  926. if (!memory_region_transaction_depth) {
  927. if (memory_region_update_pending) {
  928. flatviews_reset();
  929. MEMORY_LISTENER_CALL_GLOBAL(begin, Forward);
  930. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  931. address_space_set_flatview(as);
  932. address_space_update_ioeventfds(as);
  933. }
  934. memory_region_update_pending = false;
  935. ioeventfd_update_pending = false;
  936. MEMORY_LISTENER_CALL_GLOBAL(commit, Forward);
  937. } else if (ioeventfd_update_pending) {
  938. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  939. address_space_update_ioeventfds(as);
  940. }
  941. ioeventfd_update_pending = false;
  942. }
  943. }
  944. }
  945. static void memory_region_destructor_none(MemoryRegion *mr)
  946. {
  947. }
  948. static void memory_region_destructor_ram(MemoryRegion *mr)
  949. {
  950. qemu_ram_free(mr->ram_block);
  951. }
  952. static bool memory_region_need_escape(char c)
  953. {
  954. return c == '/' || c == '[' || c == '\\' || c == ']';
  955. }
  956. static char *memory_region_escape_name(const char *name)
  957. {
  958. const char *p;
  959. char *escaped, *q;
  960. uint8_t c;
  961. size_t bytes = 0;
  962. for (p = name; *p; p++) {
  963. bytes += memory_region_need_escape(*p) ? 4 : 1;
  964. }
  965. if (bytes == p - name) {
  966. return g_memdup(name, bytes + 1);
  967. }
  968. escaped = g_malloc(bytes + 1);
  969. for (p = name, q = escaped; *p; p++) {
  970. c = *p;
  971. if (unlikely(memory_region_need_escape(c))) {
  972. *q++ = '\\';
  973. *q++ = 'x';
  974. *q++ = "0123456789abcdef"[c >> 4];
  975. c = "0123456789abcdef"[c & 15];
  976. }
  977. *q++ = c;
  978. }
  979. *q = 0;
  980. return escaped;
  981. }
  982. static void memory_region_do_init(MemoryRegion *mr,
  983. Object *owner,
  984. const char *name,
  985. uint64_t size)
  986. {
  987. mr->size = int128_make64(size);
  988. if (size == UINT64_MAX) {
  989. mr->size = int128_2_64();
  990. }
  991. mr->name = g_strdup(name);
  992. mr->owner = owner;
  993. mr->ram_block = NULL;
  994. if (name) {
  995. char *escaped_name = memory_region_escape_name(name);
  996. char *name_array = g_strdup_printf("%s[*]", escaped_name);
  997. if (!owner) {
  998. owner = container_get(qdev_get_machine(), "/unattached");
  999. }
  1000. object_property_add_child(owner, name_array, OBJECT(mr), &error_abort);
  1001. object_unref(OBJECT(mr));
  1002. g_free(name_array);
  1003. g_free(escaped_name);
  1004. }
  1005. }
  1006. void memory_region_init(MemoryRegion *mr,
  1007. Object *owner,
  1008. const char *name,
  1009. uint64_t size)
  1010. {
  1011. object_initialize(mr, sizeof(*mr), TYPE_MEMORY_REGION);
  1012. memory_region_do_init(mr, owner, name, size);
  1013. }
  1014. static void memory_region_get_addr(Object *obj, Visitor *v, const char *name,
  1015. void *opaque, Error **errp)
  1016. {
  1017. MemoryRegion *mr = MEMORY_REGION(obj);
  1018. uint64_t value = mr->addr;
  1019. visit_type_uint64(v, name, &value, errp);
  1020. }
  1021. static void memory_region_get_container(Object *obj, Visitor *v,
  1022. const char *name, void *opaque,
  1023. Error **errp)
  1024. {
  1025. MemoryRegion *mr = MEMORY_REGION(obj);
  1026. gchar *path = (gchar *)"";
  1027. if (mr->container) {
  1028. path = object_get_canonical_path(OBJECT(mr->container));
  1029. }
  1030. visit_type_str(v, name, &path, errp);
  1031. if (mr->container) {
  1032. g_free(path);
  1033. }
  1034. }
  1035. static Object *memory_region_resolve_container(Object *obj, void *opaque,
  1036. const char *part)
  1037. {
  1038. MemoryRegion *mr = MEMORY_REGION(obj);
  1039. return OBJECT(mr->container);
  1040. }
  1041. static void memory_region_get_priority(Object *obj, Visitor *v,
  1042. const char *name, void *opaque,
  1043. Error **errp)
  1044. {
  1045. MemoryRegion *mr = MEMORY_REGION(obj);
  1046. int32_t value = mr->priority;
  1047. visit_type_int32(v, name, &value, errp);
  1048. }
  1049. static void memory_region_get_size(Object *obj, Visitor *v, const char *name,
  1050. void *opaque, Error **errp)
  1051. {
  1052. MemoryRegion *mr = MEMORY_REGION(obj);
  1053. uint64_t value = memory_region_size(mr);
  1054. visit_type_uint64(v, name, &value, errp);
  1055. }
  1056. static void memory_region_initfn(Object *obj)
  1057. {
  1058. MemoryRegion *mr = MEMORY_REGION(obj);
  1059. ObjectProperty *op;
  1060. mr->ops = &unassigned_mem_ops;
  1061. mr->enabled = true;
  1062. mr->romd_mode = true;
  1063. mr->global_locking = true;
  1064. mr->destructor = memory_region_destructor_none;
  1065. QTAILQ_INIT(&mr->subregions);
  1066. QTAILQ_INIT(&mr->coalesced);
  1067. op = object_property_add(OBJECT(mr), "container",
  1068. "link<" TYPE_MEMORY_REGION ">",
  1069. memory_region_get_container,
  1070. NULL, /* memory_region_set_container */
  1071. NULL, NULL, &error_abort);
  1072. op->resolve = memory_region_resolve_container;
  1073. object_property_add(OBJECT(mr), "addr", "uint64",
  1074. memory_region_get_addr,
  1075. NULL, /* memory_region_set_addr */
  1076. NULL, NULL, &error_abort);
  1077. object_property_add(OBJECT(mr), "priority", "uint32",
  1078. memory_region_get_priority,
  1079. NULL, /* memory_region_set_priority */
  1080. NULL, NULL, &error_abort);
  1081. object_property_add(OBJECT(mr), "size", "uint64",
  1082. memory_region_get_size,
  1083. NULL, /* memory_region_set_size, */
  1084. NULL, NULL, &error_abort);
  1085. }
  1086. static void iommu_memory_region_initfn(Object *obj)
  1087. {
  1088. MemoryRegion *mr = MEMORY_REGION(obj);
  1089. mr->is_iommu = true;
  1090. }
  1091. static uint64_t unassigned_mem_read(void *opaque, hwaddr addr,
  1092. unsigned size)
  1093. {
  1094. #ifdef DEBUG_UNASSIGNED
  1095. printf("Unassigned mem read " TARGET_FMT_plx "\n", addr);
  1096. #endif
  1097. if (current_cpu != NULL) {
  1098. cpu_unassigned_access(current_cpu, addr, false, false, 0, size);
  1099. }
  1100. return 0;
  1101. }
  1102. static void unassigned_mem_write(void *opaque, hwaddr addr,
  1103. uint64_t val, unsigned size)
  1104. {
  1105. #ifdef DEBUG_UNASSIGNED
  1106. printf("Unassigned mem write " TARGET_FMT_plx " = 0x%"PRIx64"\n", addr, val);
  1107. #endif
  1108. if (current_cpu != NULL) {
  1109. cpu_unassigned_access(current_cpu, addr, true, false, 0, size);
  1110. }
  1111. }
  1112. static bool unassigned_mem_accepts(void *opaque, hwaddr addr,
  1113. unsigned size, bool is_write,
  1114. MemTxAttrs attrs)
  1115. {
  1116. return false;
  1117. }
  1118. const MemoryRegionOps unassigned_mem_ops = {
  1119. .valid.accepts = unassigned_mem_accepts,
  1120. .endianness = DEVICE_NATIVE_ENDIAN,
  1121. };
  1122. static uint64_t memory_region_ram_device_read(void *opaque,
  1123. hwaddr addr, unsigned size)
  1124. {
  1125. MemoryRegion *mr = opaque;
  1126. uint64_t data = (uint64_t)~0;
  1127. switch (size) {
  1128. case 1:
  1129. data = *(uint8_t *)(mr->ram_block->host + addr);
  1130. break;
  1131. case 2:
  1132. data = *(uint16_t *)(mr->ram_block->host + addr);
  1133. break;
  1134. case 4:
  1135. data = *(uint32_t *)(mr->ram_block->host + addr);
  1136. break;
  1137. case 8:
  1138. data = *(uint64_t *)(mr->ram_block->host + addr);
  1139. break;
  1140. }
  1141. trace_memory_region_ram_device_read(get_cpu_index(), mr, addr, data, size);
  1142. return data;
  1143. }
  1144. static void memory_region_ram_device_write(void *opaque, hwaddr addr,
  1145. uint64_t data, unsigned size)
  1146. {
  1147. MemoryRegion *mr = opaque;
  1148. trace_memory_region_ram_device_write(get_cpu_index(), mr, addr, data, size);
  1149. switch (size) {
  1150. case 1:
  1151. *(uint8_t *)(mr->ram_block->host + addr) = (uint8_t)data;
  1152. break;
  1153. case 2:
  1154. *(uint16_t *)(mr->ram_block->host + addr) = (uint16_t)data;
  1155. break;
  1156. case 4:
  1157. *(uint32_t *)(mr->ram_block->host + addr) = (uint32_t)data;
  1158. break;
  1159. case 8:
  1160. *(uint64_t *)(mr->ram_block->host + addr) = data;
  1161. break;
  1162. }
  1163. }
  1164. static const MemoryRegionOps ram_device_mem_ops = {
  1165. .read = memory_region_ram_device_read,
  1166. .write = memory_region_ram_device_write,
  1167. .endianness = DEVICE_HOST_ENDIAN,
  1168. .valid = {
  1169. .min_access_size = 1,
  1170. .max_access_size = 8,
  1171. .unaligned = true,
  1172. },
  1173. .impl = {
  1174. .min_access_size = 1,
  1175. .max_access_size = 8,
  1176. .unaligned = true,
  1177. },
  1178. };
  1179. bool memory_region_access_valid(MemoryRegion *mr,
  1180. hwaddr addr,
  1181. unsigned size,
  1182. bool is_write,
  1183. MemTxAttrs attrs)
  1184. {
  1185. int access_size_min, access_size_max;
  1186. int access_size, i;
  1187. if (!mr->ops->valid.unaligned && (addr & (size - 1))) {
  1188. return false;
  1189. }
  1190. if (!mr->ops->valid.accepts) {
  1191. return true;
  1192. }
  1193. access_size_min = mr->ops->valid.min_access_size;
  1194. if (!mr->ops->valid.min_access_size) {
  1195. access_size_min = 1;
  1196. }
  1197. access_size_max = mr->ops->valid.max_access_size;
  1198. if (!mr->ops->valid.max_access_size) {
  1199. access_size_max = 4;
  1200. }
  1201. access_size = MAX(MIN(size, access_size_max), access_size_min);
  1202. for (i = 0; i < size; i += access_size) {
  1203. if (!mr->ops->valid.accepts(mr->opaque, addr + i, access_size,
  1204. is_write, attrs)) {
  1205. return false;
  1206. }
  1207. }
  1208. return true;
  1209. }
  1210. static MemTxResult memory_region_dispatch_read1(MemoryRegion *mr,
  1211. hwaddr addr,
  1212. uint64_t *pval,
  1213. unsigned size,
  1214. MemTxAttrs attrs)
  1215. {
  1216. *pval = 0;
  1217. if (mr->ops->read) {
  1218. return access_with_adjusted_size(addr, pval, size,
  1219. mr->ops->impl.min_access_size,
  1220. mr->ops->impl.max_access_size,
  1221. memory_region_read_accessor,
  1222. mr, attrs);
  1223. } else if (mr->ops->read_with_attrs) {
  1224. return access_with_adjusted_size(addr, pval, size,
  1225. mr->ops->impl.min_access_size,
  1226. mr->ops->impl.max_access_size,
  1227. memory_region_read_with_attrs_accessor,
  1228. mr, attrs);
  1229. } else {
  1230. return access_with_adjusted_size(addr, pval, size, 1, 4,
  1231. memory_region_oldmmio_read_accessor,
  1232. mr, attrs);
  1233. }
  1234. }
  1235. MemTxResult memory_region_dispatch_read(MemoryRegion *mr,
  1236. hwaddr addr,
  1237. uint64_t *pval,
  1238. unsigned size,
  1239. MemTxAttrs attrs)
  1240. {
  1241. MemTxResult r;
  1242. if (!memory_region_access_valid(mr, addr, size, false, attrs)) {
  1243. *pval = unassigned_mem_read(mr, addr, size);
  1244. return MEMTX_DECODE_ERROR;
  1245. }
  1246. r = memory_region_dispatch_read1(mr, addr, pval, size, attrs);
  1247. adjust_endianness(mr, pval, size);
  1248. return r;
  1249. }
  1250. /* Return true if an eventfd was signalled */
  1251. static bool memory_region_dispatch_write_eventfds(MemoryRegion *mr,
  1252. hwaddr addr,
  1253. uint64_t data,
  1254. unsigned size,
  1255. MemTxAttrs attrs)
  1256. {
  1257. MemoryRegionIoeventfd ioeventfd = {
  1258. .addr = addrrange_make(int128_make64(addr), int128_make64(size)),
  1259. .data = data,
  1260. };
  1261. unsigned i;
  1262. for (i = 0; i < mr->ioeventfd_nb; i++) {
  1263. ioeventfd.match_data = mr->ioeventfds[i].match_data;
  1264. ioeventfd.e = mr->ioeventfds[i].e;
  1265. if (memory_region_ioeventfd_equal(&ioeventfd, &mr->ioeventfds[i])) {
  1266. event_notifier_set(ioeventfd.e);
  1267. return true;
  1268. }
  1269. }
  1270. return false;
  1271. }
  1272. MemTxResult memory_region_dispatch_write(MemoryRegion *mr,
  1273. hwaddr addr,
  1274. uint64_t data,
  1275. unsigned size,
  1276. MemTxAttrs attrs)
  1277. {
  1278. if (!memory_region_access_valid(mr, addr, size, true, attrs)) {
  1279. unassigned_mem_write(mr, addr, data, size);
  1280. return MEMTX_DECODE_ERROR;
  1281. }
  1282. adjust_endianness(mr, &data, size);
  1283. if ((!kvm_eventfds_enabled()) &&
  1284. memory_region_dispatch_write_eventfds(mr, addr, data, size, attrs)) {
  1285. return MEMTX_OK;
  1286. }
  1287. if (mr->ops->write) {
  1288. return access_with_adjusted_size(addr, &data, size,
  1289. mr->ops->impl.min_access_size,
  1290. mr->ops->impl.max_access_size,
  1291. memory_region_write_accessor, mr,
  1292. attrs);
  1293. } else if (mr->ops->write_with_attrs) {
  1294. return
  1295. access_with_adjusted_size(addr, &data, size,
  1296. mr->ops->impl.min_access_size,
  1297. mr->ops->impl.max_access_size,
  1298. memory_region_write_with_attrs_accessor,
  1299. mr, attrs);
  1300. } else {
  1301. return access_with_adjusted_size(addr, &data, size, 1, 4,
  1302. memory_region_oldmmio_write_accessor,
  1303. mr, attrs);
  1304. }
  1305. }
  1306. void memory_region_init_io(MemoryRegion *mr,
  1307. Object *owner,
  1308. const MemoryRegionOps *ops,
  1309. void *opaque,
  1310. const char *name,
  1311. uint64_t size)
  1312. {
  1313. memory_region_init(mr, owner, name, size);
  1314. mr->ops = ops ? ops : &unassigned_mem_ops;
  1315. mr->opaque = opaque;
  1316. mr->terminates = true;
  1317. }
  1318. void memory_region_init_ram_nomigrate(MemoryRegion *mr,
  1319. Object *owner,
  1320. const char *name,
  1321. uint64_t size,
  1322. Error **errp)
  1323. {
  1324. memory_region_init_ram_shared_nomigrate(mr, owner, name, size, false, errp);
  1325. }
  1326. void memory_region_init_ram_shared_nomigrate(MemoryRegion *mr,
  1327. Object *owner,
  1328. const char *name,
  1329. uint64_t size,
  1330. bool share,
  1331. Error **errp)
  1332. {
  1333. memory_region_init(mr, owner, name, size);
  1334. mr->ram = true;
  1335. mr->terminates = true;
  1336. mr->destructor = memory_region_destructor_ram;
  1337. mr->ram_block = qemu_ram_alloc(size, share, mr, errp);
  1338. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1339. }
  1340. void memory_region_init_resizeable_ram(MemoryRegion *mr,
  1341. Object *owner,
  1342. const char *name,
  1343. uint64_t size,
  1344. uint64_t max_size,
  1345. void (*resized)(const char*,
  1346. uint64_t length,
  1347. void *host),
  1348. Error **errp)
  1349. {
  1350. memory_region_init(mr, owner, name, size);
  1351. mr->ram = true;
  1352. mr->terminates = true;
  1353. mr->destructor = memory_region_destructor_ram;
  1354. mr->ram_block = qemu_ram_alloc_resizeable(size, max_size, resized,
  1355. mr, errp);
  1356. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1357. }
  1358. #ifdef __linux__
  1359. void memory_region_init_ram_from_file(MemoryRegion *mr,
  1360. struct Object *owner,
  1361. const char *name,
  1362. uint64_t size,
  1363. uint64_t align,
  1364. bool share,
  1365. const char *path,
  1366. Error **errp)
  1367. {
  1368. memory_region_init(mr, owner, name, size);
  1369. mr->ram = true;
  1370. mr->terminates = true;
  1371. mr->destructor = memory_region_destructor_ram;
  1372. mr->align = align;
  1373. mr->ram_block = qemu_ram_alloc_from_file(size, mr, share, path, errp);
  1374. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1375. }
  1376. void memory_region_init_ram_from_fd(MemoryRegion *mr,
  1377. struct Object *owner,
  1378. const char *name,
  1379. uint64_t size,
  1380. bool share,
  1381. int fd,
  1382. Error **errp)
  1383. {
  1384. memory_region_init(mr, owner, name, size);
  1385. mr->ram = true;
  1386. mr->terminates = true;
  1387. mr->destructor = memory_region_destructor_ram;
  1388. mr->ram_block = qemu_ram_alloc_from_fd(size, mr, share, fd, errp);
  1389. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1390. }
  1391. #endif
  1392. void memory_region_init_ram_ptr(MemoryRegion *mr,
  1393. Object *owner,
  1394. const char *name,
  1395. uint64_t size,
  1396. void *ptr)
  1397. {
  1398. memory_region_init(mr, owner, name, size);
  1399. mr->ram = true;
  1400. mr->terminates = true;
  1401. mr->destructor = memory_region_destructor_ram;
  1402. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1403. /* qemu_ram_alloc_from_ptr cannot fail with ptr != NULL. */
  1404. assert(ptr != NULL);
  1405. mr->ram_block = qemu_ram_alloc_from_ptr(size, ptr, mr, &error_fatal);
  1406. }
  1407. void memory_region_init_ram_device_ptr(MemoryRegion *mr,
  1408. Object *owner,
  1409. const char *name,
  1410. uint64_t size,
  1411. void *ptr)
  1412. {
  1413. memory_region_init_ram_ptr(mr, owner, name, size, ptr);
  1414. mr->ram_device = true;
  1415. mr->ops = &ram_device_mem_ops;
  1416. mr->opaque = mr;
  1417. }
  1418. void memory_region_init_alias(MemoryRegion *mr,
  1419. Object *owner,
  1420. const char *name,
  1421. MemoryRegion *orig,
  1422. hwaddr offset,
  1423. uint64_t size)
  1424. {
  1425. memory_region_init(mr, owner, name, size);
  1426. mr->alias = orig;
  1427. mr->alias_offset = offset;
  1428. }
  1429. void memory_region_init_rom_nomigrate(MemoryRegion *mr,
  1430. struct Object *owner,
  1431. const char *name,
  1432. uint64_t size,
  1433. Error **errp)
  1434. {
  1435. memory_region_init(mr, owner, name, size);
  1436. mr->ram = true;
  1437. mr->readonly = true;
  1438. mr->terminates = true;
  1439. mr->destructor = memory_region_destructor_ram;
  1440. mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
  1441. mr->dirty_log_mask = tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0;
  1442. }
  1443. void memory_region_init_rom_device_nomigrate(MemoryRegion *mr,
  1444. Object *owner,
  1445. const MemoryRegionOps *ops,
  1446. void *opaque,
  1447. const char *name,
  1448. uint64_t size,
  1449. Error **errp)
  1450. {
  1451. assert(ops);
  1452. memory_region_init(mr, owner, name, size);
  1453. mr->ops = ops;
  1454. mr->opaque = opaque;
  1455. mr->terminates = true;
  1456. mr->rom_device = true;
  1457. mr->destructor = memory_region_destructor_ram;
  1458. mr->ram_block = qemu_ram_alloc(size, false, mr, errp);
  1459. }
  1460. void memory_region_init_iommu(void *_iommu_mr,
  1461. size_t instance_size,
  1462. const char *mrtypename,
  1463. Object *owner,
  1464. const char *name,
  1465. uint64_t size)
  1466. {
  1467. struct IOMMUMemoryRegion *iommu_mr;
  1468. struct MemoryRegion *mr;
  1469. object_initialize(_iommu_mr, instance_size, mrtypename);
  1470. mr = MEMORY_REGION(_iommu_mr);
  1471. memory_region_do_init(mr, owner, name, size);
  1472. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1473. mr->terminates = true; /* then re-forwards */
  1474. QLIST_INIT(&iommu_mr->iommu_notify);
  1475. iommu_mr->iommu_notify_flags = IOMMU_NOTIFIER_NONE;
  1476. }
  1477. static void memory_region_finalize(Object *obj)
  1478. {
  1479. MemoryRegion *mr = MEMORY_REGION(obj);
  1480. assert(!mr->container);
  1481. /* We know the region is not visible in any address space (it
  1482. * does not have a container and cannot be a root either because
  1483. * it has no references, so we can blindly clear mr->enabled.
  1484. * memory_region_set_enabled instead could trigger a transaction
  1485. * and cause an infinite loop.
  1486. */
  1487. mr->enabled = false;
  1488. memory_region_transaction_begin();
  1489. while (!QTAILQ_EMPTY(&mr->subregions)) {
  1490. MemoryRegion *subregion = QTAILQ_FIRST(&mr->subregions);
  1491. memory_region_del_subregion(mr, subregion);
  1492. }
  1493. memory_region_transaction_commit();
  1494. mr->destructor(mr);
  1495. memory_region_clear_coalescing(mr);
  1496. g_free((char *)mr->name);
  1497. g_free(mr->ioeventfds);
  1498. }
  1499. Object *memory_region_owner(MemoryRegion *mr)
  1500. {
  1501. Object *obj = OBJECT(mr);
  1502. return obj->parent;
  1503. }
  1504. void memory_region_ref(MemoryRegion *mr)
  1505. {
  1506. /* MMIO callbacks most likely will access data that belongs
  1507. * to the owner, hence the need to ref/unref the owner whenever
  1508. * the memory region is in use.
  1509. *
  1510. * The memory region is a child of its owner. As long as the
  1511. * owner doesn't call unparent itself on the memory region,
  1512. * ref-ing the owner will also keep the memory region alive.
  1513. * Memory regions without an owner are supposed to never go away;
  1514. * we do not ref/unref them because it slows down DMA sensibly.
  1515. */
  1516. if (mr && mr->owner) {
  1517. object_ref(mr->owner);
  1518. }
  1519. }
  1520. void memory_region_unref(MemoryRegion *mr)
  1521. {
  1522. if (mr && mr->owner) {
  1523. object_unref(mr->owner);
  1524. }
  1525. }
  1526. uint64_t memory_region_size(MemoryRegion *mr)
  1527. {
  1528. if (int128_eq(mr->size, int128_2_64())) {
  1529. return UINT64_MAX;
  1530. }
  1531. return int128_get64(mr->size);
  1532. }
  1533. const char *memory_region_name(const MemoryRegion *mr)
  1534. {
  1535. if (!mr->name) {
  1536. ((MemoryRegion *)mr)->name =
  1537. object_get_canonical_path_component(OBJECT(mr));
  1538. }
  1539. return mr->name;
  1540. }
  1541. bool memory_region_is_ram_device(MemoryRegion *mr)
  1542. {
  1543. return mr->ram_device;
  1544. }
  1545. uint8_t memory_region_get_dirty_log_mask(MemoryRegion *mr)
  1546. {
  1547. uint8_t mask = mr->dirty_log_mask;
  1548. if (global_dirty_log && mr->ram_block) {
  1549. mask |= (1 << DIRTY_MEMORY_MIGRATION);
  1550. }
  1551. return mask;
  1552. }
  1553. bool memory_region_is_logging(MemoryRegion *mr, uint8_t client)
  1554. {
  1555. return memory_region_get_dirty_log_mask(mr) & (1 << client);
  1556. }
  1557. static void memory_region_update_iommu_notify_flags(IOMMUMemoryRegion *iommu_mr)
  1558. {
  1559. IOMMUNotifierFlag flags = IOMMU_NOTIFIER_NONE;
  1560. IOMMUNotifier *iommu_notifier;
  1561. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1562. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1563. flags |= iommu_notifier->notifier_flags;
  1564. }
  1565. if (flags != iommu_mr->iommu_notify_flags && imrc->notify_flag_changed) {
  1566. imrc->notify_flag_changed(iommu_mr,
  1567. iommu_mr->iommu_notify_flags,
  1568. flags);
  1569. }
  1570. iommu_mr->iommu_notify_flags = flags;
  1571. }
  1572. void memory_region_register_iommu_notifier(MemoryRegion *mr,
  1573. IOMMUNotifier *n)
  1574. {
  1575. IOMMUMemoryRegion *iommu_mr;
  1576. if (mr->alias) {
  1577. memory_region_register_iommu_notifier(mr->alias, n);
  1578. return;
  1579. }
  1580. /* We need to register for at least one bitfield */
  1581. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1582. assert(n->notifier_flags != IOMMU_NOTIFIER_NONE);
  1583. assert(n->start <= n->end);
  1584. assert(n->iommu_idx >= 0 &&
  1585. n->iommu_idx < memory_region_iommu_num_indexes(iommu_mr));
  1586. QLIST_INSERT_HEAD(&iommu_mr->iommu_notify, n, node);
  1587. memory_region_update_iommu_notify_flags(iommu_mr);
  1588. }
  1589. uint64_t memory_region_iommu_get_min_page_size(IOMMUMemoryRegion *iommu_mr)
  1590. {
  1591. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1592. if (imrc->get_min_page_size) {
  1593. return imrc->get_min_page_size(iommu_mr);
  1594. }
  1595. return TARGET_PAGE_SIZE;
  1596. }
  1597. void memory_region_iommu_replay(IOMMUMemoryRegion *iommu_mr, IOMMUNotifier *n)
  1598. {
  1599. MemoryRegion *mr = MEMORY_REGION(iommu_mr);
  1600. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1601. hwaddr addr, granularity;
  1602. IOMMUTLBEntry iotlb;
  1603. /* If the IOMMU has its own replay callback, override */
  1604. if (imrc->replay) {
  1605. imrc->replay(iommu_mr, n);
  1606. return;
  1607. }
  1608. granularity = memory_region_iommu_get_min_page_size(iommu_mr);
  1609. for (addr = 0; addr < memory_region_size(mr); addr += granularity) {
  1610. iotlb = imrc->translate(iommu_mr, addr, IOMMU_NONE, n->iommu_idx);
  1611. if (iotlb.perm != IOMMU_NONE) {
  1612. n->notify(n, &iotlb);
  1613. }
  1614. /* if (2^64 - MR size) < granularity, it's possible to get an
  1615. * infinite loop here. This should catch such a wraparound */
  1616. if ((addr + granularity) < addr) {
  1617. break;
  1618. }
  1619. }
  1620. }
  1621. void memory_region_iommu_replay_all(IOMMUMemoryRegion *iommu_mr)
  1622. {
  1623. IOMMUNotifier *notifier;
  1624. IOMMU_NOTIFIER_FOREACH(notifier, iommu_mr) {
  1625. memory_region_iommu_replay(iommu_mr, notifier);
  1626. }
  1627. }
  1628. void memory_region_unregister_iommu_notifier(MemoryRegion *mr,
  1629. IOMMUNotifier *n)
  1630. {
  1631. IOMMUMemoryRegion *iommu_mr;
  1632. if (mr->alias) {
  1633. memory_region_unregister_iommu_notifier(mr->alias, n);
  1634. return;
  1635. }
  1636. QLIST_REMOVE(n, node);
  1637. iommu_mr = IOMMU_MEMORY_REGION(mr);
  1638. memory_region_update_iommu_notify_flags(iommu_mr);
  1639. }
  1640. void memory_region_notify_one(IOMMUNotifier *notifier,
  1641. IOMMUTLBEntry *entry)
  1642. {
  1643. IOMMUNotifierFlag request_flags;
  1644. /*
  1645. * Skip the notification if the notification does not overlap
  1646. * with registered range.
  1647. */
  1648. if (notifier->start > entry->iova + entry->addr_mask ||
  1649. notifier->end < entry->iova) {
  1650. return;
  1651. }
  1652. if (entry->perm & IOMMU_RW) {
  1653. request_flags = IOMMU_NOTIFIER_MAP;
  1654. } else {
  1655. request_flags = IOMMU_NOTIFIER_UNMAP;
  1656. }
  1657. if (notifier->notifier_flags & request_flags) {
  1658. notifier->notify(notifier, entry);
  1659. }
  1660. }
  1661. void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr,
  1662. int iommu_idx,
  1663. IOMMUTLBEntry entry)
  1664. {
  1665. IOMMUNotifier *iommu_notifier;
  1666. assert(memory_region_is_iommu(MEMORY_REGION(iommu_mr)));
  1667. IOMMU_NOTIFIER_FOREACH(iommu_notifier, iommu_mr) {
  1668. if (iommu_notifier->iommu_idx == iommu_idx) {
  1669. memory_region_notify_one(iommu_notifier, &entry);
  1670. }
  1671. }
  1672. }
  1673. int memory_region_iommu_get_attr(IOMMUMemoryRegion *iommu_mr,
  1674. enum IOMMUMemoryRegionAttr attr,
  1675. void *data)
  1676. {
  1677. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1678. if (!imrc->get_attr) {
  1679. return -EINVAL;
  1680. }
  1681. return imrc->get_attr(iommu_mr, attr, data);
  1682. }
  1683. int memory_region_iommu_attrs_to_index(IOMMUMemoryRegion *iommu_mr,
  1684. MemTxAttrs attrs)
  1685. {
  1686. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1687. if (!imrc->attrs_to_index) {
  1688. return 0;
  1689. }
  1690. return imrc->attrs_to_index(iommu_mr, attrs);
  1691. }
  1692. int memory_region_iommu_num_indexes(IOMMUMemoryRegion *iommu_mr)
  1693. {
  1694. IOMMUMemoryRegionClass *imrc = IOMMU_MEMORY_REGION_GET_CLASS(iommu_mr);
  1695. if (!imrc->num_indexes) {
  1696. return 1;
  1697. }
  1698. return imrc->num_indexes(iommu_mr);
  1699. }
  1700. void memory_region_set_log(MemoryRegion *mr, bool log, unsigned client)
  1701. {
  1702. uint8_t mask = 1 << client;
  1703. uint8_t old_logging;
  1704. assert(client == DIRTY_MEMORY_VGA);
  1705. old_logging = mr->vga_logging_count;
  1706. mr->vga_logging_count += log ? 1 : -1;
  1707. if (!!old_logging == !!mr->vga_logging_count) {
  1708. return;
  1709. }
  1710. memory_region_transaction_begin();
  1711. mr->dirty_log_mask = (mr->dirty_log_mask & ~mask) | (log * mask);
  1712. memory_region_update_pending |= mr->enabled;
  1713. memory_region_transaction_commit();
  1714. }
  1715. bool memory_region_get_dirty(MemoryRegion *mr, hwaddr addr,
  1716. hwaddr size, unsigned client)
  1717. {
  1718. assert(mr->ram_block);
  1719. return cpu_physical_memory_get_dirty(memory_region_get_ram_addr(mr) + addr,
  1720. size, client);
  1721. }
  1722. void memory_region_set_dirty(MemoryRegion *mr, hwaddr addr,
  1723. hwaddr size)
  1724. {
  1725. assert(mr->ram_block);
  1726. cpu_physical_memory_set_dirty_range(memory_region_get_ram_addr(mr) + addr,
  1727. size,
  1728. memory_region_get_dirty_log_mask(mr));
  1729. }
  1730. static void memory_region_sync_dirty_bitmap(MemoryRegion *mr)
  1731. {
  1732. MemoryListener *listener;
  1733. AddressSpace *as;
  1734. FlatView *view;
  1735. FlatRange *fr;
  1736. /* If the same address space has multiple log_sync listeners, we
  1737. * visit that address space's FlatView multiple times. But because
  1738. * log_sync listeners are rare, it's still cheaper than walking each
  1739. * address space once.
  1740. */
  1741. QTAILQ_FOREACH(listener, &memory_listeners, link) {
  1742. if (!listener->log_sync) {
  1743. continue;
  1744. }
  1745. as = listener->address_space;
  1746. view = address_space_get_flatview(as);
  1747. FOR_EACH_FLAT_RANGE(fr, view) {
  1748. if (fr->dirty_log_mask && (!mr || fr->mr == mr)) {
  1749. MemoryRegionSection mrs = section_from_flat_range(fr, view);
  1750. listener->log_sync(listener, &mrs);
  1751. }
  1752. }
  1753. flatview_unref(view);
  1754. }
  1755. }
  1756. DirtyBitmapSnapshot *memory_region_snapshot_and_clear_dirty(MemoryRegion *mr,
  1757. hwaddr addr,
  1758. hwaddr size,
  1759. unsigned client)
  1760. {
  1761. assert(mr->ram_block);
  1762. memory_region_sync_dirty_bitmap(mr);
  1763. return cpu_physical_memory_snapshot_and_clear_dirty(
  1764. memory_region_get_ram_addr(mr) + addr, size, client);
  1765. }
  1766. bool memory_region_snapshot_get_dirty(MemoryRegion *mr, DirtyBitmapSnapshot *snap,
  1767. hwaddr addr, hwaddr size)
  1768. {
  1769. assert(mr->ram_block);
  1770. return cpu_physical_memory_snapshot_get_dirty(snap,
  1771. memory_region_get_ram_addr(mr) + addr, size);
  1772. }
  1773. void memory_region_set_readonly(MemoryRegion *mr, bool readonly)
  1774. {
  1775. if (mr->readonly != readonly) {
  1776. memory_region_transaction_begin();
  1777. mr->readonly = readonly;
  1778. memory_region_update_pending |= mr->enabled;
  1779. memory_region_transaction_commit();
  1780. }
  1781. }
  1782. void memory_region_rom_device_set_romd(MemoryRegion *mr, bool romd_mode)
  1783. {
  1784. if (mr->romd_mode != romd_mode) {
  1785. memory_region_transaction_begin();
  1786. mr->romd_mode = romd_mode;
  1787. memory_region_update_pending |= mr->enabled;
  1788. memory_region_transaction_commit();
  1789. }
  1790. }
  1791. void memory_region_reset_dirty(MemoryRegion *mr, hwaddr addr,
  1792. hwaddr size, unsigned client)
  1793. {
  1794. assert(mr->ram_block);
  1795. cpu_physical_memory_test_and_clear_dirty(
  1796. memory_region_get_ram_addr(mr) + addr, size, client);
  1797. }
  1798. int memory_region_get_fd(MemoryRegion *mr)
  1799. {
  1800. int fd;
  1801. rcu_read_lock();
  1802. while (mr->alias) {
  1803. mr = mr->alias;
  1804. }
  1805. fd = mr->ram_block->fd;
  1806. rcu_read_unlock();
  1807. return fd;
  1808. }
  1809. void *memory_region_get_ram_ptr(MemoryRegion *mr)
  1810. {
  1811. void *ptr;
  1812. uint64_t offset = 0;
  1813. rcu_read_lock();
  1814. while (mr->alias) {
  1815. offset += mr->alias_offset;
  1816. mr = mr->alias;
  1817. }
  1818. assert(mr->ram_block);
  1819. ptr = qemu_map_ram_ptr(mr->ram_block, offset);
  1820. rcu_read_unlock();
  1821. return ptr;
  1822. }
  1823. MemoryRegion *memory_region_from_host(void *ptr, ram_addr_t *offset)
  1824. {
  1825. RAMBlock *block;
  1826. block = qemu_ram_block_from_host(ptr, false, offset);
  1827. if (!block) {
  1828. return NULL;
  1829. }
  1830. return block->mr;
  1831. }
  1832. ram_addr_t memory_region_get_ram_addr(MemoryRegion *mr)
  1833. {
  1834. return mr->ram_block ? mr->ram_block->offset : RAM_ADDR_INVALID;
  1835. }
  1836. void memory_region_ram_resize(MemoryRegion *mr, ram_addr_t newsize, Error **errp)
  1837. {
  1838. assert(mr->ram_block);
  1839. qemu_ram_resize(mr->ram_block, newsize, errp);
  1840. }
  1841. static void memory_region_update_coalesced_range_as(MemoryRegion *mr, AddressSpace *as)
  1842. {
  1843. FlatView *view;
  1844. FlatRange *fr;
  1845. CoalescedMemoryRange *cmr;
  1846. AddrRange tmp;
  1847. MemoryRegionSection section;
  1848. view = address_space_get_flatview(as);
  1849. FOR_EACH_FLAT_RANGE(fr, view) {
  1850. if (fr->mr == mr) {
  1851. section = (MemoryRegionSection) {
  1852. .fv = view,
  1853. .offset_within_address_space = int128_get64(fr->addr.start),
  1854. .size = fr->addr.size,
  1855. };
  1856. MEMORY_LISTENER_CALL(as, coalesced_mmio_del, Reverse, &section,
  1857. int128_get64(fr->addr.start),
  1858. int128_get64(fr->addr.size));
  1859. QTAILQ_FOREACH(cmr, &mr->coalesced, link) {
  1860. tmp = addrrange_shift(cmr->addr,
  1861. int128_sub(fr->addr.start,
  1862. int128_make64(fr->offset_in_region)));
  1863. if (!addrrange_intersects(tmp, fr->addr)) {
  1864. continue;
  1865. }
  1866. tmp = addrrange_intersection(tmp, fr->addr);
  1867. MEMORY_LISTENER_CALL(as, coalesced_mmio_add, Forward, &section,
  1868. int128_get64(tmp.start),
  1869. int128_get64(tmp.size));
  1870. }
  1871. }
  1872. }
  1873. flatview_unref(view);
  1874. }
  1875. static void memory_region_update_coalesced_range(MemoryRegion *mr)
  1876. {
  1877. AddressSpace *as;
  1878. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  1879. memory_region_update_coalesced_range_as(mr, as);
  1880. }
  1881. }
  1882. void memory_region_set_coalescing(MemoryRegion *mr)
  1883. {
  1884. memory_region_clear_coalescing(mr);
  1885. memory_region_add_coalescing(mr, 0, int128_get64(mr->size));
  1886. }
  1887. void memory_region_add_coalescing(MemoryRegion *mr,
  1888. hwaddr offset,
  1889. uint64_t size)
  1890. {
  1891. CoalescedMemoryRange *cmr = g_malloc(sizeof(*cmr));
  1892. cmr->addr = addrrange_make(int128_make64(offset), int128_make64(size));
  1893. QTAILQ_INSERT_TAIL(&mr->coalesced, cmr, link);
  1894. memory_region_update_coalesced_range(mr);
  1895. memory_region_set_flush_coalesced(mr);
  1896. }
  1897. void memory_region_clear_coalescing(MemoryRegion *mr)
  1898. {
  1899. CoalescedMemoryRange *cmr;
  1900. bool updated = false;
  1901. qemu_flush_coalesced_mmio_buffer();
  1902. mr->flush_coalesced_mmio = false;
  1903. while (!QTAILQ_EMPTY(&mr->coalesced)) {
  1904. cmr = QTAILQ_FIRST(&mr->coalesced);
  1905. QTAILQ_REMOVE(&mr->coalesced, cmr, link);
  1906. g_free(cmr);
  1907. updated = true;
  1908. }
  1909. if (updated) {
  1910. memory_region_update_coalesced_range(mr);
  1911. }
  1912. }
  1913. void memory_region_set_flush_coalesced(MemoryRegion *mr)
  1914. {
  1915. mr->flush_coalesced_mmio = true;
  1916. }
  1917. void memory_region_clear_flush_coalesced(MemoryRegion *mr)
  1918. {
  1919. qemu_flush_coalesced_mmio_buffer();
  1920. if (QTAILQ_EMPTY(&mr->coalesced)) {
  1921. mr->flush_coalesced_mmio = false;
  1922. }
  1923. }
  1924. void memory_region_clear_global_locking(MemoryRegion *mr)
  1925. {
  1926. mr->global_locking = false;
  1927. }
  1928. static bool userspace_eventfd_warning;
  1929. void memory_region_add_eventfd(MemoryRegion *mr,
  1930. hwaddr addr,
  1931. unsigned size,
  1932. bool match_data,
  1933. uint64_t data,
  1934. EventNotifier *e)
  1935. {
  1936. MemoryRegionIoeventfd mrfd = {
  1937. .addr.start = int128_make64(addr),
  1938. .addr.size = int128_make64(size),
  1939. .match_data = match_data,
  1940. .data = data,
  1941. .e = e,
  1942. };
  1943. unsigned i;
  1944. if (kvm_enabled() && (!(kvm_eventfds_enabled() ||
  1945. userspace_eventfd_warning))) {
  1946. userspace_eventfd_warning = true;
  1947. error_report("Using eventfd without MMIO binding in KVM. "
  1948. "Suboptimal performance expected");
  1949. }
  1950. if (size) {
  1951. adjust_endianness(mr, &mrfd.data, size);
  1952. }
  1953. memory_region_transaction_begin();
  1954. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1955. if (memory_region_ioeventfd_before(&mrfd, &mr->ioeventfds[i])) {
  1956. break;
  1957. }
  1958. }
  1959. ++mr->ioeventfd_nb;
  1960. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1961. sizeof(*mr->ioeventfds) * mr->ioeventfd_nb);
  1962. memmove(&mr->ioeventfds[i+1], &mr->ioeventfds[i],
  1963. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb-1 - i));
  1964. mr->ioeventfds[i] = mrfd;
  1965. ioeventfd_update_pending |= mr->enabled;
  1966. memory_region_transaction_commit();
  1967. }
  1968. void memory_region_del_eventfd(MemoryRegion *mr,
  1969. hwaddr addr,
  1970. unsigned size,
  1971. bool match_data,
  1972. uint64_t data,
  1973. EventNotifier *e)
  1974. {
  1975. MemoryRegionIoeventfd mrfd = {
  1976. .addr.start = int128_make64(addr),
  1977. .addr.size = int128_make64(size),
  1978. .match_data = match_data,
  1979. .data = data,
  1980. .e = e,
  1981. };
  1982. unsigned i;
  1983. if (size) {
  1984. adjust_endianness(mr, &mrfd.data, size);
  1985. }
  1986. memory_region_transaction_begin();
  1987. for (i = 0; i < mr->ioeventfd_nb; ++i) {
  1988. if (memory_region_ioeventfd_equal(&mrfd, &mr->ioeventfds[i])) {
  1989. break;
  1990. }
  1991. }
  1992. assert(i != mr->ioeventfd_nb);
  1993. memmove(&mr->ioeventfds[i], &mr->ioeventfds[i+1],
  1994. sizeof(*mr->ioeventfds) * (mr->ioeventfd_nb - (i+1)));
  1995. --mr->ioeventfd_nb;
  1996. mr->ioeventfds = g_realloc(mr->ioeventfds,
  1997. sizeof(*mr->ioeventfds)*mr->ioeventfd_nb + 1);
  1998. ioeventfd_update_pending |= mr->enabled;
  1999. memory_region_transaction_commit();
  2000. }
  2001. static void memory_region_update_container_subregions(MemoryRegion *subregion)
  2002. {
  2003. MemoryRegion *mr = subregion->container;
  2004. MemoryRegion *other;
  2005. memory_region_transaction_begin();
  2006. memory_region_ref(subregion);
  2007. QTAILQ_FOREACH(other, &mr->subregions, subregions_link) {
  2008. if (subregion->priority >= other->priority) {
  2009. QTAILQ_INSERT_BEFORE(other, subregion, subregions_link);
  2010. goto done;
  2011. }
  2012. }
  2013. QTAILQ_INSERT_TAIL(&mr->subregions, subregion, subregions_link);
  2014. done:
  2015. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2016. memory_region_transaction_commit();
  2017. }
  2018. static void memory_region_add_subregion_common(MemoryRegion *mr,
  2019. hwaddr offset,
  2020. MemoryRegion *subregion)
  2021. {
  2022. assert(!subregion->container);
  2023. subregion->container = mr;
  2024. subregion->addr = offset;
  2025. memory_region_update_container_subregions(subregion);
  2026. }
  2027. void memory_region_add_subregion(MemoryRegion *mr,
  2028. hwaddr offset,
  2029. MemoryRegion *subregion)
  2030. {
  2031. subregion->priority = 0;
  2032. memory_region_add_subregion_common(mr, offset, subregion);
  2033. }
  2034. void memory_region_add_subregion_overlap(MemoryRegion *mr,
  2035. hwaddr offset,
  2036. MemoryRegion *subregion,
  2037. int priority)
  2038. {
  2039. subregion->priority = priority;
  2040. memory_region_add_subregion_common(mr, offset, subregion);
  2041. }
  2042. void memory_region_del_subregion(MemoryRegion *mr,
  2043. MemoryRegion *subregion)
  2044. {
  2045. memory_region_transaction_begin();
  2046. assert(subregion->container == mr);
  2047. subregion->container = NULL;
  2048. QTAILQ_REMOVE(&mr->subregions, subregion, subregions_link);
  2049. memory_region_unref(subregion);
  2050. memory_region_update_pending |= mr->enabled && subregion->enabled;
  2051. memory_region_transaction_commit();
  2052. }
  2053. void memory_region_set_enabled(MemoryRegion *mr, bool enabled)
  2054. {
  2055. if (enabled == mr->enabled) {
  2056. return;
  2057. }
  2058. memory_region_transaction_begin();
  2059. mr->enabled = enabled;
  2060. memory_region_update_pending = true;
  2061. memory_region_transaction_commit();
  2062. }
  2063. void memory_region_set_size(MemoryRegion *mr, uint64_t size)
  2064. {
  2065. Int128 s = int128_make64(size);
  2066. if (size == UINT64_MAX) {
  2067. s = int128_2_64();
  2068. }
  2069. if (int128_eq(s, mr->size)) {
  2070. return;
  2071. }
  2072. memory_region_transaction_begin();
  2073. mr->size = s;
  2074. memory_region_update_pending = true;
  2075. memory_region_transaction_commit();
  2076. }
  2077. static void memory_region_readd_subregion(MemoryRegion *mr)
  2078. {
  2079. MemoryRegion *container = mr->container;
  2080. if (container) {
  2081. memory_region_transaction_begin();
  2082. memory_region_ref(mr);
  2083. memory_region_del_subregion(container, mr);
  2084. mr->container = container;
  2085. memory_region_update_container_subregions(mr);
  2086. memory_region_unref(mr);
  2087. memory_region_transaction_commit();
  2088. }
  2089. }
  2090. void memory_region_set_address(MemoryRegion *mr, hwaddr addr)
  2091. {
  2092. if (addr != mr->addr) {
  2093. mr->addr = addr;
  2094. memory_region_readd_subregion(mr);
  2095. }
  2096. }
  2097. void memory_region_set_alias_offset(MemoryRegion *mr, hwaddr offset)
  2098. {
  2099. assert(mr->alias);
  2100. if (offset == mr->alias_offset) {
  2101. return;
  2102. }
  2103. memory_region_transaction_begin();
  2104. mr->alias_offset = offset;
  2105. memory_region_update_pending |= mr->enabled;
  2106. memory_region_transaction_commit();
  2107. }
  2108. uint64_t memory_region_get_alignment(const MemoryRegion *mr)
  2109. {
  2110. return mr->align;
  2111. }
  2112. static int cmp_flatrange_addr(const void *addr_, const void *fr_)
  2113. {
  2114. const AddrRange *addr = addr_;
  2115. const FlatRange *fr = fr_;
  2116. if (int128_le(addrrange_end(*addr), fr->addr.start)) {
  2117. return -1;
  2118. } else if (int128_ge(addr->start, addrrange_end(fr->addr))) {
  2119. return 1;
  2120. }
  2121. return 0;
  2122. }
  2123. static FlatRange *flatview_lookup(FlatView *view, AddrRange addr)
  2124. {
  2125. return bsearch(&addr, view->ranges, view->nr,
  2126. sizeof(FlatRange), cmp_flatrange_addr);
  2127. }
  2128. bool memory_region_is_mapped(MemoryRegion *mr)
  2129. {
  2130. return mr->container ? true : false;
  2131. }
  2132. /* Same as memory_region_find, but it does not add a reference to the
  2133. * returned region. It must be called from an RCU critical section.
  2134. */
  2135. static MemoryRegionSection memory_region_find_rcu(MemoryRegion *mr,
  2136. hwaddr addr, uint64_t size)
  2137. {
  2138. MemoryRegionSection ret = { .mr = NULL };
  2139. MemoryRegion *root;
  2140. AddressSpace *as;
  2141. AddrRange range;
  2142. FlatView *view;
  2143. FlatRange *fr;
  2144. addr += mr->addr;
  2145. for (root = mr; root->container; ) {
  2146. root = root->container;
  2147. addr += root->addr;
  2148. }
  2149. as = memory_region_to_address_space(root);
  2150. if (!as) {
  2151. return ret;
  2152. }
  2153. range = addrrange_make(int128_make64(addr), int128_make64(size));
  2154. view = address_space_to_flatview(as);
  2155. fr = flatview_lookup(view, range);
  2156. if (!fr) {
  2157. return ret;
  2158. }
  2159. while (fr > view->ranges && addrrange_intersects(fr[-1].addr, range)) {
  2160. --fr;
  2161. }
  2162. ret.mr = fr->mr;
  2163. ret.fv = view;
  2164. range = addrrange_intersection(range, fr->addr);
  2165. ret.offset_within_region = fr->offset_in_region;
  2166. ret.offset_within_region += int128_get64(int128_sub(range.start,
  2167. fr->addr.start));
  2168. ret.size = range.size;
  2169. ret.offset_within_address_space = int128_get64(range.start);
  2170. ret.readonly = fr->readonly;
  2171. return ret;
  2172. }
  2173. MemoryRegionSection memory_region_find(MemoryRegion *mr,
  2174. hwaddr addr, uint64_t size)
  2175. {
  2176. MemoryRegionSection ret;
  2177. rcu_read_lock();
  2178. ret = memory_region_find_rcu(mr, addr, size);
  2179. if (ret.mr) {
  2180. memory_region_ref(ret.mr);
  2181. }
  2182. rcu_read_unlock();
  2183. return ret;
  2184. }
  2185. bool memory_region_present(MemoryRegion *container, hwaddr addr)
  2186. {
  2187. MemoryRegion *mr;
  2188. rcu_read_lock();
  2189. mr = memory_region_find_rcu(container, addr, 1).mr;
  2190. rcu_read_unlock();
  2191. return mr && mr != container;
  2192. }
  2193. void memory_global_dirty_log_sync(void)
  2194. {
  2195. memory_region_sync_dirty_bitmap(NULL);
  2196. }
  2197. static VMChangeStateEntry *vmstate_change;
  2198. void memory_global_dirty_log_start(void)
  2199. {
  2200. if (vmstate_change) {
  2201. qemu_del_vm_change_state_handler(vmstate_change);
  2202. vmstate_change = NULL;
  2203. }
  2204. global_dirty_log = true;
  2205. MEMORY_LISTENER_CALL_GLOBAL(log_global_start, Forward);
  2206. /* Refresh DIRTY_LOG_MIGRATION bit. */
  2207. memory_region_transaction_begin();
  2208. memory_region_update_pending = true;
  2209. memory_region_transaction_commit();
  2210. }
  2211. static void memory_global_dirty_log_do_stop(void)
  2212. {
  2213. global_dirty_log = false;
  2214. /* Refresh DIRTY_LOG_MIGRATION bit. */
  2215. memory_region_transaction_begin();
  2216. memory_region_update_pending = true;
  2217. memory_region_transaction_commit();
  2218. MEMORY_LISTENER_CALL_GLOBAL(log_global_stop, Reverse);
  2219. }
  2220. static void memory_vm_change_state_handler(void *opaque, int running,
  2221. RunState state)
  2222. {
  2223. if (running) {
  2224. memory_global_dirty_log_do_stop();
  2225. if (vmstate_change) {
  2226. qemu_del_vm_change_state_handler(vmstate_change);
  2227. vmstate_change = NULL;
  2228. }
  2229. }
  2230. }
  2231. void memory_global_dirty_log_stop(void)
  2232. {
  2233. if (!runstate_is_running()) {
  2234. if (vmstate_change) {
  2235. return;
  2236. }
  2237. vmstate_change = qemu_add_vm_change_state_handler(
  2238. memory_vm_change_state_handler, NULL);
  2239. return;
  2240. }
  2241. memory_global_dirty_log_do_stop();
  2242. }
  2243. static void listener_add_address_space(MemoryListener *listener,
  2244. AddressSpace *as)
  2245. {
  2246. FlatView *view;
  2247. FlatRange *fr;
  2248. if (listener->begin) {
  2249. listener->begin(listener);
  2250. }
  2251. if (global_dirty_log) {
  2252. if (listener->log_global_start) {
  2253. listener->log_global_start(listener);
  2254. }
  2255. }
  2256. view = address_space_get_flatview(as);
  2257. FOR_EACH_FLAT_RANGE(fr, view) {
  2258. MemoryRegionSection section = section_from_flat_range(fr, view);
  2259. if (listener->region_add) {
  2260. listener->region_add(listener, &section);
  2261. }
  2262. if (fr->dirty_log_mask && listener->log_start) {
  2263. listener->log_start(listener, &section, 0, fr->dirty_log_mask);
  2264. }
  2265. }
  2266. if (listener->commit) {
  2267. listener->commit(listener);
  2268. }
  2269. flatview_unref(view);
  2270. }
  2271. static void listener_del_address_space(MemoryListener *listener,
  2272. AddressSpace *as)
  2273. {
  2274. FlatView *view;
  2275. FlatRange *fr;
  2276. if (listener->begin) {
  2277. listener->begin(listener);
  2278. }
  2279. view = address_space_get_flatview(as);
  2280. FOR_EACH_FLAT_RANGE(fr, view) {
  2281. MemoryRegionSection section = section_from_flat_range(fr, view);
  2282. if (fr->dirty_log_mask && listener->log_stop) {
  2283. listener->log_stop(listener, &section, fr->dirty_log_mask, 0);
  2284. }
  2285. if (listener->region_del) {
  2286. listener->region_del(listener, &section);
  2287. }
  2288. }
  2289. if (listener->commit) {
  2290. listener->commit(listener);
  2291. }
  2292. flatview_unref(view);
  2293. }
  2294. void memory_listener_register(MemoryListener *listener, AddressSpace *as)
  2295. {
  2296. MemoryListener *other = NULL;
  2297. listener->address_space = as;
  2298. if (QTAILQ_EMPTY(&memory_listeners)
  2299. || listener->priority >= QTAILQ_LAST(&memory_listeners,
  2300. memory_listeners)->priority) {
  2301. QTAILQ_INSERT_TAIL(&memory_listeners, listener, link);
  2302. } else {
  2303. QTAILQ_FOREACH(other, &memory_listeners, link) {
  2304. if (listener->priority < other->priority) {
  2305. break;
  2306. }
  2307. }
  2308. QTAILQ_INSERT_BEFORE(other, listener, link);
  2309. }
  2310. if (QTAILQ_EMPTY(&as->listeners)
  2311. || listener->priority >= QTAILQ_LAST(&as->listeners,
  2312. memory_listeners)->priority) {
  2313. QTAILQ_INSERT_TAIL(&as->listeners, listener, link_as);
  2314. } else {
  2315. QTAILQ_FOREACH(other, &as->listeners, link_as) {
  2316. if (listener->priority < other->priority) {
  2317. break;
  2318. }
  2319. }
  2320. QTAILQ_INSERT_BEFORE(other, listener, link_as);
  2321. }
  2322. listener_add_address_space(listener, as);
  2323. }
  2324. void memory_listener_unregister(MemoryListener *listener)
  2325. {
  2326. if (!listener->address_space) {
  2327. return;
  2328. }
  2329. listener_del_address_space(listener, listener->address_space);
  2330. QTAILQ_REMOVE(&memory_listeners, listener, link);
  2331. QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as);
  2332. listener->address_space = NULL;
  2333. }
  2334. bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr)
  2335. {
  2336. void *host;
  2337. unsigned size = 0;
  2338. unsigned offset = 0;
  2339. Object *new_interface;
  2340. if (!mr || !mr->ops->request_ptr) {
  2341. return false;
  2342. }
  2343. /*
  2344. * Avoid an update if the request_ptr call
  2345. * memory_region_invalidate_mmio_ptr which seems to be likely when we use
  2346. * a cache.
  2347. */
  2348. memory_region_transaction_begin();
  2349. host = mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &offset);
  2350. if (!host || !size) {
  2351. memory_region_transaction_commit();
  2352. return false;
  2353. }
  2354. new_interface = object_new("mmio_interface");
  2355. qdev_prop_set_uint64(DEVICE(new_interface), "start", offset);
  2356. qdev_prop_set_uint64(DEVICE(new_interface), "end", offset + size - 1);
  2357. qdev_prop_set_bit(DEVICE(new_interface), "ro", true);
  2358. qdev_prop_set_ptr(DEVICE(new_interface), "host_ptr", host);
  2359. qdev_prop_set_ptr(DEVICE(new_interface), "subregion", mr);
  2360. object_property_set_bool(OBJECT(new_interface), true, "realized", NULL);
  2361. memory_region_transaction_commit();
  2362. return true;
  2363. }
  2364. typedef struct MMIOPtrInvalidate {
  2365. MemoryRegion *mr;
  2366. hwaddr offset;
  2367. unsigned size;
  2368. int busy;
  2369. int allocated;
  2370. } MMIOPtrInvalidate;
  2371. #define MAX_MMIO_INVALIDATE 10
  2372. static MMIOPtrInvalidate mmio_ptr_invalidate_list[MAX_MMIO_INVALIDATE];
  2373. static void memory_region_do_invalidate_mmio_ptr(CPUState *cpu,
  2374. run_on_cpu_data data)
  2375. {
  2376. MMIOPtrInvalidate *invalidate_data = (MMIOPtrInvalidate *)data.host_ptr;
  2377. MemoryRegion *mr = invalidate_data->mr;
  2378. hwaddr offset = invalidate_data->offset;
  2379. unsigned size = invalidate_data->size;
  2380. MemoryRegionSection section = memory_region_find(mr, offset, size);
  2381. qemu_mutex_lock_iothread();
  2382. /* Reset dirty so this doesn't happen later. */
  2383. cpu_physical_memory_test_and_clear_dirty(offset, size, 1);
  2384. if (section.mr != mr) {
  2385. /* memory_region_find add a ref on section.mr */
  2386. memory_region_unref(section.mr);
  2387. if (MMIO_INTERFACE(section.mr->owner)) {
  2388. /* We found the interface just drop it. */
  2389. object_property_set_bool(section.mr->owner, false, "realized",
  2390. NULL);
  2391. object_unref(section.mr->owner);
  2392. object_unparent(section.mr->owner);
  2393. }
  2394. }
  2395. qemu_mutex_unlock_iothread();
  2396. if (invalidate_data->allocated) {
  2397. g_free(invalidate_data);
  2398. } else {
  2399. invalidate_data->busy = 0;
  2400. }
  2401. }
  2402. void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset,
  2403. unsigned size)
  2404. {
  2405. size_t i;
  2406. MMIOPtrInvalidate *invalidate_data = NULL;
  2407. for (i = 0; i < MAX_MMIO_INVALIDATE; i++) {
  2408. if (atomic_cmpxchg(&(mmio_ptr_invalidate_list[i].busy), 0, 1) == 0) {
  2409. invalidate_data = &mmio_ptr_invalidate_list[i];
  2410. break;
  2411. }
  2412. }
  2413. if (!invalidate_data) {
  2414. invalidate_data = g_malloc0(sizeof(MMIOPtrInvalidate));
  2415. invalidate_data->allocated = 1;
  2416. }
  2417. invalidate_data->mr = mr;
  2418. invalidate_data->offset = offset;
  2419. invalidate_data->size = size;
  2420. async_safe_run_on_cpu(first_cpu, memory_region_do_invalidate_mmio_ptr,
  2421. RUN_ON_CPU_HOST_PTR(invalidate_data));
  2422. }
  2423. void address_space_init(AddressSpace *as, MemoryRegion *root, const char *name)
  2424. {
  2425. memory_region_ref(root);
  2426. as->root = root;
  2427. as->current_map = NULL;
  2428. as->ioeventfd_nb = 0;
  2429. as->ioeventfds = NULL;
  2430. QTAILQ_INIT(&as->listeners);
  2431. QTAILQ_INSERT_TAIL(&address_spaces, as, address_spaces_link);
  2432. as->name = g_strdup(name ? name : "anonymous");
  2433. address_space_update_topology(as);
  2434. address_space_update_ioeventfds(as);
  2435. }
  2436. static void do_address_space_destroy(AddressSpace *as)
  2437. {
  2438. assert(QTAILQ_EMPTY(&as->listeners));
  2439. flatview_unref(as->current_map);
  2440. g_free(as->name);
  2441. g_free(as->ioeventfds);
  2442. memory_region_unref(as->root);
  2443. }
  2444. void address_space_destroy(AddressSpace *as)
  2445. {
  2446. MemoryRegion *root = as->root;
  2447. /* Flush out anything from MemoryListeners listening in on this */
  2448. memory_region_transaction_begin();
  2449. as->root = NULL;
  2450. memory_region_transaction_commit();
  2451. QTAILQ_REMOVE(&address_spaces, as, address_spaces_link);
  2452. /* At this point, as->dispatch and as->current_map are dummy
  2453. * entries that the guest should never use. Wait for the old
  2454. * values to expire before freeing the data.
  2455. */
  2456. as->root = root;
  2457. call_rcu(as, do_address_space_destroy, rcu);
  2458. }
  2459. static const char *memory_region_type(MemoryRegion *mr)
  2460. {
  2461. if (memory_region_is_ram_device(mr)) {
  2462. return "ramd";
  2463. } else if (memory_region_is_romd(mr)) {
  2464. return "romd";
  2465. } else if (memory_region_is_rom(mr)) {
  2466. return "rom";
  2467. } else if (memory_region_is_ram(mr)) {
  2468. return "ram";
  2469. } else {
  2470. return "i/o";
  2471. }
  2472. }
  2473. typedef struct MemoryRegionList MemoryRegionList;
  2474. struct MemoryRegionList {
  2475. const MemoryRegion *mr;
  2476. QTAILQ_ENTRY(MemoryRegionList) mrqueue;
  2477. };
  2478. typedef QTAILQ_HEAD(mrqueue, MemoryRegionList) MemoryRegionListHead;
  2479. #define MR_SIZE(size) (int128_nz(size) ? (hwaddr)int128_get64( \
  2480. int128_sub((size), int128_one())) : 0)
  2481. #define MTREE_INDENT " "
  2482. static void mtree_print_mr(fprintf_function mon_printf, void *f,
  2483. const MemoryRegion *mr, unsigned int level,
  2484. hwaddr base,
  2485. MemoryRegionListHead *alias_print_queue)
  2486. {
  2487. MemoryRegionList *new_ml, *ml, *next_ml;
  2488. MemoryRegionListHead submr_print_queue;
  2489. const MemoryRegion *submr;
  2490. unsigned int i;
  2491. hwaddr cur_start, cur_end;
  2492. if (!mr) {
  2493. return;
  2494. }
  2495. for (i = 0; i < level; i++) {
  2496. mon_printf(f, MTREE_INDENT);
  2497. }
  2498. cur_start = base + mr->addr;
  2499. cur_end = cur_start + MR_SIZE(mr->size);
  2500. /*
  2501. * Try to detect overflow of memory region. This should never
  2502. * happen normally. When it happens, we dump something to warn the
  2503. * user who is observing this.
  2504. */
  2505. if (cur_start < base || cur_end < cur_start) {
  2506. mon_printf(f, "[DETECTED OVERFLOW!] ");
  2507. }
  2508. if (mr->alias) {
  2509. MemoryRegionList *ml;
  2510. bool found = false;
  2511. /* check if the alias is already in the queue */
  2512. QTAILQ_FOREACH(ml, alias_print_queue, mrqueue) {
  2513. if (ml->mr == mr->alias) {
  2514. found = true;
  2515. }
  2516. }
  2517. if (!found) {
  2518. ml = g_new(MemoryRegionList, 1);
  2519. ml->mr = mr->alias;
  2520. QTAILQ_INSERT_TAIL(alias_print_queue, ml, mrqueue);
  2521. }
  2522. mon_printf(f, TARGET_FMT_plx "-" TARGET_FMT_plx
  2523. " (prio %d, %s): alias %s @%s " TARGET_FMT_plx
  2524. "-" TARGET_FMT_plx "%s\n",
  2525. cur_start, cur_end,
  2526. mr->priority,
  2527. memory_region_type((MemoryRegion *)mr),
  2528. memory_region_name(mr),
  2529. memory_region_name(mr->alias),
  2530. mr->alias_offset,
  2531. mr->alias_offset + MR_SIZE(mr->size),
  2532. mr->enabled ? "" : " [disabled]");
  2533. } else {
  2534. mon_printf(f,
  2535. TARGET_FMT_plx "-" TARGET_FMT_plx " (prio %d, %s): %s%s\n",
  2536. cur_start, cur_end,
  2537. mr->priority,
  2538. memory_region_type((MemoryRegion *)mr),
  2539. memory_region_name(mr),
  2540. mr->enabled ? "" : " [disabled]");
  2541. }
  2542. QTAILQ_INIT(&submr_print_queue);
  2543. QTAILQ_FOREACH(submr, &mr->subregions, subregions_link) {
  2544. new_ml = g_new(MemoryRegionList, 1);
  2545. new_ml->mr = submr;
  2546. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2547. if (new_ml->mr->addr < ml->mr->addr ||
  2548. (new_ml->mr->addr == ml->mr->addr &&
  2549. new_ml->mr->priority > ml->mr->priority)) {
  2550. QTAILQ_INSERT_BEFORE(ml, new_ml, mrqueue);
  2551. new_ml = NULL;
  2552. break;
  2553. }
  2554. }
  2555. if (new_ml) {
  2556. QTAILQ_INSERT_TAIL(&submr_print_queue, new_ml, mrqueue);
  2557. }
  2558. }
  2559. QTAILQ_FOREACH(ml, &submr_print_queue, mrqueue) {
  2560. mtree_print_mr(mon_printf, f, ml->mr, level + 1, cur_start,
  2561. alias_print_queue);
  2562. }
  2563. QTAILQ_FOREACH_SAFE(ml, &submr_print_queue, mrqueue, next_ml) {
  2564. g_free(ml);
  2565. }
  2566. }
  2567. struct FlatViewInfo {
  2568. fprintf_function mon_printf;
  2569. void *f;
  2570. int counter;
  2571. bool dispatch_tree;
  2572. };
  2573. static void mtree_print_flatview(gpointer key, gpointer value,
  2574. gpointer user_data)
  2575. {
  2576. FlatView *view = key;
  2577. GArray *fv_address_spaces = value;
  2578. struct FlatViewInfo *fvi = user_data;
  2579. fprintf_function p = fvi->mon_printf;
  2580. void *f = fvi->f;
  2581. FlatRange *range = &view->ranges[0];
  2582. MemoryRegion *mr;
  2583. int n = view->nr;
  2584. int i;
  2585. AddressSpace *as;
  2586. p(f, "FlatView #%d\n", fvi->counter);
  2587. ++fvi->counter;
  2588. for (i = 0; i < fv_address_spaces->len; ++i) {
  2589. as = g_array_index(fv_address_spaces, AddressSpace*, i);
  2590. p(f, " AS \"%s\", root: %s", as->name, memory_region_name(as->root));
  2591. if (as->root->alias) {
  2592. p(f, ", alias %s", memory_region_name(as->root->alias));
  2593. }
  2594. p(f, "\n");
  2595. }
  2596. p(f, " Root memory region: %s\n",
  2597. view->root ? memory_region_name(view->root) : "(none)");
  2598. if (n <= 0) {
  2599. p(f, MTREE_INDENT "No rendered FlatView\n\n");
  2600. return;
  2601. }
  2602. while (n--) {
  2603. mr = range->mr;
  2604. if (range->offset_in_region) {
  2605. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2606. TARGET_FMT_plx " (prio %d, %s): %s @" TARGET_FMT_plx "\n",
  2607. int128_get64(range->addr.start),
  2608. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2609. mr->priority,
  2610. range->readonly ? "rom" : memory_region_type(mr),
  2611. memory_region_name(mr),
  2612. range->offset_in_region);
  2613. } else {
  2614. p(f, MTREE_INDENT TARGET_FMT_plx "-"
  2615. TARGET_FMT_plx " (prio %d, %s): %s\n",
  2616. int128_get64(range->addr.start),
  2617. int128_get64(range->addr.start) + MR_SIZE(range->addr.size),
  2618. mr->priority,
  2619. range->readonly ? "rom" : memory_region_type(mr),
  2620. memory_region_name(mr));
  2621. }
  2622. range++;
  2623. }
  2624. #if !defined(CONFIG_USER_ONLY)
  2625. if (fvi->dispatch_tree && view->root) {
  2626. mtree_print_dispatch(p, f, view->dispatch, view->root);
  2627. }
  2628. #endif
  2629. p(f, "\n");
  2630. }
  2631. static gboolean mtree_info_flatview_free(gpointer key, gpointer value,
  2632. gpointer user_data)
  2633. {
  2634. FlatView *view = key;
  2635. GArray *fv_address_spaces = value;
  2636. g_array_unref(fv_address_spaces);
  2637. flatview_unref(view);
  2638. return true;
  2639. }
  2640. void mtree_info(fprintf_function mon_printf, void *f, bool flatview,
  2641. bool dispatch_tree)
  2642. {
  2643. MemoryRegionListHead ml_head;
  2644. MemoryRegionList *ml, *ml2;
  2645. AddressSpace *as;
  2646. if (flatview) {
  2647. FlatView *view;
  2648. struct FlatViewInfo fvi = {
  2649. .mon_printf = mon_printf,
  2650. .f = f,
  2651. .counter = 0,
  2652. .dispatch_tree = dispatch_tree
  2653. };
  2654. GArray *fv_address_spaces;
  2655. GHashTable *views = g_hash_table_new(g_direct_hash, g_direct_equal);
  2656. /* Gather all FVs in one table */
  2657. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2658. view = address_space_get_flatview(as);
  2659. fv_address_spaces = g_hash_table_lookup(views, view);
  2660. if (!fv_address_spaces) {
  2661. fv_address_spaces = g_array_new(false, false, sizeof(as));
  2662. g_hash_table_insert(views, view, fv_address_spaces);
  2663. }
  2664. g_array_append_val(fv_address_spaces, as);
  2665. }
  2666. /* Print */
  2667. g_hash_table_foreach(views, mtree_print_flatview, &fvi);
  2668. /* Free */
  2669. g_hash_table_foreach_remove(views, mtree_info_flatview_free, 0);
  2670. g_hash_table_unref(views);
  2671. return;
  2672. }
  2673. QTAILQ_INIT(&ml_head);
  2674. QTAILQ_FOREACH(as, &address_spaces, address_spaces_link) {
  2675. mon_printf(f, "address-space: %s\n", as->name);
  2676. mtree_print_mr(mon_printf, f, as->root, 1, 0, &ml_head);
  2677. mon_printf(f, "\n");
  2678. }
  2679. /* print aliased regions */
  2680. QTAILQ_FOREACH(ml, &ml_head, mrqueue) {
  2681. mon_printf(f, "memory-region: %s\n", memory_region_name(ml->mr));
  2682. mtree_print_mr(mon_printf, f, ml->mr, 1, 0, &ml_head);
  2683. mon_printf(f, "\n");
  2684. }
  2685. QTAILQ_FOREACH_SAFE(ml, &ml_head, mrqueue, ml2) {
  2686. g_free(ml);
  2687. }
  2688. }
  2689. void memory_region_init_ram(MemoryRegion *mr,
  2690. struct Object *owner,
  2691. const char *name,
  2692. uint64_t size,
  2693. Error **errp)
  2694. {
  2695. DeviceState *owner_dev;
  2696. Error *err = NULL;
  2697. memory_region_init_ram_nomigrate(mr, owner, name, size, &err);
  2698. if (err) {
  2699. error_propagate(errp, err);
  2700. return;
  2701. }
  2702. /* This will assert if owner is neither NULL nor a DeviceState.
  2703. * We only want the owner here for the purposes of defining a
  2704. * unique name for migration. TODO: Ideally we should implement
  2705. * a naming scheme for Objects which are not DeviceStates, in
  2706. * which case we can relax this restriction.
  2707. */
  2708. owner_dev = DEVICE(owner);
  2709. vmstate_register_ram(mr, owner_dev);
  2710. }
  2711. void memory_region_init_rom(MemoryRegion *mr,
  2712. struct Object *owner,
  2713. const char *name,
  2714. uint64_t size,
  2715. Error **errp)
  2716. {
  2717. DeviceState *owner_dev;
  2718. Error *err = NULL;
  2719. memory_region_init_rom_nomigrate(mr, owner, name, size, &err);
  2720. if (err) {
  2721. error_propagate(errp, err);
  2722. return;
  2723. }
  2724. /* This will assert if owner is neither NULL nor a DeviceState.
  2725. * We only want the owner here for the purposes of defining a
  2726. * unique name for migration. TODO: Ideally we should implement
  2727. * a naming scheme for Objects which are not DeviceStates, in
  2728. * which case we can relax this restriction.
  2729. */
  2730. owner_dev = DEVICE(owner);
  2731. vmstate_register_ram(mr, owner_dev);
  2732. }
  2733. void memory_region_init_rom_device(MemoryRegion *mr,
  2734. struct Object *owner,
  2735. const MemoryRegionOps *ops,
  2736. void *opaque,
  2737. const char *name,
  2738. uint64_t size,
  2739. Error **errp)
  2740. {
  2741. DeviceState *owner_dev;
  2742. Error *err = NULL;
  2743. memory_region_init_rom_device_nomigrate(mr, owner, ops, opaque,
  2744. name, size, &err);
  2745. if (err) {
  2746. error_propagate(errp, err);
  2747. return;
  2748. }
  2749. /* This will assert if owner is neither NULL nor a DeviceState.
  2750. * We only want the owner here for the purposes of defining a
  2751. * unique name for migration. TODO: Ideally we should implement
  2752. * a naming scheme for Objects which are not DeviceStates, in
  2753. * which case we can relax this restriction.
  2754. */
  2755. owner_dev = DEVICE(owner);
  2756. vmstate_register_ram(mr, owner_dev);
  2757. }
  2758. static const TypeInfo memory_region_info = {
  2759. .parent = TYPE_OBJECT,
  2760. .name = TYPE_MEMORY_REGION,
  2761. .instance_size = sizeof(MemoryRegion),
  2762. .instance_init = memory_region_initfn,
  2763. .instance_finalize = memory_region_finalize,
  2764. };
  2765. static const TypeInfo iommu_memory_region_info = {
  2766. .parent = TYPE_MEMORY_REGION,
  2767. .name = TYPE_IOMMU_MEMORY_REGION,
  2768. .class_size = sizeof(IOMMUMemoryRegionClass),
  2769. .instance_size = sizeof(IOMMUMemoryRegion),
  2770. .instance_init = iommu_memory_region_initfn,
  2771. .abstract = true,
  2772. };
  2773. static void memory_register_types(void)
  2774. {
  2775. type_register_static(&memory_region_info);
  2776. type_register_static(&iommu_memory_region_info);
  2777. }
  2778. type_init(memory_register_types)