omap_synctimer.c 2.8 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103
  1. /*
  2. * TI OMAP2 32kHz sync timer emulation.
  3. *
  4. * Copyright (C) 2007-2008 Nokia Corporation
  5. * Written by Andrzej Zaborowski <andrew@openedhand.com>
  6. *
  7. * This program is free software; you can redistribute it and/or
  8. * modify it under the terms of the GNU General Public License as
  9. * published by the Free Software Foundation; either version 2 or
  10. * (at your option) any later version of the License.
  11. *
  12. * This program is distributed in the hope that it will be useful,
  13. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  15. * GNU General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along
  18. * with this program; if not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #include "qemu/osdep.h"
  21. #include "hw/hw.h"
  22. #include "qemu/timer.h"
  23. #include "hw/arm/omap.h"
  24. struct omap_synctimer_s {
  25. MemoryRegion iomem;
  26. uint32_t val;
  27. uint16_t readh;
  28. };
  29. /* 32-kHz Sync Timer of the OMAP2 */
  30. static uint32_t omap_synctimer_read(struct omap_synctimer_s *s) {
  31. return muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL), 0x8000, get_ticks_per_sec());
  32. }
  33. void omap_synctimer_reset(struct omap_synctimer_s *s)
  34. {
  35. s->val = omap_synctimer_read(s);
  36. }
  37. static uint32_t omap_synctimer_readw(void *opaque, hwaddr addr)
  38. {
  39. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  40. switch (addr) {
  41. case 0x00: /* 32KSYNCNT_REV */
  42. return 0x21;
  43. case 0x10: /* CR */
  44. return omap_synctimer_read(s) - s->val;
  45. }
  46. OMAP_BAD_REG(addr);
  47. return 0;
  48. }
  49. static uint32_t omap_synctimer_readh(void *opaque, hwaddr addr)
  50. {
  51. struct omap_synctimer_s *s = (struct omap_synctimer_s *) opaque;
  52. uint32_t ret;
  53. if (addr & 2)
  54. return s->readh;
  55. else {
  56. ret = omap_synctimer_readw(opaque, addr);
  57. s->readh = ret >> 16;
  58. return ret & 0xffff;
  59. }
  60. }
  61. static void omap_synctimer_write(void *opaque, hwaddr addr,
  62. uint32_t value)
  63. {
  64. OMAP_BAD_REG(addr);
  65. }
  66. static const MemoryRegionOps omap_synctimer_ops = {
  67. .old_mmio = {
  68. .read = {
  69. omap_badwidth_read32,
  70. omap_synctimer_readh,
  71. omap_synctimer_readw,
  72. },
  73. .write = {
  74. omap_badwidth_write32,
  75. omap_synctimer_write,
  76. omap_synctimer_write,
  77. },
  78. },
  79. .endianness = DEVICE_NATIVE_ENDIAN,
  80. };
  81. struct omap_synctimer_s *omap_synctimer_init(struct omap_target_agent_s *ta,
  82. struct omap_mpu_state_s *mpu, omap_clk fclk, omap_clk iclk)
  83. {
  84. struct omap_synctimer_s *s = g_malloc0(sizeof(*s));
  85. omap_synctimer_reset(s);
  86. memory_region_init_io(&s->iomem, NULL, &omap_synctimer_ops, s, "omap.synctimer",
  87. omap_l4_region_size(ta, 0));
  88. omap_l4_attach(ta, 0, &s->iomem);
  89. return s;
  90. }