virtio-gpu.c 53 KB

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  1. /*
  2. * Virtio GPU Device
  3. *
  4. * Copyright Red Hat, Inc. 2013-2014
  5. *
  6. * Authors:
  7. * Dave Airlie <airlied@redhat.com>
  8. * Gerd Hoffmann <kraxel@redhat.com>
  9. *
  10. * This work is licensed under the terms of the GNU GPL, version 2 or later.
  11. * See the COPYING file in the top-level directory.
  12. */
  13. #include "qemu/osdep.h"
  14. #include "qemu/units.h"
  15. #include "qemu/iov.h"
  16. #include "sysemu/cpus.h"
  17. #include "ui/console.h"
  18. #include "ui/rect.h"
  19. #include "trace.h"
  20. #include "sysemu/dma.h"
  21. #include "sysemu/sysemu.h"
  22. #include "hw/virtio/virtio.h"
  23. #include "migration/qemu-file-types.h"
  24. #include "hw/virtio/virtio-gpu.h"
  25. #include "hw/virtio/virtio-gpu-bswap.h"
  26. #include "hw/virtio/virtio-gpu-pixman.h"
  27. #include "hw/virtio/virtio-bus.h"
  28. #include "hw/qdev-properties.h"
  29. #include "qemu/log.h"
  30. #include "qemu/memfd.h"
  31. #include "qemu/module.h"
  32. #include "qapi/error.h"
  33. #include "qemu/error-report.h"
  34. #define VIRTIO_GPU_VM_VERSION 1
  35. static struct virtio_gpu_simple_resource *
  36. virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
  37. bool require_backing,
  38. const char *caller, uint32_t *error);
  39. static void virtio_gpu_reset_bh(void *opaque);
  40. void virtio_gpu_update_cursor_data(VirtIOGPU *g,
  41. struct virtio_gpu_scanout *s,
  42. uint32_t resource_id)
  43. {
  44. struct virtio_gpu_simple_resource *res;
  45. uint32_t pixels;
  46. void *data;
  47. res = virtio_gpu_find_check_resource(g, resource_id, false,
  48. __func__, NULL);
  49. if (!res) {
  50. return;
  51. }
  52. if (res->blob_size) {
  53. if (res->blob_size < (s->current_cursor->width *
  54. s->current_cursor->height * 4)) {
  55. return;
  56. }
  57. data = res->blob;
  58. } else {
  59. if (pixman_image_get_width(res->image) != s->current_cursor->width ||
  60. pixman_image_get_height(res->image) != s->current_cursor->height) {
  61. return;
  62. }
  63. data = pixman_image_get_data(res->image);
  64. }
  65. pixels = s->current_cursor->width * s->current_cursor->height;
  66. memcpy(s->current_cursor->data, data,
  67. pixels * sizeof(uint32_t));
  68. }
  69. static void update_cursor(VirtIOGPU *g, struct virtio_gpu_update_cursor *cursor)
  70. {
  71. struct virtio_gpu_scanout *s;
  72. VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
  73. bool move = cursor->hdr.type == VIRTIO_GPU_CMD_MOVE_CURSOR;
  74. if (cursor->pos.scanout_id >= g->parent_obj.conf.max_outputs) {
  75. return;
  76. }
  77. s = &g->parent_obj.scanout[cursor->pos.scanout_id];
  78. trace_virtio_gpu_update_cursor(cursor->pos.scanout_id,
  79. cursor->pos.x,
  80. cursor->pos.y,
  81. move ? "move" : "update",
  82. cursor->resource_id);
  83. if (!move) {
  84. if (!s->current_cursor) {
  85. s->current_cursor = cursor_alloc(64, 64);
  86. }
  87. s->current_cursor->hot_x = cursor->hot_x;
  88. s->current_cursor->hot_y = cursor->hot_y;
  89. if (cursor->resource_id > 0) {
  90. vgc->update_cursor_data(g, s, cursor->resource_id);
  91. }
  92. dpy_cursor_define(s->con, s->current_cursor);
  93. s->cursor = *cursor;
  94. } else {
  95. s->cursor.pos.x = cursor->pos.x;
  96. s->cursor.pos.y = cursor->pos.y;
  97. }
  98. dpy_mouse_set(s->con, cursor->pos.x, cursor->pos.y, cursor->resource_id);
  99. }
  100. struct virtio_gpu_simple_resource *
  101. virtio_gpu_find_resource(VirtIOGPU *g, uint32_t resource_id)
  102. {
  103. struct virtio_gpu_simple_resource *res;
  104. QTAILQ_FOREACH(res, &g->reslist, next) {
  105. if (res->resource_id == resource_id) {
  106. return res;
  107. }
  108. }
  109. return NULL;
  110. }
  111. static struct virtio_gpu_simple_resource *
  112. virtio_gpu_find_check_resource(VirtIOGPU *g, uint32_t resource_id,
  113. bool require_backing,
  114. const char *caller, uint32_t *error)
  115. {
  116. struct virtio_gpu_simple_resource *res;
  117. res = virtio_gpu_find_resource(g, resource_id);
  118. if (!res) {
  119. qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid resource specified %d\n",
  120. caller, resource_id);
  121. if (error) {
  122. *error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  123. }
  124. return NULL;
  125. }
  126. if (require_backing) {
  127. if (!res->iov || (!res->image && !res->blob)) {
  128. qemu_log_mask(LOG_GUEST_ERROR, "%s: no backing storage %d\n",
  129. caller, resource_id);
  130. if (error) {
  131. *error = VIRTIO_GPU_RESP_ERR_UNSPEC;
  132. }
  133. return NULL;
  134. }
  135. }
  136. return res;
  137. }
  138. void virtio_gpu_ctrl_response(VirtIOGPU *g,
  139. struct virtio_gpu_ctrl_command *cmd,
  140. struct virtio_gpu_ctrl_hdr *resp,
  141. size_t resp_len)
  142. {
  143. size_t s;
  144. if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_FENCE) {
  145. resp->flags |= VIRTIO_GPU_FLAG_FENCE;
  146. resp->fence_id = cmd->cmd_hdr.fence_id;
  147. resp->ctx_id = cmd->cmd_hdr.ctx_id;
  148. }
  149. virtio_gpu_ctrl_hdr_bswap(resp);
  150. s = iov_from_buf(cmd->elem.in_sg, cmd->elem.in_num, 0, resp, resp_len);
  151. if (s != resp_len) {
  152. qemu_log_mask(LOG_GUEST_ERROR,
  153. "%s: response size incorrect %zu vs %zu\n",
  154. __func__, s, resp_len);
  155. }
  156. virtqueue_push(cmd->vq, &cmd->elem, s);
  157. virtio_notify(VIRTIO_DEVICE(g), cmd->vq);
  158. cmd->finished = true;
  159. }
  160. void virtio_gpu_ctrl_response_nodata(VirtIOGPU *g,
  161. struct virtio_gpu_ctrl_command *cmd,
  162. enum virtio_gpu_ctrl_type type)
  163. {
  164. struct virtio_gpu_ctrl_hdr resp;
  165. memset(&resp, 0, sizeof(resp));
  166. resp.type = type;
  167. virtio_gpu_ctrl_response(g, cmd, &resp, sizeof(resp));
  168. }
  169. void virtio_gpu_get_display_info(VirtIOGPU *g,
  170. struct virtio_gpu_ctrl_command *cmd)
  171. {
  172. struct virtio_gpu_resp_display_info display_info;
  173. trace_virtio_gpu_cmd_get_display_info();
  174. memset(&display_info, 0, sizeof(display_info));
  175. display_info.hdr.type = VIRTIO_GPU_RESP_OK_DISPLAY_INFO;
  176. virtio_gpu_base_fill_display_info(VIRTIO_GPU_BASE(g), &display_info);
  177. virtio_gpu_ctrl_response(g, cmd, &display_info.hdr,
  178. sizeof(display_info));
  179. }
  180. void virtio_gpu_get_edid(VirtIOGPU *g,
  181. struct virtio_gpu_ctrl_command *cmd)
  182. {
  183. struct virtio_gpu_resp_edid edid;
  184. struct virtio_gpu_cmd_get_edid get_edid;
  185. VirtIOGPUBase *b = VIRTIO_GPU_BASE(g);
  186. VIRTIO_GPU_FILL_CMD(get_edid);
  187. virtio_gpu_bswap_32(&get_edid, sizeof(get_edid));
  188. if (get_edid.scanout >= b->conf.max_outputs) {
  189. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  190. return;
  191. }
  192. trace_virtio_gpu_cmd_get_edid(get_edid.scanout);
  193. memset(&edid, 0, sizeof(edid));
  194. edid.hdr.type = VIRTIO_GPU_RESP_OK_EDID;
  195. virtio_gpu_base_generate_edid(VIRTIO_GPU_BASE(g), get_edid.scanout, &edid);
  196. virtio_gpu_ctrl_response(g, cmd, &edid.hdr, sizeof(edid));
  197. }
  198. static uint32_t calc_image_hostmem(pixman_format_code_t pformat,
  199. uint32_t width, uint32_t height)
  200. {
  201. /* Copied from pixman/pixman-bits-image.c, skip integer overflow check.
  202. * pixman_image_create_bits will fail in case it overflow.
  203. */
  204. int bpp = PIXMAN_FORMAT_BPP(pformat);
  205. int stride = ((width * bpp + 0x1f) >> 5) * sizeof(uint32_t);
  206. return height * stride;
  207. }
  208. static void virtio_gpu_resource_create_2d(VirtIOGPU *g,
  209. struct virtio_gpu_ctrl_command *cmd)
  210. {
  211. pixman_format_code_t pformat;
  212. struct virtio_gpu_simple_resource *res;
  213. struct virtio_gpu_resource_create_2d c2d;
  214. VIRTIO_GPU_FILL_CMD(c2d);
  215. virtio_gpu_bswap_32(&c2d, sizeof(c2d));
  216. trace_virtio_gpu_cmd_res_create_2d(c2d.resource_id, c2d.format,
  217. c2d.width, c2d.height);
  218. if (c2d.resource_id == 0) {
  219. qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
  220. __func__);
  221. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  222. return;
  223. }
  224. res = virtio_gpu_find_resource(g, c2d.resource_id);
  225. if (res) {
  226. qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
  227. __func__, c2d.resource_id);
  228. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  229. return;
  230. }
  231. res = g_new0(struct virtio_gpu_simple_resource, 1);
  232. res->width = c2d.width;
  233. res->height = c2d.height;
  234. res->format = c2d.format;
  235. res->resource_id = c2d.resource_id;
  236. pformat = virtio_gpu_get_pixman_format(c2d.format);
  237. if (!pformat) {
  238. qemu_log_mask(LOG_GUEST_ERROR,
  239. "%s: host couldn't handle guest format %d\n",
  240. __func__, c2d.format);
  241. g_free(res);
  242. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  243. return;
  244. }
  245. res->hostmem = calc_image_hostmem(pformat, c2d.width, c2d.height);
  246. if (res->hostmem + g->hostmem < g->conf_max_hostmem) {
  247. if (!qemu_pixman_image_new_shareable(
  248. &res->image,
  249. &res->share_handle,
  250. "virtio-gpu res",
  251. pformat,
  252. c2d.width,
  253. c2d.height,
  254. c2d.height ? res->hostmem / c2d.height : 0,
  255. &error_warn)) {
  256. goto end;
  257. }
  258. }
  259. end:
  260. if (!res->image) {
  261. qemu_log_mask(LOG_GUEST_ERROR,
  262. "%s: resource creation failed %d %d %d\n",
  263. __func__, c2d.resource_id, c2d.width, c2d.height);
  264. g_free(res);
  265. cmd->error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
  266. return;
  267. }
  268. QTAILQ_INSERT_HEAD(&g->reslist, res, next);
  269. g->hostmem += res->hostmem;
  270. }
  271. static void virtio_gpu_resource_create_blob(VirtIOGPU *g,
  272. struct virtio_gpu_ctrl_command *cmd)
  273. {
  274. struct virtio_gpu_simple_resource *res;
  275. struct virtio_gpu_resource_create_blob cblob;
  276. int ret;
  277. VIRTIO_GPU_FILL_CMD(cblob);
  278. virtio_gpu_create_blob_bswap(&cblob);
  279. trace_virtio_gpu_cmd_res_create_blob(cblob.resource_id, cblob.size);
  280. if (cblob.resource_id == 0) {
  281. qemu_log_mask(LOG_GUEST_ERROR, "%s: resource id 0 is not allowed\n",
  282. __func__);
  283. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  284. return;
  285. }
  286. if (cblob.blob_mem != VIRTIO_GPU_BLOB_MEM_GUEST &&
  287. cblob.blob_flags != VIRTIO_GPU_BLOB_FLAG_USE_SHAREABLE) {
  288. qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid memory type\n",
  289. __func__);
  290. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  291. return;
  292. }
  293. if (virtio_gpu_find_resource(g, cblob.resource_id)) {
  294. qemu_log_mask(LOG_GUEST_ERROR, "%s: resource already exists %d\n",
  295. __func__, cblob.resource_id);
  296. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  297. return;
  298. }
  299. res = g_new0(struct virtio_gpu_simple_resource, 1);
  300. res->resource_id = cblob.resource_id;
  301. res->blob_size = cblob.size;
  302. ret = virtio_gpu_create_mapping_iov(g, cblob.nr_entries, sizeof(cblob),
  303. cmd, &res->addrs, &res->iov,
  304. &res->iov_cnt);
  305. if (ret != 0) {
  306. cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
  307. g_free(res);
  308. return;
  309. }
  310. virtio_gpu_init_udmabuf(res);
  311. QTAILQ_INSERT_HEAD(&g->reslist, res, next);
  312. }
  313. static void virtio_gpu_disable_scanout(VirtIOGPU *g, int scanout_id)
  314. {
  315. struct virtio_gpu_scanout *scanout = &g->parent_obj.scanout[scanout_id];
  316. struct virtio_gpu_simple_resource *res;
  317. if (scanout->resource_id == 0) {
  318. return;
  319. }
  320. res = virtio_gpu_find_resource(g, scanout->resource_id);
  321. if (res) {
  322. res->scanout_bitmask &= ~(1 << scanout_id);
  323. }
  324. dpy_gfx_replace_surface(scanout->con, NULL);
  325. scanout->resource_id = 0;
  326. scanout->ds = NULL;
  327. scanout->width = 0;
  328. scanout->height = 0;
  329. }
  330. static void virtio_gpu_resource_destroy(VirtIOGPU *g,
  331. struct virtio_gpu_simple_resource *res,
  332. Error **errp)
  333. {
  334. int i;
  335. if (res->scanout_bitmask) {
  336. for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
  337. if (res->scanout_bitmask & (1 << i)) {
  338. virtio_gpu_disable_scanout(g, i);
  339. }
  340. }
  341. }
  342. qemu_pixman_image_unref(res->image);
  343. virtio_gpu_cleanup_mapping(g, res);
  344. QTAILQ_REMOVE(&g->reslist, res, next);
  345. g->hostmem -= res->hostmem;
  346. g_free(res);
  347. }
  348. static void virtio_gpu_resource_unref(VirtIOGPU *g,
  349. struct virtio_gpu_ctrl_command *cmd)
  350. {
  351. struct virtio_gpu_simple_resource *res;
  352. struct virtio_gpu_resource_unref unref;
  353. VIRTIO_GPU_FILL_CMD(unref);
  354. virtio_gpu_bswap_32(&unref, sizeof(unref));
  355. trace_virtio_gpu_cmd_res_unref(unref.resource_id);
  356. res = virtio_gpu_find_resource(g, unref.resource_id);
  357. if (!res) {
  358. qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
  359. __func__, unref.resource_id);
  360. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  361. return;
  362. }
  363. /*
  364. * virtio_gpu_resource_destroy does not set any errors, so pass a NULL errp
  365. * to ignore them.
  366. */
  367. virtio_gpu_resource_destroy(g, res, NULL);
  368. }
  369. static void virtio_gpu_transfer_to_host_2d(VirtIOGPU *g,
  370. struct virtio_gpu_ctrl_command *cmd)
  371. {
  372. struct virtio_gpu_simple_resource *res;
  373. int h, bpp;
  374. uint32_t src_offset, dst_offset, stride;
  375. pixman_format_code_t format;
  376. struct virtio_gpu_transfer_to_host_2d t2d;
  377. void *img_data;
  378. VIRTIO_GPU_FILL_CMD(t2d);
  379. virtio_gpu_t2d_bswap(&t2d);
  380. trace_virtio_gpu_cmd_res_xfer_toh_2d(t2d.resource_id);
  381. res = virtio_gpu_find_check_resource(g, t2d.resource_id, true,
  382. __func__, &cmd->error);
  383. if (!res || res->blob) {
  384. return;
  385. }
  386. if (t2d.r.x > res->width ||
  387. t2d.r.y > res->height ||
  388. t2d.r.width > res->width ||
  389. t2d.r.height > res->height ||
  390. t2d.r.x + t2d.r.width > res->width ||
  391. t2d.r.y + t2d.r.height > res->height) {
  392. qemu_log_mask(LOG_GUEST_ERROR, "%s: transfer bounds outside resource"
  393. " bounds for resource %d: %d %d %d %d vs %d %d\n",
  394. __func__, t2d.resource_id, t2d.r.x, t2d.r.y,
  395. t2d.r.width, t2d.r.height, res->width, res->height);
  396. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  397. return;
  398. }
  399. format = pixman_image_get_format(res->image);
  400. bpp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(format), 8);
  401. stride = pixman_image_get_stride(res->image);
  402. img_data = pixman_image_get_data(res->image);
  403. if (t2d.r.x || t2d.r.width != pixman_image_get_width(res->image)) {
  404. for (h = 0; h < t2d.r.height; h++) {
  405. src_offset = t2d.offset + stride * h;
  406. dst_offset = (t2d.r.y + h) * stride + (t2d.r.x * bpp);
  407. iov_to_buf(res->iov, res->iov_cnt, src_offset,
  408. (uint8_t *)img_data + dst_offset,
  409. t2d.r.width * bpp);
  410. }
  411. } else {
  412. src_offset = t2d.offset;
  413. dst_offset = t2d.r.y * stride + t2d.r.x * bpp;
  414. iov_to_buf(res->iov, res->iov_cnt, src_offset,
  415. (uint8_t *)img_data + dst_offset,
  416. stride * t2d.r.height);
  417. }
  418. }
  419. static void virtio_gpu_resource_flush(VirtIOGPU *g,
  420. struct virtio_gpu_ctrl_command *cmd)
  421. {
  422. struct virtio_gpu_simple_resource *res;
  423. struct virtio_gpu_resource_flush rf;
  424. struct virtio_gpu_scanout *scanout;
  425. QemuRect flush_rect;
  426. bool within_bounds = false;
  427. bool update_submitted = false;
  428. int i;
  429. VIRTIO_GPU_FILL_CMD(rf);
  430. virtio_gpu_bswap_32(&rf, sizeof(rf));
  431. trace_virtio_gpu_cmd_res_flush(rf.resource_id,
  432. rf.r.width, rf.r.height, rf.r.x, rf.r.y);
  433. res = virtio_gpu_find_check_resource(g, rf.resource_id, false,
  434. __func__, &cmd->error);
  435. if (!res) {
  436. return;
  437. }
  438. if (res->blob) {
  439. for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
  440. scanout = &g->parent_obj.scanout[i];
  441. if (scanout->resource_id == res->resource_id &&
  442. rf.r.x < scanout->x + scanout->width &&
  443. rf.r.x + rf.r.width >= scanout->x &&
  444. rf.r.y < scanout->y + scanout->height &&
  445. rf.r.y + rf.r.height >= scanout->y) {
  446. within_bounds = true;
  447. if (console_has_gl(scanout->con)) {
  448. dpy_gl_update(scanout->con, 0, 0, scanout->width,
  449. scanout->height);
  450. update_submitted = true;
  451. }
  452. }
  453. }
  454. if (update_submitted) {
  455. return;
  456. }
  457. if (!within_bounds) {
  458. qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside scanouts"
  459. " bounds for flush %d: %d %d %d %d\n",
  460. __func__, rf.resource_id, rf.r.x, rf.r.y,
  461. rf.r.width, rf.r.height);
  462. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  463. return;
  464. }
  465. }
  466. if (!res->blob &&
  467. (rf.r.x > res->width ||
  468. rf.r.y > res->height ||
  469. rf.r.width > res->width ||
  470. rf.r.height > res->height ||
  471. rf.r.x + rf.r.width > res->width ||
  472. rf.r.y + rf.r.height > res->height)) {
  473. qemu_log_mask(LOG_GUEST_ERROR, "%s: flush bounds outside resource"
  474. " bounds for resource %d: %d %d %d %d vs %d %d\n",
  475. __func__, rf.resource_id, rf.r.x, rf.r.y,
  476. rf.r.width, rf.r.height, res->width, res->height);
  477. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  478. return;
  479. }
  480. qemu_rect_init(&flush_rect, rf.r.x, rf.r.y, rf.r.width, rf.r.height);
  481. for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
  482. QemuRect rect;
  483. if (!(res->scanout_bitmask & (1 << i))) {
  484. continue;
  485. }
  486. scanout = &g->parent_obj.scanout[i];
  487. qemu_rect_init(&rect, scanout->x, scanout->y,
  488. scanout->width, scanout->height);
  489. /* work out the area we need to update for each console */
  490. if (qemu_rect_intersect(&flush_rect, &rect, &rect)) {
  491. qemu_rect_translate(&rect, -scanout->x, -scanout->y);
  492. dpy_gfx_update(g->parent_obj.scanout[i].con,
  493. rect.x, rect.y, rect.width, rect.height);
  494. }
  495. }
  496. }
  497. static void virtio_unref_resource(pixman_image_t *image, void *data)
  498. {
  499. pixman_image_unref(data);
  500. }
  501. static void virtio_gpu_update_scanout(VirtIOGPU *g,
  502. uint32_t scanout_id,
  503. struct virtio_gpu_simple_resource *res,
  504. struct virtio_gpu_framebuffer *fb,
  505. struct virtio_gpu_rect *r)
  506. {
  507. struct virtio_gpu_simple_resource *ores;
  508. struct virtio_gpu_scanout *scanout;
  509. scanout = &g->parent_obj.scanout[scanout_id];
  510. ores = virtio_gpu_find_resource(g, scanout->resource_id);
  511. if (ores) {
  512. ores->scanout_bitmask &= ~(1 << scanout_id);
  513. }
  514. res->scanout_bitmask |= (1 << scanout_id);
  515. scanout->resource_id = res->resource_id;
  516. scanout->x = r->x;
  517. scanout->y = r->y;
  518. scanout->width = r->width;
  519. scanout->height = r->height;
  520. scanout->fb = *fb;
  521. }
  522. static bool virtio_gpu_do_set_scanout(VirtIOGPU *g,
  523. uint32_t scanout_id,
  524. struct virtio_gpu_framebuffer *fb,
  525. struct virtio_gpu_simple_resource *res,
  526. struct virtio_gpu_rect *r,
  527. uint32_t *error)
  528. {
  529. struct virtio_gpu_scanout *scanout;
  530. uint8_t *data;
  531. scanout = &g->parent_obj.scanout[scanout_id];
  532. if (r->x > fb->width ||
  533. r->y > fb->height ||
  534. r->width < 16 ||
  535. r->height < 16 ||
  536. r->width > fb->width ||
  537. r->height > fb->height ||
  538. r->x + r->width > fb->width ||
  539. r->y + r->height > fb->height) {
  540. qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout %d bounds for"
  541. " resource %d, rect (%d,%d)+%d,%d, fb %d %d\n",
  542. __func__, scanout_id, res->resource_id,
  543. r->x, r->y, r->width, r->height,
  544. fb->width, fb->height);
  545. *error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  546. return false;
  547. }
  548. g->parent_obj.enable = 1;
  549. if (res->blob) {
  550. if (console_has_gl(scanout->con)) {
  551. if (!virtio_gpu_update_dmabuf(g, scanout_id, res, fb, r)) {
  552. virtio_gpu_update_scanout(g, scanout_id, res, fb, r);
  553. } else {
  554. *error = VIRTIO_GPU_RESP_ERR_OUT_OF_MEMORY;
  555. return false;
  556. }
  557. return true;
  558. }
  559. data = res->blob;
  560. } else {
  561. data = (uint8_t *)pixman_image_get_data(res->image);
  562. }
  563. /* create a surface for this scanout */
  564. if ((res->blob && !console_has_gl(scanout->con)) ||
  565. !scanout->ds ||
  566. surface_data(scanout->ds) != data + fb->offset ||
  567. scanout->width != r->width ||
  568. scanout->height != r->height) {
  569. pixman_image_t *rect;
  570. void *ptr = data + fb->offset;
  571. rect = pixman_image_create_bits(fb->format, r->width, r->height,
  572. ptr, fb->stride);
  573. if (res->image) {
  574. pixman_image_ref(res->image);
  575. pixman_image_set_destroy_function(rect, virtio_unref_resource,
  576. res->image);
  577. }
  578. /* realloc the surface ptr */
  579. scanout->ds = qemu_create_displaysurface_pixman(rect);
  580. qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, fb->offset);
  581. pixman_image_unref(rect);
  582. dpy_gfx_replace_surface(g->parent_obj.scanout[scanout_id].con,
  583. scanout->ds);
  584. }
  585. virtio_gpu_update_scanout(g, scanout_id, res, fb, r);
  586. return true;
  587. }
  588. static void virtio_gpu_set_scanout(VirtIOGPU *g,
  589. struct virtio_gpu_ctrl_command *cmd)
  590. {
  591. struct virtio_gpu_simple_resource *res;
  592. struct virtio_gpu_framebuffer fb = { 0 };
  593. struct virtio_gpu_set_scanout ss;
  594. VIRTIO_GPU_FILL_CMD(ss);
  595. virtio_gpu_bswap_32(&ss, sizeof(ss));
  596. trace_virtio_gpu_cmd_set_scanout(ss.scanout_id, ss.resource_id,
  597. ss.r.width, ss.r.height, ss.r.x, ss.r.y);
  598. if (ss.scanout_id >= g->parent_obj.conf.max_outputs) {
  599. qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
  600. __func__, ss.scanout_id);
  601. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
  602. return;
  603. }
  604. if (ss.resource_id == 0) {
  605. virtio_gpu_disable_scanout(g, ss.scanout_id);
  606. return;
  607. }
  608. res = virtio_gpu_find_check_resource(g, ss.resource_id, true,
  609. __func__, &cmd->error);
  610. if (!res) {
  611. return;
  612. }
  613. fb.format = pixman_image_get_format(res->image);
  614. fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8);
  615. fb.width = pixman_image_get_width(res->image);
  616. fb.height = pixman_image_get_height(res->image);
  617. fb.stride = pixman_image_get_stride(res->image);
  618. fb.offset = ss.r.x * fb.bytes_pp + ss.r.y * fb.stride;
  619. virtio_gpu_do_set_scanout(g, ss.scanout_id,
  620. &fb, res, &ss.r, &cmd->error);
  621. }
  622. static void virtio_gpu_set_scanout_blob(VirtIOGPU *g,
  623. struct virtio_gpu_ctrl_command *cmd)
  624. {
  625. struct virtio_gpu_simple_resource *res;
  626. struct virtio_gpu_framebuffer fb = { 0 };
  627. struct virtio_gpu_set_scanout_blob ss;
  628. uint64_t fbend;
  629. VIRTIO_GPU_FILL_CMD(ss);
  630. virtio_gpu_scanout_blob_bswap(&ss);
  631. trace_virtio_gpu_cmd_set_scanout_blob(ss.scanout_id, ss.resource_id,
  632. ss.r.width, ss.r.height, ss.r.x,
  633. ss.r.y);
  634. if (ss.scanout_id >= g->parent_obj.conf.max_outputs) {
  635. qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal scanout id specified %d",
  636. __func__, ss.scanout_id);
  637. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_SCANOUT_ID;
  638. return;
  639. }
  640. if (ss.resource_id == 0) {
  641. virtio_gpu_disable_scanout(g, ss.scanout_id);
  642. return;
  643. }
  644. res = virtio_gpu_find_check_resource(g, ss.resource_id, true,
  645. __func__, &cmd->error);
  646. if (!res) {
  647. return;
  648. }
  649. fb.format = virtio_gpu_get_pixman_format(ss.format);
  650. if (!fb.format) {
  651. qemu_log_mask(LOG_GUEST_ERROR,
  652. "%s: host couldn't handle guest format %d\n",
  653. __func__, ss.format);
  654. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  655. return;
  656. }
  657. fb.bytes_pp = DIV_ROUND_UP(PIXMAN_FORMAT_BPP(fb.format), 8);
  658. fb.width = ss.width;
  659. fb.height = ss.height;
  660. fb.stride = ss.strides[0];
  661. fb.offset = ss.offsets[0] + ss.r.x * fb.bytes_pp + ss.r.y * fb.stride;
  662. fbend = fb.offset;
  663. fbend += fb.stride * (ss.r.height - 1);
  664. fbend += fb.bytes_pp * ss.r.width;
  665. if (fbend > res->blob_size) {
  666. qemu_log_mask(LOG_GUEST_ERROR,
  667. "%s: fb end out of range\n",
  668. __func__);
  669. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  670. return;
  671. }
  672. virtio_gpu_do_set_scanout(g, ss.scanout_id,
  673. &fb, res, &ss.r, &cmd->error);
  674. }
  675. int virtio_gpu_create_mapping_iov(VirtIOGPU *g,
  676. uint32_t nr_entries, uint32_t offset,
  677. struct virtio_gpu_ctrl_command *cmd,
  678. uint64_t **addr, struct iovec **iov,
  679. uint32_t *niov)
  680. {
  681. struct virtio_gpu_mem_entry *ents;
  682. size_t esize, s;
  683. int e, v;
  684. if (nr_entries > 16384) {
  685. qemu_log_mask(LOG_GUEST_ERROR,
  686. "%s: nr_entries is too big (%d > 16384)\n",
  687. __func__, nr_entries);
  688. return -1;
  689. }
  690. esize = sizeof(*ents) * nr_entries;
  691. ents = g_malloc(esize);
  692. s = iov_to_buf(cmd->elem.out_sg, cmd->elem.out_num,
  693. offset, ents, esize);
  694. if (s != esize) {
  695. qemu_log_mask(LOG_GUEST_ERROR,
  696. "%s: command data size incorrect %zu vs %zu\n",
  697. __func__, s, esize);
  698. g_free(ents);
  699. return -1;
  700. }
  701. *iov = NULL;
  702. if (addr) {
  703. *addr = NULL;
  704. }
  705. for (e = 0, v = 0; e < nr_entries; e++) {
  706. uint64_t a = le64_to_cpu(ents[e].addr);
  707. uint32_t l = le32_to_cpu(ents[e].length);
  708. hwaddr len;
  709. void *map;
  710. do {
  711. len = l;
  712. map = dma_memory_map(VIRTIO_DEVICE(g)->dma_as, a, &len,
  713. DMA_DIRECTION_TO_DEVICE,
  714. MEMTXATTRS_UNSPECIFIED);
  715. if (!map) {
  716. qemu_log_mask(LOG_GUEST_ERROR, "%s: failed to map MMIO memory for"
  717. " element %d\n", __func__, e);
  718. virtio_gpu_cleanup_mapping_iov(g, *iov, v);
  719. g_free(ents);
  720. *iov = NULL;
  721. if (addr) {
  722. g_free(*addr);
  723. *addr = NULL;
  724. }
  725. return -1;
  726. }
  727. if (!(v % 16)) {
  728. *iov = g_renew(struct iovec, *iov, v + 16);
  729. if (addr) {
  730. *addr = g_renew(uint64_t, *addr, v + 16);
  731. }
  732. }
  733. (*iov)[v].iov_base = map;
  734. (*iov)[v].iov_len = len;
  735. if (addr) {
  736. (*addr)[v] = a;
  737. }
  738. a += len;
  739. l -= len;
  740. v += 1;
  741. } while (l > 0);
  742. }
  743. *niov = v;
  744. g_free(ents);
  745. return 0;
  746. }
  747. void virtio_gpu_cleanup_mapping_iov(VirtIOGPU *g,
  748. struct iovec *iov, uint32_t count)
  749. {
  750. int i;
  751. for (i = 0; i < count; i++) {
  752. dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as,
  753. iov[i].iov_base, iov[i].iov_len,
  754. DMA_DIRECTION_TO_DEVICE,
  755. iov[i].iov_len);
  756. }
  757. g_free(iov);
  758. }
  759. void virtio_gpu_cleanup_mapping(VirtIOGPU *g,
  760. struct virtio_gpu_simple_resource *res)
  761. {
  762. virtio_gpu_cleanup_mapping_iov(g, res->iov, res->iov_cnt);
  763. res->iov = NULL;
  764. res->iov_cnt = 0;
  765. g_free(res->addrs);
  766. res->addrs = NULL;
  767. if (res->blob) {
  768. virtio_gpu_fini_udmabuf(res);
  769. }
  770. }
  771. static void
  772. virtio_gpu_resource_attach_backing(VirtIOGPU *g,
  773. struct virtio_gpu_ctrl_command *cmd)
  774. {
  775. struct virtio_gpu_simple_resource *res;
  776. struct virtio_gpu_resource_attach_backing ab;
  777. int ret;
  778. VIRTIO_GPU_FILL_CMD(ab);
  779. virtio_gpu_bswap_32(&ab, sizeof(ab));
  780. trace_virtio_gpu_cmd_res_back_attach(ab.resource_id);
  781. res = virtio_gpu_find_resource(g, ab.resource_id);
  782. if (!res) {
  783. qemu_log_mask(LOG_GUEST_ERROR, "%s: illegal resource specified %d\n",
  784. __func__, ab.resource_id);
  785. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_RESOURCE_ID;
  786. return;
  787. }
  788. if (res->iov) {
  789. cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
  790. return;
  791. }
  792. ret = virtio_gpu_create_mapping_iov(g, ab.nr_entries, sizeof(ab), cmd,
  793. &res->addrs, &res->iov, &res->iov_cnt);
  794. if (ret != 0) {
  795. cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
  796. return;
  797. }
  798. }
  799. static void
  800. virtio_gpu_resource_detach_backing(VirtIOGPU *g,
  801. struct virtio_gpu_ctrl_command *cmd)
  802. {
  803. struct virtio_gpu_simple_resource *res;
  804. struct virtio_gpu_resource_detach_backing detach;
  805. VIRTIO_GPU_FILL_CMD(detach);
  806. virtio_gpu_bswap_32(&detach, sizeof(detach));
  807. trace_virtio_gpu_cmd_res_back_detach(detach.resource_id);
  808. res = virtio_gpu_find_check_resource(g, detach.resource_id, true,
  809. __func__, &cmd->error);
  810. if (!res) {
  811. return;
  812. }
  813. virtio_gpu_cleanup_mapping(g, res);
  814. }
  815. void virtio_gpu_simple_process_cmd(VirtIOGPU *g,
  816. struct virtio_gpu_ctrl_command *cmd)
  817. {
  818. VIRTIO_GPU_FILL_CMD(cmd->cmd_hdr);
  819. virtio_gpu_ctrl_hdr_bswap(&cmd->cmd_hdr);
  820. switch (cmd->cmd_hdr.type) {
  821. case VIRTIO_GPU_CMD_GET_DISPLAY_INFO:
  822. virtio_gpu_get_display_info(g, cmd);
  823. break;
  824. case VIRTIO_GPU_CMD_GET_EDID:
  825. virtio_gpu_get_edid(g, cmd);
  826. break;
  827. case VIRTIO_GPU_CMD_RESOURCE_CREATE_2D:
  828. virtio_gpu_resource_create_2d(g, cmd);
  829. break;
  830. case VIRTIO_GPU_CMD_RESOURCE_CREATE_BLOB:
  831. if (!virtio_gpu_blob_enabled(g->parent_obj.conf)) {
  832. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  833. break;
  834. }
  835. virtio_gpu_resource_create_blob(g, cmd);
  836. break;
  837. case VIRTIO_GPU_CMD_RESOURCE_UNREF:
  838. virtio_gpu_resource_unref(g, cmd);
  839. break;
  840. case VIRTIO_GPU_CMD_RESOURCE_FLUSH:
  841. virtio_gpu_resource_flush(g, cmd);
  842. break;
  843. case VIRTIO_GPU_CMD_TRANSFER_TO_HOST_2D:
  844. virtio_gpu_transfer_to_host_2d(g, cmd);
  845. break;
  846. case VIRTIO_GPU_CMD_SET_SCANOUT:
  847. virtio_gpu_set_scanout(g, cmd);
  848. break;
  849. case VIRTIO_GPU_CMD_SET_SCANOUT_BLOB:
  850. if (!virtio_gpu_blob_enabled(g->parent_obj.conf)) {
  851. cmd->error = VIRTIO_GPU_RESP_ERR_INVALID_PARAMETER;
  852. break;
  853. }
  854. virtio_gpu_set_scanout_blob(g, cmd);
  855. break;
  856. case VIRTIO_GPU_CMD_RESOURCE_ATTACH_BACKING:
  857. virtio_gpu_resource_attach_backing(g, cmd);
  858. break;
  859. case VIRTIO_GPU_CMD_RESOURCE_DETACH_BACKING:
  860. virtio_gpu_resource_detach_backing(g, cmd);
  861. break;
  862. default:
  863. cmd->error = VIRTIO_GPU_RESP_ERR_UNSPEC;
  864. break;
  865. }
  866. if (!cmd->finished) {
  867. if (!g->parent_obj.renderer_blocked) {
  868. virtio_gpu_ctrl_response_nodata(g, cmd, cmd->error ? cmd->error :
  869. VIRTIO_GPU_RESP_OK_NODATA);
  870. }
  871. }
  872. }
  873. static void virtio_gpu_handle_ctrl_cb(VirtIODevice *vdev, VirtQueue *vq)
  874. {
  875. VirtIOGPU *g = VIRTIO_GPU(vdev);
  876. qemu_bh_schedule(g->ctrl_bh);
  877. }
  878. static void virtio_gpu_handle_cursor_cb(VirtIODevice *vdev, VirtQueue *vq)
  879. {
  880. VirtIOGPU *g = VIRTIO_GPU(vdev);
  881. qemu_bh_schedule(g->cursor_bh);
  882. }
  883. void virtio_gpu_process_cmdq(VirtIOGPU *g)
  884. {
  885. struct virtio_gpu_ctrl_command *cmd;
  886. VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
  887. if (g->processing_cmdq) {
  888. return;
  889. }
  890. g->processing_cmdq = true;
  891. while (!QTAILQ_EMPTY(&g->cmdq)) {
  892. cmd = QTAILQ_FIRST(&g->cmdq);
  893. if (g->parent_obj.renderer_blocked) {
  894. break;
  895. }
  896. /* process command */
  897. vgc->process_cmd(g, cmd);
  898. QTAILQ_REMOVE(&g->cmdq, cmd, next);
  899. if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
  900. g->stats.requests++;
  901. }
  902. if (!cmd->finished) {
  903. QTAILQ_INSERT_TAIL(&g->fenceq, cmd, next);
  904. g->inflight++;
  905. if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
  906. if (g->stats.max_inflight < g->inflight) {
  907. g->stats.max_inflight = g->inflight;
  908. }
  909. fprintf(stderr, "inflight: %3d (+)\r", g->inflight);
  910. }
  911. } else {
  912. g_free(cmd);
  913. }
  914. }
  915. g->processing_cmdq = false;
  916. }
  917. static void virtio_gpu_process_fenceq(VirtIOGPU *g)
  918. {
  919. struct virtio_gpu_ctrl_command *cmd, *tmp;
  920. QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {
  921. trace_virtio_gpu_fence_resp(cmd->cmd_hdr.fence_id);
  922. virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);
  923. QTAILQ_REMOVE(&g->fenceq, cmd, next);
  924. g_free(cmd);
  925. g->inflight--;
  926. if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {
  927. fprintf(stderr, "inflight: %3d (-)\r", g->inflight);
  928. }
  929. }
  930. }
  931. static void virtio_gpu_handle_gl_flushed(VirtIOGPUBase *b)
  932. {
  933. VirtIOGPU *g = container_of(b, VirtIOGPU, parent_obj);
  934. virtio_gpu_process_fenceq(g);
  935. virtio_gpu_process_cmdq(g);
  936. }
  937. static void virtio_gpu_handle_ctrl(VirtIODevice *vdev, VirtQueue *vq)
  938. {
  939. VirtIOGPU *g = VIRTIO_GPU(vdev);
  940. struct virtio_gpu_ctrl_command *cmd;
  941. if (!virtio_queue_ready(vq)) {
  942. return;
  943. }
  944. cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
  945. while (cmd) {
  946. cmd->vq = vq;
  947. cmd->error = 0;
  948. cmd->finished = false;
  949. QTAILQ_INSERT_TAIL(&g->cmdq, cmd, next);
  950. cmd = virtqueue_pop(vq, sizeof(struct virtio_gpu_ctrl_command));
  951. }
  952. virtio_gpu_process_cmdq(g);
  953. }
  954. static void virtio_gpu_ctrl_bh(void *opaque)
  955. {
  956. VirtIOGPU *g = opaque;
  957. VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
  958. vgc->handle_ctrl(VIRTIO_DEVICE(g), g->ctrl_vq);
  959. }
  960. static void virtio_gpu_handle_cursor(VirtIODevice *vdev, VirtQueue *vq)
  961. {
  962. VirtIOGPU *g = VIRTIO_GPU(vdev);
  963. VirtQueueElement *elem;
  964. size_t s;
  965. struct virtio_gpu_update_cursor cursor_info;
  966. if (!virtio_queue_ready(vq)) {
  967. return;
  968. }
  969. for (;;) {
  970. elem = virtqueue_pop(vq, sizeof(VirtQueueElement));
  971. if (!elem) {
  972. break;
  973. }
  974. s = iov_to_buf(elem->out_sg, elem->out_num, 0,
  975. &cursor_info, sizeof(cursor_info));
  976. if (s != sizeof(cursor_info)) {
  977. qemu_log_mask(LOG_GUEST_ERROR,
  978. "%s: cursor size incorrect %zu vs %zu\n",
  979. __func__, s, sizeof(cursor_info));
  980. } else {
  981. virtio_gpu_bswap_32(&cursor_info, sizeof(cursor_info));
  982. update_cursor(g, &cursor_info);
  983. }
  984. virtqueue_push(vq, elem, 0);
  985. virtio_notify(vdev, vq);
  986. g_free(elem);
  987. }
  988. }
  989. static void virtio_gpu_cursor_bh(void *opaque)
  990. {
  991. VirtIOGPU *g = opaque;
  992. virtio_gpu_handle_cursor(&g->parent_obj.parent_obj, g->cursor_vq);
  993. }
  994. static bool scanout_vmstate_after_v2(void *opaque, int version)
  995. {
  996. struct VirtIOGPUBase *base = container_of(opaque, VirtIOGPUBase, scanout);
  997. struct VirtIOGPU *gpu = container_of(base, VirtIOGPU, parent_obj);
  998. return gpu->scanout_vmstate_version >= 2;
  999. }
  1000. static const VMStateDescription vmstate_virtio_gpu_scanout = {
  1001. .name = "virtio-gpu-one-scanout",
  1002. .version_id = 1,
  1003. .fields = (const VMStateField[]) {
  1004. VMSTATE_UINT32(resource_id, struct virtio_gpu_scanout),
  1005. VMSTATE_UINT32(width, struct virtio_gpu_scanout),
  1006. VMSTATE_UINT32(height, struct virtio_gpu_scanout),
  1007. VMSTATE_INT32(x, struct virtio_gpu_scanout),
  1008. VMSTATE_INT32(y, struct virtio_gpu_scanout),
  1009. VMSTATE_UINT32(cursor.resource_id, struct virtio_gpu_scanout),
  1010. VMSTATE_UINT32(cursor.hot_x, struct virtio_gpu_scanout),
  1011. VMSTATE_UINT32(cursor.hot_y, struct virtio_gpu_scanout),
  1012. VMSTATE_UINT32(cursor.pos.x, struct virtio_gpu_scanout),
  1013. VMSTATE_UINT32(cursor.pos.y, struct virtio_gpu_scanout),
  1014. VMSTATE_UINT32_TEST(fb.format, struct virtio_gpu_scanout,
  1015. scanout_vmstate_after_v2),
  1016. VMSTATE_UINT32_TEST(fb.bytes_pp, struct virtio_gpu_scanout,
  1017. scanout_vmstate_after_v2),
  1018. VMSTATE_UINT32_TEST(fb.width, struct virtio_gpu_scanout,
  1019. scanout_vmstate_after_v2),
  1020. VMSTATE_UINT32_TEST(fb.height, struct virtio_gpu_scanout,
  1021. scanout_vmstate_after_v2),
  1022. VMSTATE_UINT32_TEST(fb.stride, struct virtio_gpu_scanout,
  1023. scanout_vmstate_after_v2),
  1024. VMSTATE_UINT32_TEST(fb.offset, struct virtio_gpu_scanout,
  1025. scanout_vmstate_after_v2),
  1026. VMSTATE_END_OF_LIST()
  1027. },
  1028. };
  1029. static const VMStateDescription vmstate_virtio_gpu_scanouts = {
  1030. .name = "virtio-gpu-scanouts",
  1031. .version_id = 1,
  1032. .fields = (const VMStateField[]) {
  1033. VMSTATE_INT32(parent_obj.enable, struct VirtIOGPU),
  1034. VMSTATE_UINT32_EQUAL(parent_obj.conf.max_outputs,
  1035. struct VirtIOGPU, NULL),
  1036. VMSTATE_STRUCT_VARRAY_UINT32(parent_obj.scanout, struct VirtIOGPU,
  1037. parent_obj.conf.max_outputs, 1,
  1038. vmstate_virtio_gpu_scanout,
  1039. struct virtio_gpu_scanout),
  1040. VMSTATE_END_OF_LIST()
  1041. },
  1042. };
  1043. static int virtio_gpu_save(QEMUFile *f, void *opaque, size_t size,
  1044. const VMStateField *field, JSONWriter *vmdesc)
  1045. {
  1046. VirtIOGPU *g = opaque;
  1047. struct virtio_gpu_simple_resource *res;
  1048. int i;
  1049. /* in 2d mode we should never find unprocessed commands here */
  1050. assert(QTAILQ_EMPTY(&g->cmdq));
  1051. QTAILQ_FOREACH(res, &g->reslist, next) {
  1052. if (res->blob_size) {
  1053. continue;
  1054. }
  1055. qemu_put_be32(f, res->resource_id);
  1056. qemu_put_be32(f, res->width);
  1057. qemu_put_be32(f, res->height);
  1058. qemu_put_be32(f, res->format);
  1059. qemu_put_be32(f, res->iov_cnt);
  1060. for (i = 0; i < res->iov_cnt; i++) {
  1061. qemu_put_be64(f, res->addrs[i]);
  1062. qemu_put_be32(f, res->iov[i].iov_len);
  1063. }
  1064. qemu_put_buffer(f, (void *)pixman_image_get_data(res->image),
  1065. pixman_image_get_stride(res->image) * res->height);
  1066. }
  1067. qemu_put_be32(f, 0); /* end of list */
  1068. return vmstate_save_state(f, &vmstate_virtio_gpu_scanouts, g, NULL);
  1069. }
  1070. static bool virtio_gpu_load_restore_mapping(VirtIOGPU *g,
  1071. struct virtio_gpu_simple_resource *res)
  1072. {
  1073. int i;
  1074. for (i = 0; i < res->iov_cnt; i++) {
  1075. hwaddr len = res->iov[i].iov_len;
  1076. res->iov[i].iov_base =
  1077. dma_memory_map(VIRTIO_DEVICE(g)->dma_as, res->addrs[i], &len,
  1078. DMA_DIRECTION_TO_DEVICE, MEMTXATTRS_UNSPECIFIED);
  1079. if (!res->iov[i].iov_base || len != res->iov[i].iov_len) {
  1080. /* Clean up the half-a-mapping we just created... */
  1081. if (res->iov[i].iov_base) {
  1082. dma_memory_unmap(VIRTIO_DEVICE(g)->dma_as, res->iov[i].iov_base,
  1083. len, DMA_DIRECTION_TO_DEVICE, 0);
  1084. }
  1085. /* ...and the mappings for previous loop iterations */
  1086. res->iov_cnt = i;
  1087. virtio_gpu_cleanup_mapping(g, res);
  1088. return false;
  1089. }
  1090. }
  1091. QTAILQ_INSERT_HEAD(&g->reslist, res, next);
  1092. g->hostmem += res->hostmem;
  1093. return true;
  1094. }
  1095. static int virtio_gpu_load(QEMUFile *f, void *opaque, size_t size,
  1096. const VMStateField *field)
  1097. {
  1098. VirtIOGPU *g = opaque;
  1099. struct virtio_gpu_simple_resource *res;
  1100. uint32_t resource_id, pformat;
  1101. int i;
  1102. g->hostmem = 0;
  1103. resource_id = qemu_get_be32(f);
  1104. while (resource_id != 0) {
  1105. res = virtio_gpu_find_resource(g, resource_id);
  1106. if (res) {
  1107. return -EINVAL;
  1108. }
  1109. res = g_new0(struct virtio_gpu_simple_resource, 1);
  1110. res->resource_id = resource_id;
  1111. res->width = qemu_get_be32(f);
  1112. res->height = qemu_get_be32(f);
  1113. res->format = qemu_get_be32(f);
  1114. res->iov_cnt = qemu_get_be32(f);
  1115. /* allocate */
  1116. pformat = virtio_gpu_get_pixman_format(res->format);
  1117. if (!pformat) {
  1118. g_free(res);
  1119. return -EINVAL;
  1120. }
  1121. res->hostmem = calc_image_hostmem(pformat, res->width, res->height);
  1122. if (!qemu_pixman_image_new_shareable(&res->image,
  1123. &res->share_handle,
  1124. "virtio-gpu res",
  1125. pformat,
  1126. res->width,
  1127. res->height,
  1128. res->height ? res->hostmem / res->height : 0,
  1129. &error_warn)) {
  1130. g_free(res);
  1131. return -EINVAL;
  1132. }
  1133. res->addrs = g_new(uint64_t, res->iov_cnt);
  1134. res->iov = g_new(struct iovec, res->iov_cnt);
  1135. /* read data */
  1136. for (i = 0; i < res->iov_cnt; i++) {
  1137. res->addrs[i] = qemu_get_be64(f);
  1138. res->iov[i].iov_len = qemu_get_be32(f);
  1139. }
  1140. qemu_get_buffer(f, (void *)pixman_image_get_data(res->image),
  1141. pixman_image_get_stride(res->image) * res->height);
  1142. if (!virtio_gpu_load_restore_mapping(g, res)) {
  1143. pixman_image_unref(res->image);
  1144. g_free(res);
  1145. return -EINVAL;
  1146. }
  1147. resource_id = qemu_get_be32(f);
  1148. }
  1149. /* load & apply scanout state */
  1150. vmstate_load_state(f, &vmstate_virtio_gpu_scanouts, g, 1);
  1151. return 0;
  1152. }
  1153. static int virtio_gpu_blob_save(QEMUFile *f, void *opaque, size_t size,
  1154. const VMStateField *field, JSONWriter *vmdesc)
  1155. {
  1156. VirtIOGPU *g = opaque;
  1157. struct virtio_gpu_simple_resource *res;
  1158. int i;
  1159. /* in 2d mode we should never find unprocessed commands here */
  1160. assert(QTAILQ_EMPTY(&g->cmdq));
  1161. QTAILQ_FOREACH(res, &g->reslist, next) {
  1162. if (!res->blob_size) {
  1163. continue;
  1164. }
  1165. assert(!res->image);
  1166. qemu_put_be32(f, res->resource_id);
  1167. qemu_put_be32(f, res->blob_size);
  1168. qemu_put_be32(f, res->iov_cnt);
  1169. for (i = 0; i < res->iov_cnt; i++) {
  1170. qemu_put_be64(f, res->addrs[i]);
  1171. qemu_put_be32(f, res->iov[i].iov_len);
  1172. }
  1173. }
  1174. qemu_put_be32(f, 0); /* end of list */
  1175. return 0;
  1176. }
  1177. static int virtio_gpu_blob_load(QEMUFile *f, void *opaque, size_t size,
  1178. const VMStateField *field)
  1179. {
  1180. VirtIOGPU *g = opaque;
  1181. struct virtio_gpu_simple_resource *res;
  1182. uint32_t resource_id;
  1183. int i;
  1184. resource_id = qemu_get_be32(f);
  1185. while (resource_id != 0) {
  1186. res = virtio_gpu_find_resource(g, resource_id);
  1187. if (res) {
  1188. return -EINVAL;
  1189. }
  1190. res = g_new0(struct virtio_gpu_simple_resource, 1);
  1191. res->resource_id = resource_id;
  1192. res->blob_size = qemu_get_be32(f);
  1193. res->iov_cnt = qemu_get_be32(f);
  1194. res->addrs = g_new(uint64_t, res->iov_cnt);
  1195. res->iov = g_new(struct iovec, res->iov_cnt);
  1196. /* read data */
  1197. for (i = 0; i < res->iov_cnt; i++) {
  1198. res->addrs[i] = qemu_get_be64(f);
  1199. res->iov[i].iov_len = qemu_get_be32(f);
  1200. }
  1201. if (!virtio_gpu_load_restore_mapping(g, res)) {
  1202. g_free(res);
  1203. return -EINVAL;
  1204. }
  1205. virtio_gpu_init_udmabuf(res);
  1206. resource_id = qemu_get_be32(f);
  1207. }
  1208. return 0;
  1209. }
  1210. static int virtio_gpu_post_load(void *opaque, int version_id)
  1211. {
  1212. VirtIOGPU *g = opaque;
  1213. struct virtio_gpu_scanout *scanout;
  1214. struct virtio_gpu_simple_resource *res;
  1215. int i;
  1216. for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
  1217. scanout = &g->parent_obj.scanout[i];
  1218. if (!scanout->resource_id) {
  1219. continue;
  1220. }
  1221. res = virtio_gpu_find_resource(g, scanout->resource_id);
  1222. if (!res) {
  1223. return -EINVAL;
  1224. }
  1225. if (scanout->fb.format != 0) {
  1226. uint32_t error = 0;
  1227. struct virtio_gpu_rect r = {
  1228. .x = scanout->x,
  1229. .y = scanout->y,
  1230. .width = scanout->width,
  1231. .height = scanout->height
  1232. };
  1233. if (!virtio_gpu_do_set_scanout(g, i, &scanout->fb, res, &r, &error)) {
  1234. return -EINVAL;
  1235. }
  1236. } else {
  1237. /* legacy v1 migration support */
  1238. if (!res->image) {
  1239. return -EINVAL;
  1240. }
  1241. scanout->ds = qemu_create_displaysurface_pixman(res->image);
  1242. qemu_displaysurface_set_share_handle(scanout->ds, res->share_handle, 0);
  1243. dpy_gfx_replace_surface(scanout->con, scanout->ds);
  1244. }
  1245. dpy_gfx_update_full(scanout->con);
  1246. if (scanout->cursor.resource_id) {
  1247. update_cursor(g, &scanout->cursor);
  1248. }
  1249. res->scanout_bitmask |= (1 << i);
  1250. }
  1251. return 0;
  1252. }
  1253. void virtio_gpu_device_realize(DeviceState *qdev, Error **errp)
  1254. {
  1255. VirtIODevice *vdev = VIRTIO_DEVICE(qdev);
  1256. VirtIOGPU *g = VIRTIO_GPU(qdev);
  1257. if (virtio_gpu_blob_enabled(g->parent_obj.conf)) {
  1258. if (!virtio_gpu_rutabaga_enabled(g->parent_obj.conf) &&
  1259. !virtio_gpu_have_udmabuf()) {
  1260. error_setg(errp, "need rutabaga or udmabuf for blob resources");
  1261. return;
  1262. }
  1263. if (virtio_gpu_virgl_enabled(g->parent_obj.conf)) {
  1264. error_setg(errp, "blobs and virgl are not compatible (yet)");
  1265. return;
  1266. }
  1267. }
  1268. if (!virtio_gpu_base_device_realize(qdev,
  1269. virtio_gpu_handle_ctrl_cb,
  1270. virtio_gpu_handle_cursor_cb,
  1271. errp)) {
  1272. return;
  1273. }
  1274. g->ctrl_vq = virtio_get_queue(vdev, 0);
  1275. g->cursor_vq = virtio_get_queue(vdev, 1);
  1276. g->ctrl_bh = virtio_bh_new_guarded(qdev, virtio_gpu_ctrl_bh, g);
  1277. g->cursor_bh = virtio_bh_new_guarded(qdev, virtio_gpu_cursor_bh, g);
  1278. g->reset_bh = qemu_bh_new(virtio_gpu_reset_bh, g);
  1279. qemu_cond_init(&g->reset_cond);
  1280. QTAILQ_INIT(&g->reslist);
  1281. QTAILQ_INIT(&g->cmdq);
  1282. QTAILQ_INIT(&g->fenceq);
  1283. }
  1284. static void virtio_gpu_device_unrealize(DeviceState *qdev)
  1285. {
  1286. VirtIOGPU *g = VIRTIO_GPU(qdev);
  1287. g_clear_pointer(&g->ctrl_bh, qemu_bh_delete);
  1288. g_clear_pointer(&g->cursor_bh, qemu_bh_delete);
  1289. g_clear_pointer(&g->reset_bh, qemu_bh_delete);
  1290. qemu_cond_destroy(&g->reset_cond);
  1291. virtio_gpu_base_device_unrealize(qdev);
  1292. }
  1293. static void virtio_gpu_reset_bh(void *opaque)
  1294. {
  1295. VirtIOGPU *g = VIRTIO_GPU(opaque);
  1296. VirtIOGPUClass *vgc = VIRTIO_GPU_GET_CLASS(g);
  1297. struct virtio_gpu_simple_resource *res, *tmp;
  1298. uint32_t resource_id;
  1299. Error *local_err = NULL;
  1300. int i = 0;
  1301. QTAILQ_FOREACH_SAFE(res, &g->reslist, next, tmp) {
  1302. resource_id = res->resource_id;
  1303. vgc->resource_destroy(g, res, &local_err);
  1304. if (local_err) {
  1305. error_append_hint(&local_err, "%s: %s resource_destroy"
  1306. "for resource_id = %"PRIu32" failed.\n",
  1307. __func__, object_get_typename(OBJECT(g)),
  1308. resource_id);
  1309. /* error_report_err frees the error object for us */
  1310. error_report_err(local_err);
  1311. local_err = NULL;
  1312. }
  1313. }
  1314. for (i = 0; i < g->parent_obj.conf.max_outputs; i++) {
  1315. dpy_gfx_replace_surface(g->parent_obj.scanout[i].con, NULL);
  1316. }
  1317. g->reset_finished = true;
  1318. qemu_cond_signal(&g->reset_cond);
  1319. }
  1320. void virtio_gpu_reset(VirtIODevice *vdev)
  1321. {
  1322. VirtIOGPU *g = VIRTIO_GPU(vdev);
  1323. struct virtio_gpu_ctrl_command *cmd;
  1324. if (qemu_in_vcpu_thread()) {
  1325. g->reset_finished = false;
  1326. qemu_bh_schedule(g->reset_bh);
  1327. while (!g->reset_finished) {
  1328. qemu_cond_wait_bql(&g->reset_cond);
  1329. }
  1330. } else {
  1331. aio_bh_call(g->reset_bh);
  1332. }
  1333. while (!QTAILQ_EMPTY(&g->cmdq)) {
  1334. cmd = QTAILQ_FIRST(&g->cmdq);
  1335. QTAILQ_REMOVE(&g->cmdq, cmd, next);
  1336. g_free(cmd);
  1337. }
  1338. while (!QTAILQ_EMPTY(&g->fenceq)) {
  1339. cmd = QTAILQ_FIRST(&g->fenceq);
  1340. QTAILQ_REMOVE(&g->fenceq, cmd, next);
  1341. g->inflight--;
  1342. g_free(cmd);
  1343. }
  1344. virtio_gpu_base_reset(VIRTIO_GPU_BASE(vdev));
  1345. }
  1346. static void
  1347. virtio_gpu_get_config(VirtIODevice *vdev, uint8_t *config)
  1348. {
  1349. VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
  1350. memcpy(config, &g->virtio_config, sizeof(g->virtio_config));
  1351. }
  1352. static void
  1353. virtio_gpu_set_config(VirtIODevice *vdev, const uint8_t *config)
  1354. {
  1355. VirtIOGPUBase *g = VIRTIO_GPU_BASE(vdev);
  1356. const struct virtio_gpu_config *vgconfig =
  1357. (const struct virtio_gpu_config *)config;
  1358. if (vgconfig->events_clear) {
  1359. g->virtio_config.events_read &= ~vgconfig->events_clear;
  1360. }
  1361. }
  1362. static bool virtio_gpu_blob_state_needed(void *opaque)
  1363. {
  1364. VirtIOGPU *g = VIRTIO_GPU(opaque);
  1365. return virtio_gpu_blob_enabled(g->parent_obj.conf);
  1366. }
  1367. const VMStateDescription vmstate_virtio_gpu_blob_state = {
  1368. .name = "virtio-gpu/blob",
  1369. .minimum_version_id = VIRTIO_GPU_VM_VERSION,
  1370. .version_id = VIRTIO_GPU_VM_VERSION,
  1371. .needed = virtio_gpu_blob_state_needed,
  1372. .fields = (const VMStateField[]){
  1373. {
  1374. .name = "virtio-gpu/blob",
  1375. .info = &(const VMStateInfo) {
  1376. .name = "blob",
  1377. .get = virtio_gpu_blob_load,
  1378. .put = virtio_gpu_blob_save,
  1379. },
  1380. .flags = VMS_SINGLE,
  1381. } /* device */,
  1382. VMSTATE_END_OF_LIST()
  1383. },
  1384. };
  1385. /*
  1386. * For historical reasons virtio_gpu does not adhere to virtio migration
  1387. * scheme as described in doc/virtio-migration.txt, in a sense that no
  1388. * save/load callback are provided to the core. Instead the device data
  1389. * is saved/loaded after the core data.
  1390. *
  1391. * Because of this we need a special vmsd.
  1392. */
  1393. static const VMStateDescription vmstate_virtio_gpu = {
  1394. .name = "virtio-gpu",
  1395. .minimum_version_id = VIRTIO_GPU_VM_VERSION,
  1396. .version_id = VIRTIO_GPU_VM_VERSION,
  1397. .fields = (const VMStateField[]) {
  1398. VMSTATE_VIRTIO_DEVICE /* core */,
  1399. {
  1400. .name = "virtio-gpu",
  1401. .info = &(const VMStateInfo) {
  1402. .name = "virtio-gpu",
  1403. .get = virtio_gpu_load,
  1404. .put = virtio_gpu_save,
  1405. },
  1406. .flags = VMS_SINGLE,
  1407. } /* device */,
  1408. VMSTATE_END_OF_LIST()
  1409. },
  1410. .subsections = (const VMStateDescription * const []) {
  1411. &vmstate_virtio_gpu_blob_state,
  1412. NULL
  1413. },
  1414. .post_load = virtio_gpu_post_load,
  1415. };
  1416. static Property virtio_gpu_properties[] = {
  1417. VIRTIO_GPU_BASE_PROPERTIES(VirtIOGPU, parent_obj.conf),
  1418. DEFINE_PROP_SIZE("max_hostmem", VirtIOGPU, conf_max_hostmem,
  1419. 256 * MiB),
  1420. DEFINE_PROP_BIT("blob", VirtIOGPU, parent_obj.conf.flags,
  1421. VIRTIO_GPU_FLAG_BLOB_ENABLED, false),
  1422. DEFINE_PROP_SIZE("hostmem", VirtIOGPU, parent_obj.conf.hostmem, 0),
  1423. DEFINE_PROP_UINT8("x-scanout-vmstate-version", VirtIOGPU, scanout_vmstate_version, 2),
  1424. DEFINE_PROP_END_OF_LIST(),
  1425. };
  1426. static void virtio_gpu_class_init(ObjectClass *klass, void *data)
  1427. {
  1428. DeviceClass *dc = DEVICE_CLASS(klass);
  1429. VirtioDeviceClass *vdc = VIRTIO_DEVICE_CLASS(klass);
  1430. VirtIOGPUClass *vgc = VIRTIO_GPU_CLASS(klass);
  1431. VirtIOGPUBaseClass *vgbc = &vgc->parent;
  1432. vgc->handle_ctrl = virtio_gpu_handle_ctrl;
  1433. vgc->process_cmd = virtio_gpu_simple_process_cmd;
  1434. vgc->update_cursor_data = virtio_gpu_update_cursor_data;
  1435. vgc->resource_destroy = virtio_gpu_resource_destroy;
  1436. vgbc->gl_flushed = virtio_gpu_handle_gl_flushed;
  1437. vdc->realize = virtio_gpu_device_realize;
  1438. vdc->unrealize = virtio_gpu_device_unrealize;
  1439. vdc->reset = virtio_gpu_reset;
  1440. vdc->get_config = virtio_gpu_get_config;
  1441. vdc->set_config = virtio_gpu_set_config;
  1442. dc->vmsd = &vmstate_virtio_gpu;
  1443. device_class_set_props(dc, virtio_gpu_properties);
  1444. }
  1445. static const TypeInfo virtio_gpu_info = {
  1446. .name = TYPE_VIRTIO_GPU,
  1447. .parent = TYPE_VIRTIO_GPU_BASE,
  1448. .instance_size = sizeof(VirtIOGPU),
  1449. .class_size = sizeof(VirtIOGPUClass),
  1450. .class_init = virtio_gpu_class_init,
  1451. };
  1452. module_obj(TYPE_VIRTIO_GPU);
  1453. module_kconfig(VIRTIO_GPU);
  1454. static void virtio_register_types(void)
  1455. {
  1456. type_register_static(&virtio_gpu_info);
  1457. }
  1458. type_init(virtio_register_types)