cpu-common.c 8.2 KB

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  1. /*
  2. * QEMU CPU model
  3. *
  4. * Copyright (c) 2012-2014 SUSE LINUX Products GmbH
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. *
  16. * You should have received a copy of the GNU General Public License
  17. * along with this program; if not, see
  18. * <http://www.gnu.org/licenses/gpl-2.0.html>
  19. */
  20. #include "qemu/osdep.h"
  21. #include "qapi/error.h"
  22. #include "hw/core/cpu.h"
  23. #include "sysemu/hw_accel.h"
  24. #include "qemu/notify.h"
  25. #include "qemu/log.h"
  26. #include "qemu/main-loop.h"
  27. #include "exec/log.h"
  28. #include "exec/cpu-common.h"
  29. #include "qemu/error-report.h"
  30. #include "qemu/qemu-print.h"
  31. #include "sysemu/tcg.h"
  32. #include "hw/boards.h"
  33. #include "hw/qdev-properties.h"
  34. #include "trace.h"
  35. #include "qemu/plugin.h"
  36. CPUState *cpu_by_arch_id(int64_t id)
  37. {
  38. CPUState *cpu;
  39. CPU_FOREACH(cpu) {
  40. CPUClass *cc = CPU_GET_CLASS(cpu);
  41. if (cc->get_arch_id(cpu) == id) {
  42. return cpu;
  43. }
  44. }
  45. return NULL;
  46. }
  47. bool cpu_exists(int64_t id)
  48. {
  49. return !!cpu_by_arch_id(id);
  50. }
  51. CPUState *cpu_create(const char *typename)
  52. {
  53. Error *err = NULL;
  54. CPUState *cpu = CPU(object_new(typename));
  55. if (!qdev_realize(DEVICE(cpu), NULL, &err)) {
  56. error_report_err(err);
  57. object_unref(OBJECT(cpu));
  58. exit(EXIT_FAILURE);
  59. }
  60. return cpu;
  61. }
  62. /* Resetting the IRQ comes from across the code base so we take the
  63. * BQL here if we need to. cpu_interrupt assumes it is held.*/
  64. void cpu_reset_interrupt(CPUState *cpu, int mask)
  65. {
  66. bool need_lock = !bql_locked();
  67. if (need_lock) {
  68. bql_lock();
  69. }
  70. cpu->interrupt_request &= ~mask;
  71. if (need_lock) {
  72. bql_unlock();
  73. }
  74. }
  75. void cpu_exit(CPUState *cpu)
  76. {
  77. qatomic_set(&cpu->exit_request, 1);
  78. /* Ensure cpu_exec will see the exit request after TCG has exited. */
  79. smp_wmb();
  80. qatomic_set(&cpu->neg.icount_decr.u16.high, -1);
  81. }
  82. static int cpu_common_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg)
  83. {
  84. return 0;
  85. }
  86. static int cpu_common_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg)
  87. {
  88. return 0;
  89. }
  90. void cpu_dump_state(CPUState *cpu, FILE *f, int flags)
  91. {
  92. CPUClass *cc = CPU_GET_CLASS(cpu);
  93. if (cc->dump_state) {
  94. cpu_synchronize_state(cpu);
  95. cc->dump_state(cpu, f, flags);
  96. }
  97. }
  98. void cpu_reset(CPUState *cpu)
  99. {
  100. device_cold_reset(DEVICE(cpu));
  101. trace_cpu_reset(cpu->cpu_index);
  102. }
  103. static void cpu_common_reset_hold(Object *obj)
  104. {
  105. CPUState *cpu = CPU(obj);
  106. CPUClass *cc = CPU_GET_CLASS(cpu);
  107. if (qemu_loglevel_mask(CPU_LOG_RESET)) {
  108. qemu_log("CPU Reset (CPU %d)\n", cpu->cpu_index);
  109. log_cpu_state(cpu, cc->reset_dump_flags);
  110. }
  111. cpu->interrupt_request = 0;
  112. cpu->halted = cpu->start_powered_off;
  113. cpu->mem_io_pc = 0;
  114. cpu->icount_extra = 0;
  115. qatomic_set(&cpu->neg.icount_decr.u32, 0);
  116. cpu->neg.can_do_io = true;
  117. cpu->exception_index = -1;
  118. cpu->crash_occurred = false;
  119. cpu->cflags_next_tb = -1;
  120. cpu_exec_reset_hold(cpu);
  121. }
  122. static bool cpu_common_has_work(CPUState *cs)
  123. {
  124. return false;
  125. }
  126. ObjectClass *cpu_class_by_name(const char *typename, const char *cpu_model)
  127. {
  128. ObjectClass *oc;
  129. CPUClass *cc;
  130. oc = object_class_by_name(typename);
  131. cc = CPU_CLASS(oc);
  132. assert(cc->class_by_name);
  133. assert(cpu_model);
  134. oc = cc->class_by_name(cpu_model);
  135. if (object_class_dynamic_cast(oc, typename) &&
  136. !object_class_is_abstract(oc)) {
  137. return oc;
  138. }
  139. return NULL;
  140. }
  141. static void cpu_common_parse_features(const char *typename, char *features,
  142. Error **errp)
  143. {
  144. char *val;
  145. static bool cpu_globals_initialized;
  146. /* Single "key=value" string being parsed */
  147. char *featurestr = features ? strtok(features, ",") : NULL;
  148. /* should be called only once, catch invalid users */
  149. assert(!cpu_globals_initialized);
  150. cpu_globals_initialized = true;
  151. while (featurestr) {
  152. val = strchr(featurestr, '=');
  153. if (val) {
  154. GlobalProperty *prop = g_new0(typeof(*prop), 1);
  155. *val = 0;
  156. val++;
  157. prop->driver = typename;
  158. prop->property = g_strdup(featurestr);
  159. prop->value = g_strdup(val);
  160. qdev_prop_register_global(prop);
  161. } else {
  162. error_setg(errp, "Expected key=value format, found %s.",
  163. featurestr);
  164. return;
  165. }
  166. featurestr = strtok(NULL, ",");
  167. }
  168. }
  169. static void cpu_common_realizefn(DeviceState *dev, Error **errp)
  170. {
  171. CPUState *cpu = CPU(dev);
  172. Object *machine = qdev_get_machine();
  173. /* qdev_get_machine() can return something that's not TYPE_MACHINE
  174. * if this is one of the user-only emulators; in that case there's
  175. * no need to check the ignore_memory_transaction_failures board flag.
  176. */
  177. if (object_dynamic_cast(machine, TYPE_MACHINE)) {
  178. MachineClass *mc = MACHINE_GET_CLASS(machine);
  179. if (mc) {
  180. cpu->ignore_memory_transaction_failures =
  181. mc->ignore_memory_transaction_failures;
  182. }
  183. }
  184. if (dev->hotplugged) {
  185. cpu_synchronize_post_init(cpu);
  186. cpu_resume(cpu);
  187. }
  188. /* Plugin initialization must wait until the cpu is fully realized. */
  189. if (tcg_enabled()) {
  190. qemu_plugin_vcpu_init_hook(cpu);
  191. }
  192. /* NOTE: latest generic point where the cpu is fully realized */
  193. }
  194. static void cpu_common_unrealizefn(DeviceState *dev)
  195. {
  196. CPUState *cpu = CPU(dev);
  197. /* Call the plugin hook before clearing the cpu is fully unrealized */
  198. if (tcg_enabled()) {
  199. qemu_plugin_vcpu_exit_hook(cpu);
  200. }
  201. /* NOTE: latest generic point before the cpu is fully unrealized */
  202. cpu_exec_unrealizefn(cpu);
  203. }
  204. static void cpu_common_initfn(Object *obj)
  205. {
  206. CPUState *cpu = CPU(obj);
  207. CPUClass *cc = CPU_GET_CLASS(obj);
  208. cpu->cpu_index = UNASSIGNED_CPU_INDEX;
  209. cpu->cluster_index = UNASSIGNED_CLUSTER_INDEX;
  210. cpu->gdb_num_regs = cpu->gdb_num_g_regs = cc->gdb_num_core_regs;
  211. /* user-mode doesn't have configurable SMP topology */
  212. /* the default value is changed by qemu_init_vcpu() for system-mode */
  213. cpu->nr_cores = 1;
  214. cpu->nr_threads = 1;
  215. cpu->cflags_next_tb = -1;
  216. qemu_mutex_init(&cpu->work_mutex);
  217. qemu_lockcnt_init(&cpu->in_ioctl_lock);
  218. QSIMPLEQ_INIT(&cpu->work_list);
  219. QTAILQ_INIT(&cpu->breakpoints);
  220. QTAILQ_INIT(&cpu->watchpoints);
  221. cpu_exec_initfn(cpu);
  222. }
  223. static void cpu_common_finalize(Object *obj)
  224. {
  225. CPUState *cpu = CPU(obj);
  226. qemu_lockcnt_destroy(&cpu->in_ioctl_lock);
  227. qemu_mutex_destroy(&cpu->work_mutex);
  228. }
  229. static int64_t cpu_common_get_arch_id(CPUState *cpu)
  230. {
  231. return cpu->cpu_index;
  232. }
  233. static void cpu_class_init(ObjectClass *klass, void *data)
  234. {
  235. DeviceClass *dc = DEVICE_CLASS(klass);
  236. ResettableClass *rc = RESETTABLE_CLASS(klass);
  237. CPUClass *k = CPU_CLASS(klass);
  238. k->parse_features = cpu_common_parse_features;
  239. k->get_arch_id = cpu_common_get_arch_id;
  240. k->has_work = cpu_common_has_work;
  241. k->gdb_read_register = cpu_common_gdb_read_register;
  242. k->gdb_write_register = cpu_common_gdb_write_register;
  243. set_bit(DEVICE_CATEGORY_CPU, dc->categories);
  244. dc->realize = cpu_common_realizefn;
  245. dc->unrealize = cpu_common_unrealizefn;
  246. rc->phases.hold = cpu_common_reset_hold;
  247. cpu_class_init_props(dc);
  248. /*
  249. * Reason: CPUs still need special care by board code: wiring up
  250. * IRQs, adding reset handlers, halting non-first CPUs, ...
  251. */
  252. dc->user_creatable = false;
  253. }
  254. static const TypeInfo cpu_type_info = {
  255. .name = TYPE_CPU,
  256. .parent = TYPE_DEVICE,
  257. .instance_size = sizeof(CPUState),
  258. .instance_init = cpu_common_initfn,
  259. .instance_finalize = cpu_common_finalize,
  260. .abstract = true,
  261. .class_size = sizeof(CPUClass),
  262. .class_init = cpu_class_init,
  263. };
  264. static void cpu_register_types(void)
  265. {
  266. type_register_static(&cpu_type_info);
  267. }
  268. type_init(cpu_register_types)