digic.c 3.3 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117
  1. /*
  2. * QEMU model of the Canon DIGIC SoC.
  3. *
  4. * Copyright (C) 2013 Antony Pavlov <antonynpavlov@gmail.com>
  5. *
  6. * This model is based on reverse engineering efforts
  7. * made by CHDK (http://chdk.wikia.com) and
  8. * Magic Lantern (http://www.magiclantern.fm) projects
  9. * contributors.
  10. *
  11. * This program is free software; you can redistribute it and/or modify
  12. * it under the terms of the GNU General Public License as published by
  13. * the Free Software Foundation; either version 2 of the License, or
  14. * (at your option) any later version.
  15. *
  16. * This program is distributed in the hope that it will be useful,
  17. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  19. * GNU General Public License for more details.
  20. *
  21. */
  22. #include "qemu/osdep.h"
  23. #include "qapi/error.h"
  24. #include "qemu/module.h"
  25. #include "hw/arm/digic.h"
  26. #include "sysemu/sysemu.h"
  27. #define DIGIC4_TIMER_BASE(n) (0xc0210000 + (n) * 0x100)
  28. #define DIGIC_UART_BASE 0xc0800000
  29. static void digic_init(Object *obj)
  30. {
  31. DigicState *s = DIGIC(obj);
  32. int i;
  33. object_initialize_child(obj, "cpu", &s->cpu, sizeof(s->cpu),
  34. "arm946-" TYPE_ARM_CPU, &error_abort, NULL);
  35. for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  36. #define DIGIC_TIMER_NAME_MLEN 11
  37. char name[DIGIC_TIMER_NAME_MLEN];
  38. snprintf(name, DIGIC_TIMER_NAME_MLEN, "timer[%d]", i);
  39. sysbus_init_child_obj(obj, name, &s->timer[i], sizeof(s->timer[i]),
  40. TYPE_DIGIC_TIMER);
  41. }
  42. sysbus_init_child_obj(obj, "uart", &s->uart, sizeof(s->uart),
  43. TYPE_DIGIC_UART);
  44. }
  45. static void digic_realize(DeviceState *dev, Error **errp)
  46. {
  47. DigicState *s = DIGIC(dev);
  48. Error *err = NULL;
  49. SysBusDevice *sbd;
  50. int i;
  51. object_property_set_bool(OBJECT(&s->cpu), true, "reset-hivecs", &err);
  52. if (err != NULL) {
  53. error_propagate(errp, err);
  54. return;
  55. }
  56. object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err);
  57. if (err != NULL) {
  58. error_propagate(errp, err);
  59. return;
  60. }
  61. for (i = 0; i < DIGIC4_NB_TIMERS; i++) {
  62. object_property_set_bool(OBJECT(&s->timer[i]), true, "realized", &err);
  63. if (err != NULL) {
  64. error_propagate(errp, err);
  65. return;
  66. }
  67. sbd = SYS_BUS_DEVICE(&s->timer[i]);
  68. sysbus_mmio_map(sbd, 0, DIGIC4_TIMER_BASE(i));
  69. }
  70. qdev_prop_set_chr(DEVICE(&s->uart), "chardev", serial_hd(0));
  71. object_property_set_bool(OBJECT(&s->uart), true, "realized", &err);
  72. if (err != NULL) {
  73. error_propagate(errp, err);
  74. return;
  75. }
  76. sbd = SYS_BUS_DEVICE(&s->uart);
  77. sysbus_mmio_map(sbd, 0, DIGIC_UART_BASE);
  78. }
  79. static void digic_class_init(ObjectClass *oc, void *data)
  80. {
  81. DeviceClass *dc = DEVICE_CLASS(oc);
  82. dc->realize = digic_realize;
  83. /* Reason: Uses serial_hds in the realize function --> not usable twice */
  84. dc->user_creatable = false;
  85. }
  86. static const TypeInfo digic_type_info = {
  87. .name = TYPE_DIGIC,
  88. .parent = TYPE_DEVICE,
  89. .instance_size = sizeof(DigicState),
  90. .instance_init = digic_init,
  91. .class_init = digic_class_init,
  92. };
  93. static void digic_register_types(void)
  94. {
  95. type_register_static(&digic_type_info);
  96. }
  97. type_init(digic_register_types)