pci.json 8.8 KB

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  1. # -*- Mode: Python -*-
  2. # vim: filetype=python
  3. #
  4. # This work is licensed under the terms of the GNU GPL, version 2 or later.
  5. # See the COPYING file in the top-level directory.
  6. # SPDX-License-Identifier: GPL-2.0-or-later
  7. ##
  8. # = PCI
  9. ##
  10. ##
  11. # @PciMemoryRange:
  12. #
  13. # A PCI device memory region
  14. #
  15. # @base: the starting address (guest physical)
  16. #
  17. # @limit: the ending address (guest physical)
  18. #
  19. # Since: 0.14
  20. ##
  21. { 'struct': 'PciMemoryRange', 'data': {'base': 'int', 'limit': 'int'} }
  22. ##
  23. # @PciMemoryRegion:
  24. #
  25. # Information about a PCI device I/O region.
  26. #
  27. # @bar: the index of the Base Address Register for this region
  28. #
  29. # @type:
  30. # - 'io' if the region is a PIO region
  31. # - 'memory' if the region is a MMIO region
  32. #
  33. # @size: memory size
  34. #
  35. # @prefetch: if @type is 'memory', true if the memory is prefetchable
  36. #
  37. # @mem_type_64: if @type is 'memory', true if the BAR is 64-bit
  38. #
  39. # Since: 0.14
  40. ##
  41. { 'struct': 'PciMemoryRegion',
  42. 'data': {'bar': 'int', 'type': 'str', 'address': 'int', 'size': 'int',
  43. '*prefetch': 'bool', '*mem_type_64': 'bool' } }
  44. ##
  45. # @PciBusInfo:
  46. #
  47. # Information about a bus of a PCI Bridge device
  48. #
  49. # @number: primary bus interface number. This should be the number of
  50. # the bus the device resides on.
  51. #
  52. # @secondary: secondary bus interface number. This is the number of
  53. # the main bus for the bridge
  54. #
  55. # @subordinate: This is the highest number bus that resides below the
  56. # bridge.
  57. #
  58. # @io_range: The PIO range for all devices on this bridge
  59. #
  60. # @memory_range: The MMIO range for all devices on this bridge
  61. #
  62. # @prefetchable_range: The range of prefetchable MMIO for all devices
  63. # on this bridge
  64. #
  65. # Since: 2.4
  66. ##
  67. { 'struct': 'PciBusInfo',
  68. 'data': {'number': 'int', 'secondary': 'int', 'subordinate': 'int',
  69. 'io_range': 'PciMemoryRange',
  70. 'memory_range': 'PciMemoryRange',
  71. 'prefetchable_range': 'PciMemoryRange' } }
  72. ##
  73. # @PciBridgeInfo:
  74. #
  75. # Information about a PCI Bridge device
  76. #
  77. # @bus: information about the bus the device resides on
  78. #
  79. # @devices: a list of @PciDeviceInfo for each device on this bridge
  80. #
  81. # Since: 0.14
  82. ##
  83. { 'struct': 'PciBridgeInfo',
  84. 'data': {'bus': 'PciBusInfo', '*devices': ['PciDeviceInfo']} }
  85. ##
  86. # @PciDeviceClass:
  87. #
  88. # Information about the Class of a PCI device
  89. #
  90. # @desc: a string description of the device's class (not stable, and
  91. # should only be treated as informational)
  92. #
  93. # @class: the class code of the device
  94. #
  95. # Since: 2.4
  96. ##
  97. { 'struct': 'PciDeviceClass',
  98. 'data': {'*desc': 'str', 'class': 'int'} }
  99. ##
  100. # @PciDeviceId:
  101. #
  102. # Information about the Id of a PCI device
  103. #
  104. # @device: the PCI device id
  105. #
  106. # @vendor: the PCI vendor id
  107. #
  108. # @subsystem: the PCI subsystem id (since 3.1)
  109. #
  110. # @subsystem-vendor: the PCI subsystem vendor id (since 3.1)
  111. #
  112. # Since: 2.4
  113. ##
  114. { 'struct': 'PciDeviceId',
  115. 'data': {'device': 'int', 'vendor': 'int', '*subsystem': 'int',
  116. '*subsystem-vendor': 'int'} }
  117. ##
  118. # @PciDeviceInfo:
  119. #
  120. # Information about a PCI device
  121. #
  122. # @bus: the bus number of the device
  123. #
  124. # @slot: the slot the device is located in
  125. #
  126. # @function: the function of the slot used by the device
  127. #
  128. # @class_info: the class of the device
  129. #
  130. # @id: the PCI device id
  131. #
  132. # @irq: if an IRQ is assigned to the device, the IRQ number
  133. #
  134. # @irq_pin: the IRQ pin, zero means no IRQ (since 5.1)
  135. #
  136. # @qdev_id: the device name of the PCI device
  137. #
  138. # @pci_bridge: if the device is a PCI bridge, the bridge information
  139. #
  140. # @regions: a list of the PCI I/O regions associated with the device
  141. #
  142. # Since: 0.14
  143. ##
  144. { 'struct': 'PciDeviceInfo',
  145. 'data': {'bus': 'int', 'slot': 'int', 'function': 'int',
  146. 'class_info': 'PciDeviceClass', 'id': 'PciDeviceId',
  147. '*irq': 'int', 'irq_pin': 'int', 'qdev_id': 'str',
  148. '*pci_bridge': 'PciBridgeInfo', 'regions': ['PciMemoryRegion'] }}
  149. ##
  150. # @PciInfo:
  151. #
  152. # Information about a PCI bus
  153. #
  154. # @bus: the bus index
  155. #
  156. # @devices: a list of devices on this bus
  157. #
  158. # Since: 0.14
  159. ##
  160. { 'struct': 'PciInfo', 'data': {'bus': 'int', 'devices': ['PciDeviceInfo']} }
  161. ##
  162. # @query-pci:
  163. #
  164. # Return information about the PCI bus topology of the guest.
  165. #
  166. # Returns: a list of @PciInfo for each PCI bus. Each bus is
  167. # represented by a json-object, which has a key with a json-array
  168. # of all PCI devices attached to it. Each device is represented
  169. # by a json-object.
  170. #
  171. # Since: 0.14
  172. #
  173. # .. qmp-example::
  174. #
  175. # -> { "execute": "query-pci" }
  176. # <- { "return": [
  177. # {
  178. # "bus": 0,
  179. # "devices": [
  180. # {
  181. # "bus": 0,
  182. # "qdev_id": "",
  183. # "slot": 0,
  184. # "class_info": {
  185. # "class": 1536,
  186. # "desc": "Host bridge"
  187. # },
  188. # "id": {
  189. # "device": 32902,
  190. # "vendor": 4663
  191. # },
  192. # "function": 0,
  193. # "regions": [
  194. # ]
  195. # },
  196. # {
  197. # "bus": 0,
  198. # "qdev_id": "",
  199. # "slot": 1,
  200. # "class_info": {
  201. # "class": 1537,
  202. # "desc": "ISA bridge"
  203. # },
  204. # "id": {
  205. # "device": 32902,
  206. # "vendor": 28672
  207. # },
  208. # "function": 0,
  209. # "regions": [
  210. # ]
  211. # },
  212. # {
  213. # "bus": 0,
  214. # "qdev_id": "",
  215. # "slot": 1,
  216. # "class_info": {
  217. # "class": 257,
  218. # "desc": "IDE controller"
  219. # },
  220. # "id": {
  221. # "device": 32902,
  222. # "vendor": 28688
  223. # },
  224. # "function": 1,
  225. # "regions": [
  226. # {
  227. # "bar": 4,
  228. # "size": 16,
  229. # "address": 49152,
  230. # "type": "io"
  231. # }
  232. # ]
  233. # },
  234. # {
  235. # "bus": 0,
  236. # "qdev_id": "",
  237. # "slot": 2,
  238. # "class_info": {
  239. # "class": 768,
  240. # "desc": "VGA controller"
  241. # },
  242. # "id": {
  243. # "device": 4115,
  244. # "vendor": 184
  245. # },
  246. # "function": 0,
  247. # "regions": [
  248. # {
  249. # "prefetch": true,
  250. # "mem_type_64": false,
  251. # "bar": 0,
  252. # "size": 33554432,
  253. # "address": 4026531840,
  254. # "type": "memory"
  255. # },
  256. # {
  257. # "prefetch": false,
  258. # "mem_type_64": false,
  259. # "bar": 1,
  260. # "size": 4096,
  261. # "address": 4060086272,
  262. # "type": "memory"
  263. # },
  264. # {
  265. # "prefetch": false,
  266. # "mem_type_64": false,
  267. # "bar": 6,
  268. # "size": 65536,
  269. # "address": -1,
  270. # "type": "memory"
  271. # }
  272. # ]
  273. # },
  274. # {
  275. # "bus": 0,
  276. # "qdev_id": "",
  277. # "irq": 11,
  278. # "slot": 4,
  279. # "class_info": {
  280. # "class": 1280,
  281. # "desc": "RAM controller"
  282. # },
  283. # "id": {
  284. # "device": 6900,
  285. # "vendor": 4098
  286. # },
  287. # "function": 0,
  288. # "regions": [
  289. # {
  290. # "bar": 0,
  291. # "size": 32,
  292. # "address": 49280,
  293. # "type": "io"
  294. # }
  295. # ]
  296. # }
  297. # ]
  298. # }
  299. # ]
  300. # }
  301. #
  302. # This example has been shortened as the real response is too long.
  303. ##
  304. { 'command': 'query-pci', 'returns': ['PciInfo'] }