 Frederic Barrat
|
96a2132ce9
ppc/xive2: Add support for MMIO operations on the NVPG/NVC BAR
|
5 months ago |
|
Frederic Barrat
|
9d2b6058c5
ppc/xive2: Add grouping level to notification
|
5 months ago |
 Jamin Lin
|
9178ff91f3
hw/intc/aspeed: Add Support for Multi-Output IRQ Handling
|
5 months ago |
|
Jamin Lin
|
c6c5e63d46
hw/intc/aspeed: Refactor INTC to support separate input and output pin indices
|
5 months ago |
|
Jamin Lin
|
49da40cf5f
hw/intc/aspeed: Add object type name to trace events for better debugging
|
5 months ago |
|
Jamin Lin
|
d831c5fd86
aspeed/intc: Add AST2700 support
|
1 year ago |
 Jiaxun Yang
|
b4a12dfc21
hw/intc/loongarch_ipi: Rename as loongson_ipi
|
1 year ago |
|
Jiaxun Yang
|
39b3ae11b0
hw/intc/loongarch_ipi: Remove pointless MAX_CPU check
|
1 year ago |
 Peter Maydell
|
d2c0c6aab6
hw/intc/arm_gicv3: Handle icv_nmiar1_read() for icc_nmiar1_read()
|
1 year ago |
|
Peter Maydell
|
28cca59c46
hw/intc/arm_gicv3: Add NMI handling CPU interface registers
|
1 year ago |
 Bui Quang Minh
|
b2101358e5
i386/tcg: implement x2APIC registers MSR access
|
1 year ago |
|
Frederic Barrat
|
ff349cce89
pnv/xive: Print CPU target in all TIMA traces
|
2 years ago |
 Song Gao
|
7ef0eb35a4
hw/intc: Add NULL pointer check on LoongArch ipi device
|
2 years ago |
 Thomas Huth
|
2b85e0cda4
hw/intc: Extract the IRQ counting functions into a separate file
|
2 years ago |
 Xiaojuan Yang
|
3fc8f74b51
hw/intc: Convert the memops to with_attrs in LoongArch extioi
|
2 years ago |
|
Xiaojuan Yang
|
cbff2db1e9
hw/intc: Add LoongArch extioi interrupt controller(EIOINTC)
|
3 years ago |
|
Xiaojuan Yang
|
249ad85a4b
hw/intc: Add LoongArch ls7a msi interrupt controller support(PCH-MSI)
|
3 years ago |
|
Xiaojuan Yang
|
0f4fcf1845
hw/intc: Add LoongArch ls7a interrupt controller support(PCH-PIC)
|
3 years ago |
|
Xiaojuan Yang
|
f6783e3438
hw/loongarch: Add LoongArch ipi interrupt support(IPI)
|
3 years ago |
|
Peter Maydell
|
c3f21b065a
hw/intc/arm_gicv3_cpuif: Support vLPIs
|
3 years ago |
|
Peter Maydell
|
10337638bb
hw/intc/arm_gicv3_cpuif: Split "update vIRQ/vFIQ" from gicv3_cpuif_virt_update()
|
3 years ago |
|
Peter Maydell
|
c6dd2f9950
hw/intc/arm_gicv3_its: Implement VINVALL
|
3 years ago |
|
Peter Maydell
|
3c64a42c0b
hw/intc/arm_gicv3_its: Implement VMOVI
|
3 years ago |
|
Peter Maydell
|
a686e85d2b
hw/intc/arm_gicv3_its: Implement INV command properly
|
3 years ago |
|
Peter Maydell
|
f76ba95a03
hw/intc/arm_gicv3_its: Implement VSYNC
|
3 years ago |
|
Peter Maydell
|
3851af4585
hw/intc/arm_gicv3_its: Implement VMOVP
|
3 years ago |
|
Peter Maydell
|
469cf23bf8
hw/intc/arm_gicv3_its: Handle virtual interrupts in process_its_cmd()
|
3 years ago |
|
Peter Maydell
|
0cdf7a5dc8
hw/intc/arm_gicv3_its: Implement VMAPP
|
3 years ago |
|
Peter Maydell
|
9de53de60c
hw/intc/arm_gicv3_its: Implement VMAPI and VMAPTI
|
3 years ago |
|
Peter Maydell
|
930f40e90b
hw/intc/arm_gicv3_its: Add trace events for table reads and writes
|
3 years ago |
