Histórico de commits

Autor SHA1 Mensagem Data
  Paolo Bonzini 7447545544 change all other clock references to use nanosecond resolution accessors 14 anos atrás
  Edgar E. Iglesias e027e1f075 mips: Expire late timers when reading cp0_count 14 anos atrás
  Edgar E. Iglesias b1dfe6437c mips: Break out cpu_mips_timer_expire 14 anos atrás
  Blue Swirl b970ea8f8d Compile some MIPS devices only once 15 anos atrás
  Aurelien Jarno 7b9cbadb2b mips: add header to mips_int.c and mips_timer.c 15 anos atrás
  Juan Quintela 6ee093c907 Unexport ticks_per_sec variable. Create get_ticks_per_sec() function 16 anos atrás
  aliguori 93fcfe39a0 Convert references to logfile/loglevel to use qemu_log*() macros 16 anos atrás
  aurel32 59d9413094 target-mips: CP0 Random register improvements 16 anos atrás
  aurel32 75973fa1ee MIPS: remove empty cpu_mips_irqctrl_init() 17 anos atrás
  pbrook 2e70f6efa8 Add instruction counter. 17 anos atrás
  aurel32 ea86e4e600 Optimize MIPS timer read/write functions 17 anos atrás
  pbrook 87ecb68bdf Break up vl.h. 18 anos atrás
  ths 42532189df Timer start/stop implementation, by Aurelien Jarno. 18 anos atrás
  ths ead9360e2f Partial support for 34K multithreading, not functional yet. 18 anos atrás
  ths fcb4a419f5 Choose number of TLBs at runtime, by Herve Poussineau. 18 anos atrás
  pbrook d537cf6c86 Unify IRQ handling. 18 anos atrás
  ths 3529b538ce Fix disabling of the Cause register for R2. 18 anos atrás
  ths 39d51eb8bc Fix BD flag handling, cause register contents, implement some more bits 18 anos atrás
  ths 4de9b249d3 Reworking MIPS interrupt handling, by Aurelien Jarno. 18 anos atrás
  ths e16fe40c87 Move the MIPS CPU timer in a seperate file, by Alec Voropay. 18 anos atrás