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@@ -17,6 +17,7 @@
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#define LASI_UART_HPA 0xffd05000
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#define LASI_SCSI_HPA 0xffd06000
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#define LASI_LAN_HPA 0xffd07000
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+#define LASI_RTC_HPA 0xffd09000
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#define LASI_LPT_HPA 0xffd02000
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#define LASI_AUDIO_HPA 0xffd04000
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#define LASI_PS2KBD_HPA 0xffd08000
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@@ -37,10 +38,15 @@
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#define PORT_PCI_CMD (PCI_HPA + DINO_PCI_ADDR)
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#define PORT_PCI_DATA (PCI_HPA + DINO_CONFIG_DATA)
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+/* QEMU fw_cfg interface port */
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+#define QEMU_FW_CFG_IO_BASE (MEMORY_HPA + 0x80)
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+
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#define PORT_SERIAL1 (DINO_UART_HPA + 0x800)
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#define PORT_SERIAL2 (LASI_UART_HPA + 0x800)
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#define HPPA_MAX_CPUS 8 /* max. number of SMP CPUs */
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#define CPU_CLOCK_MHZ 250 /* emulate a 250 MHz CPU */
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+#define CPU_HPA_CR_REG 7 /* store CPU HPA in cr7 (SeaBIOS internal) */
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+
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#endif
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