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@@ -1515,7 +1515,8 @@ void pxa2xx_reset(int line, int level, void *opaque)
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}
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}
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/* Initialise a PXA270 integrated chip (ARM based core). */
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/* Initialise a PXA270 integrated chip (ARM based core). */
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-struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
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+struct pxa2xx_state_s *pxa270_init(unsigned int sdram_size,
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+ DisplayState *ds, const char *revision)
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{
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{
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struct pxa2xx_state_s *s;
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struct pxa2xx_state_s *s;
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struct pxa2xx_ssp_s *ssp;
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struct pxa2xx_ssp_s *ssp;
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@@ -1530,6 +1531,12 @@ struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
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s->env = cpu_init();
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s->env = cpu_init();
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cpu_arm_set_model(s->env, revision ?: "pxa270");
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cpu_arm_set_model(s->env, revision ?: "pxa270");
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+ /* SDRAM & Internal Memory Storage */
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+ cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
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+ sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
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+ cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
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+ 0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
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+
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s->pic = pxa2xx_pic_init(0x40d00000, s->env);
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s->pic = pxa2xx_pic_init(0x40d00000, s->env);
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s->dma = pxa27x_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);
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s->dma = pxa27x_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);
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@@ -1613,7 +1620,8 @@ struct pxa2xx_state_s *pxa270_init(DisplayState *ds, const char *revision)
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}
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}
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/* Initialise a PXA255 integrated chip (ARM based core). */
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/* Initialise a PXA255 integrated chip (ARM based core). */
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-struct pxa2xx_state_s *pxa255_init(DisplayState *ds)
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+struct pxa2xx_state_s *pxa255_init(unsigned int sdram_size,
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+ DisplayState *ds)
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{
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{
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struct pxa2xx_state_s *s;
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struct pxa2xx_state_s *s;
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struct pxa2xx_ssp_s *ssp;
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struct pxa2xx_ssp_s *ssp;
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@@ -1623,6 +1631,12 @@ struct pxa2xx_state_s *pxa255_init(DisplayState *ds)
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s->env = cpu_init();
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s->env = cpu_init();
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cpu_arm_set_model(s->env, "pxa255");
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cpu_arm_set_model(s->env, "pxa255");
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+ /* SDRAM & Internal Memory Storage */
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+ cpu_register_physical_memory(PXA2XX_SDRAM_BASE,
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+ sdram_size, qemu_ram_alloc(sdram_size) | IO_MEM_RAM);
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+ cpu_register_physical_memory(PXA2XX_INTERNAL_BASE,
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+ 0x40000, qemu_ram_alloc(0x40000) | IO_MEM_RAM);
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+
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s->pic = pxa2xx_pic_init(0x40d00000, s->env);
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s->pic = pxa2xx_pic_init(0x40d00000, s->env);
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s->dma = pxa255_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);
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s->dma = pxa255_dma_init(0x40000000, s->pic[PXA2XX_PIC_DMA]);
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