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@@ -54,6 +54,8 @@
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#define LEON3_PROM_OFFSET (0x00000000)
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#define LEON3_RAM_OFFSET (0x40000000)
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+#define MAX_CPUS 4
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+
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#define LEON3_UART_OFFSET (0x80000100)
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#define LEON3_UART_IRQ (3)
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@@ -67,8 +69,11 @@
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#define LEON3_AHB_PNP_OFFSET (0xFFFFF000)
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typedef struct ResetData {
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- SPARCCPU *cpu;
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- uint32_t entry; /* save kernel entry in case of reset */
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+ struct CPUResetData {
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+ int id;
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+ SPARCCPU *cpu;
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+ } info[MAX_CPUS];
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+ uint32_t entry; /* save kernel entry in case of reset */
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} ResetData;
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static uint32_t *gen_store_u32(uint32_t *code, hwaddr addr, uint32_t val)
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@@ -123,17 +128,19 @@ static void write_bootloader(void *ptr, hwaddr kernel_addr)
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stl_p(p++, 0x01000000); /* nop */
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}
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-static void main_cpu_reset(void *opaque)
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+static void leon3_cpu_reset(void *opaque)
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{
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- ResetData *s = (ResetData *)opaque;
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- CPUState *cpu = CPU(s->cpu);
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- CPUSPARCState *env = &s->cpu->env;
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+ struct CPUResetData *info = (struct CPUResetData *) opaque;
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+ int id = info->id;
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+ ResetData *s = (ResetData *)DO_UPCAST(ResetData, info[id], info);
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+ CPUState *cpu = CPU(s->info[id].cpu);
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+ CPUSPARCState *env = cpu_env(cpu);
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cpu_reset(cpu);
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- cpu->halted = 0;
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- env->pc = s->entry;
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- env->npc = s->entry + 4;
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+ cpu->halted = cpu->cpu_index != 0;
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+ env->pc = s->entry;
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+ env->npc = s->entry + 4;
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}
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static void leon3_cache_control_int(CPUSPARCState *env)
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@@ -167,8 +174,8 @@ static void leon3_cache_control_int(CPUSPARCState *env)
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static void leon3_irq_ack(CPUSPARCState *env, int intno)
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{
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- /* No SMP support yet, only CPU #0 available so far. */
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- grlib_irqmp_ack(env->irq_manager, 0, intno);
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+ CPUState *cpu = CPU(env_cpu(env));
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+ grlib_irqmp_ack(env->irq_manager, cpu->cpu_index, intno);
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}
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/*
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@@ -210,6 +217,19 @@ static void leon3_set_pil_in(void *opaque, int n, int level)
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}
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}
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+static void leon3_start_cpu_async_work(CPUState *cpu, run_on_cpu_data data)
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+{
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+ cpu->halted = 0;
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+}
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+
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+static void leon3_start_cpu(void *opaque, int n, int level)
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+{
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+ CPUState *cs = CPU(opaque);
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+
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+ assert(level == 1);
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+ async_run_on_cpu(cs, leon3_start_cpu_async_work, RUN_ON_CPU_NULL);
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+}
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+
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static void leon3_irq_manager(CPUSPARCState *env, int intno)
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{
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leon3_irq_ack(env, intno);
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@@ -235,16 +255,20 @@ static void leon3_generic_hw_init(MachineState *machine)
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AHBPnp *ahb_pnp;
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APBPnp *apb_pnp;
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- /* Init CPU */
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- cpu = SPARC_CPU(cpu_create(machine->cpu_type));
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- env = &cpu->env;
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+ reset_info = g_malloc0(sizeof(ResetData));
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- cpu_sparc_set_id(env, 0);
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+ for (i = 0; i < machine->smp.cpus; i++) {
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+ /* Init CPU */
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+ cpu = SPARC_CPU(cpu_create(machine->cpu_type));
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+ env = &cpu->env;
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- /* Reset data */
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- reset_info = g_new0(ResetData, 1);
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- reset_info->cpu = cpu;
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- qemu_register_reset(main_cpu_reset, reset_info);
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+ cpu_sparc_set_id(env, i);
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+
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+ /* Reset data */
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+ reset_info->info[i].id = i;
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+ reset_info->info[i].cpu = cpu;
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+ qemu_register_reset(leon3_cpu_reset, &reset_info->info[i]);
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+ }
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ahb_pnp = GRLIB_AHB_PNP(qdev_new(TYPE_GRLIB_AHB_PNP));
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sysbus_realize_and_unref(SYS_BUS_DEVICE(ahb_pnp), &error_fatal);
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@@ -262,14 +286,28 @@ static void leon3_generic_hw_init(MachineState *machine)
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/* Allocate IRQ manager */
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irqmpdev = qdev_new(TYPE_GRLIB_IRQMP);
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+ object_property_set_int(OBJECT(irqmpdev), "ncpus", machine->smp.cpus,
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+ &error_fatal);
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sysbus_realize_and_unref(SYS_BUS_DEVICE(irqmpdev), &error_fatal);
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- qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
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- env, "pil", 1);
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- qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", 0,
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- qdev_get_gpio_in_named(DEVICE(cpu), "pil", 0));
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+
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+ for (i = 0; i < machine->smp.cpus; i++) {
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+ cpu = reset_info->info[i].cpu;
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+ env = &cpu->env;
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+ qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_start_cpu,
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+ cpu, "start_cpu", 1);
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+ qdev_connect_gpio_out_named(irqmpdev, "grlib-start-cpu", i,
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+ qdev_get_gpio_in_named(DEVICE(cpu),
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+ "start_cpu", 0));
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+ qdev_init_gpio_in_named_with_opaque(DEVICE(cpu), leon3_set_pil_in,
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+ env, "pil", 1);
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+ qdev_connect_gpio_out_named(irqmpdev, "grlib-irq", i,
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+ qdev_get_gpio_in_named(DEVICE(cpu),
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+ "pil", 0));
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+ env->irq_manager = irqmpdev;
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+ env->qemu_irq_ack = leon3_irq_manager;
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+ }
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+
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sysbus_mmio_map(SYS_BUS_DEVICE(irqmpdev), 0, LEON3_IRQMP_OFFSET);
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- env->irq_manager = irqmpdev;
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- env->qemu_irq_ack = leon3_irq_manager;
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grlib_apb_pnp_add_entry(apb_pnp, LEON3_IRQMP_OFFSET, 0xFFF,
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GRLIB_VENDOR_GAISLER, GRLIB_IRQMP_DEV,
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2, 0, GRLIB_APBIO_AREA);
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@@ -342,6 +380,10 @@ static void leon3_generic_hw_init(MachineState *machine)
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*/
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write_bootloader(memory_region_get_ram_ptr(prom), entry);
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reset_info->entry = LEON3_PROM_OFFSET;
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+ for (i = 0; i < machine->smp.cpus; i++) {
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+ reset_info->info[i].cpu->env.pc = LEON3_PROM_OFFSET;
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+ reset_info->info[i].cpu->env.npc = LEON3_PROM_OFFSET + 4;
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+ }
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}
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}
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@@ -380,6 +422,7 @@ static void leon3_generic_machine_init(MachineClass *mc)
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mc->init = leon3_generic_hw_init;
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mc->default_cpu_type = SPARC_CPU_TYPE_NAME("LEON3");
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mc->default_ram_id = "leon3.ram";
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+ mc->max_cpus = MAX_CPUS;
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}
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DEFINE_MACHINE("leon3_generic", leon3_generic_machine_init)
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