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@@ -61,9 +61,9 @@
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#define RTAS_TYPE_MSI 1
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#define RTAS_TYPE_MSIX 2
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-sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid)
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+SpaprPhbState *spapr_pci_find_phb(SpaprMachineState *spapr, uint64_t buid)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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QLIST_FOREACH(sphb, &spapr->phbs, list) {
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if (sphb->buid != buid) {
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@@ -75,10 +75,10 @@ sPAPRPHBState *spapr_pci_find_phb(sPAPRMachineState *spapr, uint64_t buid)
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return NULL;
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}
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-PCIDevice *spapr_pci_find_dev(sPAPRMachineState *spapr, uint64_t buid,
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+PCIDevice *spapr_pci_find_dev(SpaprMachineState *spapr, uint64_t buid,
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uint32_t config_addr)
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{
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- sPAPRPHBState *sphb = spapr_pci_find_phb(spapr, buid);
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+ SpaprPhbState *sphb = spapr_pci_find_phb(spapr, buid);
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PCIHostState *phb = PCI_HOST_BRIDGE(sphb);
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int bus_num = (config_addr >> 16) & 0xFF;
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int devfn = (config_addr >> 8) & 0xFF;
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@@ -96,7 +96,7 @@ static uint32_t rtas_pci_cfgaddr(uint32_t arg)
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return ((arg >> 20) & 0xf00) | (arg & 0xff);
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}
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-static void finish_read_pci_config(sPAPRMachineState *spapr, uint64_t buid,
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+static void finish_read_pci_config(SpaprMachineState *spapr, uint64_t buid,
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uint32_t addr, uint32_t size,
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target_ulong rets)
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{
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@@ -126,7 +126,7 @@ static void finish_read_pci_config(sPAPRMachineState *spapr, uint64_t buid,
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rtas_st(rets, 1, val);
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}
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-static void rtas_ibm_read_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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+static void rtas_ibm_read_pci_config(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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@@ -146,7 +146,7 @@ static void rtas_ibm_read_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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finish_read_pci_config(spapr, buid, addr, size, rets);
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}
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-static void rtas_read_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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+static void rtas_read_pci_config(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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@@ -164,7 +164,7 @@ static void rtas_read_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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finish_read_pci_config(spapr, 0, addr, size, rets);
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}
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-static void finish_write_pci_config(sPAPRMachineState *spapr, uint64_t buid,
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+static void finish_write_pci_config(SpaprMachineState *spapr, uint64_t buid,
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uint32_t addr, uint32_t size,
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uint32_t val, target_ulong rets)
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{
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@@ -192,7 +192,7 @@ static void finish_write_pci_config(sPAPRMachineState *spapr, uint64_t buid,
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rtas_st(rets, 0, RTAS_OUT_SUCCESS);
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}
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-static void rtas_ibm_write_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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+static void rtas_ibm_write_pci_config(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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@@ -213,7 +213,7 @@ static void rtas_ibm_write_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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finish_write_pci_config(spapr, buid, addr, size, val, rets);
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}
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-static void rtas_write_pci_config(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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+static void rtas_write_pci_config(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args,
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uint32_t nret, target_ulong rets)
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@@ -262,12 +262,12 @@ static void spapr_msi_setmsg(PCIDevice *pdev, hwaddr addr, bool msix,
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}
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}
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-static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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+static void rtas_ibm_change_msi(PowerPCCPU *cpu, SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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+ SpaprMachineClass *smc = SPAPR_MACHINE_GET_CLASS(spapr);
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uint32_t config_addr = rtas_ld(args, 0);
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uint64_t buid = rtas_ldq(args, 1);
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unsigned int func = rtas_ld(args, 3);
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@@ -275,14 +275,14 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRMachineState *spapr,
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unsigned int seq_num = rtas_ld(args, 5);
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unsigned int ret_intr_type;
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unsigned int irq, max_irqs = 0;
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- sPAPRPHBState *phb = NULL;
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+ SpaprPhbState *phb = NULL;
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PCIDevice *pdev = NULL;
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spapr_pci_msi *msi;
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int *config_addr_key;
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Error *err = NULL;
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int i;
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- /* Fins sPAPRPHBState */
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+ /* Fins SpaprPhbState */
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phb = spapr_pci_find_phb(spapr, buid);
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if (phb) {
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pdev = spapr_pci_find_dev(spapr, buid, config_addr);
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@@ -439,7 +439,7 @@ out:
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}
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static void rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token,
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uint32_t nargs,
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target_ulong args,
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@@ -449,11 +449,11 @@ static void rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
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uint32_t config_addr = rtas_ld(args, 0);
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uint64_t buid = rtas_ldq(args, 1);
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unsigned int intr_src_num = -1, ioa_intr_num = rtas_ld(args, 3);
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- sPAPRPHBState *phb = NULL;
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+ SpaprPhbState *phb = NULL;
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PCIDevice *pdev = NULL;
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spapr_pci_msi *msi;
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- /* Find sPAPRPHBState */
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+ /* Find SpaprPhbState */
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phb = spapr_pci_find_phb(spapr, buid);
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if (phb) {
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pdev = spapr_pci_find_dev(spapr, buid, config_addr);
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@@ -480,12 +480,12 @@ static void rtas_ibm_query_interrupt_source_number(PowerPCCPU *cpu,
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}
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static void rtas_ibm_set_eeh_option(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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uint32_t addr, option;
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uint64_t buid;
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int ret;
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@@ -516,12 +516,12 @@ param_error_exit:
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}
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static void rtas_ibm_get_config_addr_info2(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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PCIDevice *pdev;
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uint32_t addr, option;
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uint64_t buid;
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@@ -570,12 +570,12 @@ param_error_exit:
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}
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static void rtas_ibm_read_slot_reset_state2(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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uint64_t buid;
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int state, ret;
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@@ -612,12 +612,12 @@ param_error_exit:
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}
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static void rtas_ibm_set_slot_reset(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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uint32_t option;
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uint64_t buid;
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int ret;
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@@ -646,12 +646,12 @@ param_error_exit:
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}
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static void rtas_ibm_configure_pe(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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uint64_t buid;
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int ret;
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@@ -679,12 +679,12 @@ param_error_exit:
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/* To support it later */
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static void rtas_ibm_slot_error_detail(PowerPCCPU *cpu,
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- sPAPRMachineState *spapr,
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+ SpaprMachineState *spapr,
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uint32_t token, uint32_t nargs,
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target_ulong args, uint32_t nret,
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target_ulong rets)
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{
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- sPAPRPHBState *sphb;
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+ SpaprPhbState *sphb;
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int option;
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uint64_t buid;
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@@ -741,7 +741,7 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level)
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* Here we use the number returned by pci_spapr_map_irq to find a
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* corresponding qemu_irq.
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*/
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- sPAPRPHBState *phb = opaque;
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+ SpaprPhbState *phb = opaque;
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trace_spapr_pci_lsi_set(phb->dtbusname, irq_num, phb->lsi_table[irq_num].irq);
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qemu_set_irq(spapr_phb_lsi_qirq(phb, irq_num), level);
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@@ -749,7 +749,7 @@ static void pci_spapr_set_irq(void *opaque, int irq_num, int level)
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static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin)
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{
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- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(opaque);
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+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(opaque);
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PCIINTxRoute route;
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route.mode = PCI_INTX_ENABLED;
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@@ -766,7 +766,7 @@ static PCIINTxRoute spapr_route_intx_pin_to_irq(void *opaque, int pin)
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static void spapr_msi_write(void *opaque, hwaddr addr,
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uint64_t data, unsigned size)
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{
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- sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
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+ SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
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uint32_t irq = data;
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trace_spapr_pci_msi_write(addr, data, irq);
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@@ -786,12 +786,12 @@ static const MemoryRegionOps spapr_msi_ops = {
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*/
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static AddressSpace *spapr_pci_dma_iommu(PCIBus *bus, void *opaque, int devfn)
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{
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- sPAPRPHBState *phb = opaque;
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+ SpaprPhbState *phb = opaque;
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return &phb->iommu_as;
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}
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-static char *spapr_phb_vfio_get_loc_code(sPAPRPHBState *sphb, PCIDevice *pdev)
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+static char *spapr_phb_vfio_get_loc_code(SpaprPhbState *sphb, PCIDevice *pdev)
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{
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char *path = NULL, *buf = NULL, *host = NULL;
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@@ -822,7 +822,7 @@ err_out:
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return NULL;
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}
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-static char *spapr_phb_get_loc_code(sPAPRPHBState *sphb, PCIDevice *pdev)
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+static char *spapr_phb_get_loc_code(SpaprPhbState *sphb, PCIDevice *pdev)
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{
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char *buf;
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const char *devtype = "qemu";
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@@ -1249,11 +1249,11 @@ static gchar *pci_get_node_name(PCIDevice *dev)
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}
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}
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-static uint32_t spapr_phb_get_pci_drc_index(sPAPRPHBState *phb,
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+static uint32_t spapr_phb_get_pci_drc_index(SpaprPhbState *phb,
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PCIDevice *pdev);
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static void spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
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- sPAPRPHBState *sphb)
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+ SpaprPhbState *sphb)
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{
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ResourceProps rp;
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bool is_bridge = false;
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@@ -1358,7 +1358,7 @@ static void spapr_populate_pci_child_dt(PCIDevice *dev, void *fdt, int offset,
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}
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/* create OF node for pci device and required OF DT properties */
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-static int spapr_create_pci_child_dt(sPAPRPHBState *phb, PCIDevice *dev,
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+static int spapr_create_pci_child_dt(SpaprPhbState *phb, PCIDevice *dev,
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void *fdt, int node_offset)
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{
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int offset;
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@@ -1382,7 +1382,7 @@ void spapr_phb_remove_pci_device_cb(DeviceState *dev)
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object_unparent(OBJECT(dev));
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}
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-static sPAPRDRConnector *spapr_phb_get_pci_func_drc(sPAPRPHBState *phb,
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+static SpaprDrc *spapr_phb_get_pci_func_drc(SpaprPhbState *phb,
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uint32_t busnr,
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int32_t devfn)
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{
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@@ -1390,17 +1390,17 @@ static sPAPRDRConnector *spapr_phb_get_pci_func_drc(sPAPRPHBState *phb,
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(phb->index << 16) | (busnr << 8) | devfn);
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}
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-static sPAPRDRConnector *spapr_phb_get_pci_drc(sPAPRPHBState *phb,
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+static SpaprDrc *spapr_phb_get_pci_drc(SpaprPhbState *phb,
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PCIDevice *pdev)
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{
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uint32_t busnr = pci_bus_num(PCI_BUS(qdev_get_parent_bus(DEVICE(pdev))));
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return spapr_phb_get_pci_func_drc(phb, busnr, pdev->devfn);
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}
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-static uint32_t spapr_phb_get_pci_drc_index(sPAPRPHBState *phb,
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+static uint32_t spapr_phb_get_pci_drc_index(SpaprPhbState *phb,
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PCIDevice *pdev)
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{
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- sPAPRDRConnector *drc = spapr_phb_get_pci_drc(phb, pdev);
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+ SpaprDrc *drc = spapr_phb_get_pci_drc(phb, pdev);
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if (!drc) {
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return 0;
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@@ -1409,11 +1409,11 @@ static uint32_t spapr_phb_get_pci_drc_index(sPAPRPHBState *phb,
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return spapr_drc_index(drc);
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}
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-int spapr_pci_dt_populate(sPAPRDRConnector *drc, sPAPRMachineState *spapr,
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+int spapr_pci_dt_populate(SpaprDrc *drc, SpaprMachineState *spapr,
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void *fdt, int *fdt_start_offset, Error **errp)
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{
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HotplugHandler *plug_handler = qdev_get_hotplug_handler(drc->dev);
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- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(plug_handler);
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+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(plug_handler);
|
|
|
PCIDevice *pdev = PCI_DEVICE(drc->dev);
|
|
|
|
|
|
*fdt_start_offset = spapr_create_pci_child_dt(sphb, pdev, fdt, 0);
|
|
@@ -1423,9 +1423,9 @@ int spapr_pci_dt_populate(sPAPRDRConnector *drc, sPAPRMachineState *spapr,
|
|
|
static void spapr_pci_plug(HotplugHandler *plug_handler,
|
|
|
DeviceState *plugged_dev, Error **errp)
|
|
|
{
|
|
|
- sPAPRPHBState *phb = SPAPR_PCI_HOST_BRIDGE(DEVICE(plug_handler));
|
|
|
+ SpaprPhbState *phb = SPAPR_PCI_HOST_BRIDGE(DEVICE(plug_handler));
|
|
|
PCIDevice *pdev = PCI_DEVICE(plugged_dev);
|
|
|
- sPAPRDRConnector *drc = spapr_phb_get_pci_drc(phb, pdev);
|
|
|
+ SpaprDrc *drc = spapr_phb_get_pci_drc(phb, pdev);
|
|
|
Error *local_err = NULL;
|
|
|
PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(pdev)));
|
|
|
uint32_t slotnr = PCI_SLOT(pdev->devfn);
|
|
@@ -1472,9 +1472,9 @@ static void spapr_pci_plug(HotplugHandler *plug_handler,
|
|
|
int i;
|
|
|
|
|
|
for (i = 0; i < 8; i++) {
|
|
|
- sPAPRDRConnector *func_drc;
|
|
|
- sPAPRDRConnectorClass *func_drck;
|
|
|
- sPAPRDREntitySense state;
|
|
|
+ SpaprDrc *func_drc;
|
|
|
+ SpaprDrcClass *func_drck;
|
|
|
+ SpaprDREntitySense state;
|
|
|
|
|
|
func_drc = spapr_phb_get_pci_func_drc(phb, pci_bus_num(bus),
|
|
|
PCI_DEVFN(slotnr, i));
|
|
@@ -1513,9 +1513,9 @@ static void spapr_pci_unplug(HotplugHandler *plug_handler,
|
|
|
static void spapr_pci_unplug_request(HotplugHandler *plug_handler,
|
|
|
DeviceState *plugged_dev, Error **errp)
|
|
|
{
|
|
|
- sPAPRPHBState *phb = SPAPR_PCI_HOST_BRIDGE(DEVICE(plug_handler));
|
|
|
+ SpaprPhbState *phb = SPAPR_PCI_HOST_BRIDGE(DEVICE(plug_handler));
|
|
|
PCIDevice *pdev = PCI_DEVICE(plugged_dev);
|
|
|
- sPAPRDRConnector *drc = spapr_phb_get_pci_drc(phb, pdev);
|
|
|
+ SpaprDrc *drc = spapr_phb_get_pci_drc(phb, pdev);
|
|
|
|
|
|
if (!phb->dr_enabled) {
|
|
|
error_setg(errp, QERR_BUS_NO_HOTPLUG,
|
|
@@ -1529,9 +1529,9 @@ static void spapr_pci_unplug_request(HotplugHandler *plug_handler,
|
|
|
if (!spapr_drc_unplug_requested(drc)) {
|
|
|
PCIBus *bus = PCI_BUS(qdev_get_parent_bus(DEVICE(pdev)));
|
|
|
uint32_t slotnr = PCI_SLOT(pdev->devfn);
|
|
|
- sPAPRDRConnector *func_drc;
|
|
|
- sPAPRDRConnectorClass *func_drck;
|
|
|
- sPAPRDREntitySense state;
|
|
|
+ SpaprDrc *func_drc;
|
|
|
+ SpaprDrcClass *func_drck;
|
|
|
+ SpaprDREntitySense state;
|
|
|
int i;
|
|
|
|
|
|
/* ensure any other present functions are pending unplug */
|
|
@@ -1573,7 +1573,7 @@ static void spapr_pci_unplug_request(HotplugHandler *plug_handler,
|
|
|
|
|
|
static void spapr_phb_finalizefn(Object *obj)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(obj);
|
|
|
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(obj);
|
|
|
|
|
|
g_free(sphb->dtbusname);
|
|
|
sphb->dtbusname = NULL;
|
|
@@ -1581,11 +1581,11 @@ static void spapr_phb_finalizefn(Object *obj)
|
|
|
|
|
|
static void spapr_phb_unrealize(DeviceState *dev, Error **errp)
|
|
|
{
|
|
|
- sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
|
|
|
+ SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
|
|
|
SysBusDevice *s = SYS_BUS_DEVICE(dev);
|
|
|
PCIHostState *phb = PCI_HOST_BRIDGE(s);
|
|
|
- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(phb);
|
|
|
- sPAPRTCETable *tcet;
|
|
|
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(phb);
|
|
|
+ SpaprTceTable *tcet;
|
|
|
int i;
|
|
|
const unsigned windows_supported = spapr_phb_windows_supported(sphb);
|
|
|
|
|
@@ -1608,7 +1608,7 @@ static void spapr_phb_unrealize(DeviceState *dev, Error **errp)
|
|
|
|
|
|
if (sphb->dr_enabled) {
|
|
|
for (i = PCI_SLOT_MAX * 8 - 1; i >= 0; i--) {
|
|
|
- sPAPRDRConnector *drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PCI,
|
|
|
+ SpaprDrc *drc = spapr_drc_by_id(TYPE_SPAPR_DRC_PCI,
|
|
|
(sphb->index << 16) | i);
|
|
|
|
|
|
if (drc) {
|
|
@@ -1645,18 +1645,18 @@ static void spapr_phb_realize(DeviceState *dev, Error **errp)
|
|
|
/* We don't use SPAPR_MACHINE() in order to exit gracefully if the user
|
|
|
* tries to add a sPAPR PHB to a non-pseries machine.
|
|
|
*/
|
|
|
- sPAPRMachineState *spapr =
|
|
|
- (sPAPRMachineState *) object_dynamic_cast(qdev_get_machine(),
|
|
|
+ SpaprMachineState *spapr =
|
|
|
+ (SpaprMachineState *) object_dynamic_cast(qdev_get_machine(),
|
|
|
TYPE_SPAPR_MACHINE);
|
|
|
- sPAPRMachineClass *smc = spapr ? SPAPR_MACHINE_GET_CLASS(spapr) : NULL;
|
|
|
+ SpaprMachineClass *smc = spapr ? SPAPR_MACHINE_GET_CLASS(spapr) : NULL;
|
|
|
SysBusDevice *s = SYS_BUS_DEVICE(dev);
|
|
|
- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
|
|
|
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(s);
|
|
|
PCIHostState *phb = PCI_HOST_BRIDGE(s);
|
|
|
char *namebuf;
|
|
|
int i;
|
|
|
PCIBus *bus;
|
|
|
uint64_t msi_window_size = 4096;
|
|
|
- sPAPRTCETable *tcet;
|
|
|
+ SpaprTceTable *tcet;
|
|
|
const unsigned windows_supported = spapr_phb_windows_supported(sphb);
|
|
|
|
|
|
if (!spapr) {
|
|
@@ -1855,10 +1855,10 @@ static int spapr_phb_children_reset(Object *child, void *opaque)
|
|
|
return 0;
|
|
|
}
|
|
|
|
|
|
-void spapr_phb_dma_reset(sPAPRPHBState *sphb)
|
|
|
+void spapr_phb_dma_reset(SpaprPhbState *sphb)
|
|
|
{
|
|
|
int i;
|
|
|
- sPAPRTCETable *tcet;
|
|
|
+ SpaprTceTable *tcet;
|
|
|
|
|
|
for (i = 0; i < SPAPR_PCI_DMA_MAX_WINDOWS; ++i) {
|
|
|
tcet = spapr_tce_find_by_liobn(sphb->dma_liobn[i]);
|
|
@@ -1876,7 +1876,7 @@ void spapr_phb_dma_reset(sPAPRPHBState *sphb)
|
|
|
|
|
|
static void spapr_phb_reset(DeviceState *qdev)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(qdev);
|
|
|
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(qdev);
|
|
|
|
|
|
spapr_phb_dma_reset(sphb);
|
|
|
|
|
@@ -1889,27 +1889,27 @@ static void spapr_phb_reset(DeviceState *qdev)
|
|
|
}
|
|
|
|
|
|
static Property spapr_phb_properties[] = {
|
|
|
- DEFINE_PROP_UINT32("index", sPAPRPHBState, index, -1),
|
|
|
- DEFINE_PROP_UINT64("mem_win_size", sPAPRPHBState, mem_win_size,
|
|
|
+ DEFINE_PROP_UINT32("index", SpaprPhbState, index, -1),
|
|
|
+ DEFINE_PROP_UINT64("mem_win_size", SpaprPhbState, mem_win_size,
|
|
|
SPAPR_PCI_MEM32_WIN_SIZE),
|
|
|
- DEFINE_PROP_UINT64("mem64_win_size", sPAPRPHBState, mem64_win_size,
|
|
|
+ DEFINE_PROP_UINT64("mem64_win_size", SpaprPhbState, mem64_win_size,
|
|
|
SPAPR_PCI_MEM64_WIN_SIZE),
|
|
|
- DEFINE_PROP_UINT64("io_win_size", sPAPRPHBState, io_win_size,
|
|
|
+ DEFINE_PROP_UINT64("io_win_size", SpaprPhbState, io_win_size,
|
|
|
SPAPR_PCI_IO_WIN_SIZE),
|
|
|
- DEFINE_PROP_BOOL("dynamic-reconfiguration", sPAPRPHBState, dr_enabled,
|
|
|
+ DEFINE_PROP_BOOL("dynamic-reconfiguration", SpaprPhbState, dr_enabled,
|
|
|
true),
|
|
|
/* Default DMA window is 0..1GB */
|
|
|
- DEFINE_PROP_UINT64("dma_win_addr", sPAPRPHBState, dma_win_addr, 0),
|
|
|
- DEFINE_PROP_UINT64("dma_win_size", sPAPRPHBState, dma_win_size, 0x40000000),
|
|
|
- DEFINE_PROP_UINT64("dma64_win_addr", sPAPRPHBState, dma64_win_addr,
|
|
|
+ DEFINE_PROP_UINT64("dma_win_addr", SpaprPhbState, dma_win_addr, 0),
|
|
|
+ DEFINE_PROP_UINT64("dma_win_size", SpaprPhbState, dma_win_size, 0x40000000),
|
|
|
+ DEFINE_PROP_UINT64("dma64_win_addr", SpaprPhbState, dma64_win_addr,
|
|
|
0x800000000000000ULL),
|
|
|
- DEFINE_PROP_BOOL("ddw", sPAPRPHBState, ddw_enabled, true),
|
|
|
- DEFINE_PROP_UINT64("pgsz", sPAPRPHBState, page_size_mask,
|
|
|
+ DEFINE_PROP_BOOL("ddw", SpaprPhbState, ddw_enabled, true),
|
|
|
+ DEFINE_PROP_UINT64("pgsz", SpaprPhbState, page_size_mask,
|
|
|
(1ULL << 12) | (1ULL << 16)),
|
|
|
- DEFINE_PROP_UINT32("numa_node", sPAPRPHBState, numa_node, -1),
|
|
|
- DEFINE_PROP_BOOL("pre-2.8-migration", sPAPRPHBState,
|
|
|
+ DEFINE_PROP_UINT32("numa_node", SpaprPhbState, numa_node, -1),
|
|
|
+ DEFINE_PROP_BOOL("pre-2.8-migration", SpaprPhbState,
|
|
|
pre_2_8_migration, false),
|
|
|
- DEFINE_PROP_BOOL("pcie-extended-configuration-space", sPAPRPHBState,
|
|
|
+ DEFINE_PROP_BOOL("pcie-extended-configuration-space", SpaprPhbState,
|
|
|
pcie_ecs, true),
|
|
|
DEFINE_PROP_END_OF_LIST(),
|
|
|
};
|
|
@@ -1939,7 +1939,7 @@ static const VMStateDescription vmstate_spapr_pci_msi = {
|
|
|
|
|
|
static int spapr_pci_pre_save(void *opaque)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = opaque;
|
|
|
+ SpaprPhbState *sphb = opaque;
|
|
|
GHashTableIter iter;
|
|
|
gpointer key, value;
|
|
|
int i;
|
|
@@ -1977,7 +1977,7 @@ static int spapr_pci_pre_save(void *opaque)
|
|
|
|
|
|
static int spapr_pci_post_load(void *opaque, int version_id)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = opaque;
|
|
|
+ SpaprPhbState *sphb = opaque;
|
|
|
gpointer key, value;
|
|
|
int i;
|
|
|
|
|
@@ -1997,7 +1997,7 @@ static int spapr_pci_post_load(void *opaque, int version_id)
|
|
|
|
|
|
static bool pre_2_8_migration(void *opaque, int version_id)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = opaque;
|
|
|
+ SpaprPhbState *sphb = opaque;
|
|
|
|
|
|
return sphb->pre_2_8_migration;
|
|
|
}
|
|
@@ -2009,16 +2009,16 @@ static const VMStateDescription vmstate_spapr_pci = {
|
|
|
.pre_save = spapr_pci_pre_save,
|
|
|
.post_load = spapr_pci_post_load,
|
|
|
.fields = (VMStateField[]) {
|
|
|
- VMSTATE_UINT64_EQUAL(buid, sPAPRPHBState, NULL),
|
|
|
- VMSTATE_UINT32_TEST(mig_liobn, sPAPRPHBState, pre_2_8_migration),
|
|
|
- VMSTATE_UINT64_TEST(mig_mem_win_addr, sPAPRPHBState, pre_2_8_migration),
|
|
|
- VMSTATE_UINT64_TEST(mig_mem_win_size, sPAPRPHBState, pre_2_8_migration),
|
|
|
- VMSTATE_UINT64_TEST(mig_io_win_addr, sPAPRPHBState, pre_2_8_migration),
|
|
|
- VMSTATE_UINT64_TEST(mig_io_win_size, sPAPRPHBState, pre_2_8_migration),
|
|
|
- VMSTATE_STRUCT_ARRAY(lsi_table, sPAPRPHBState, PCI_NUM_PINS, 0,
|
|
|
+ VMSTATE_UINT64_EQUAL(buid, SpaprPhbState, NULL),
|
|
|
+ VMSTATE_UINT32_TEST(mig_liobn, SpaprPhbState, pre_2_8_migration),
|
|
|
+ VMSTATE_UINT64_TEST(mig_mem_win_addr, SpaprPhbState, pre_2_8_migration),
|
|
|
+ VMSTATE_UINT64_TEST(mig_mem_win_size, SpaprPhbState, pre_2_8_migration),
|
|
|
+ VMSTATE_UINT64_TEST(mig_io_win_addr, SpaprPhbState, pre_2_8_migration),
|
|
|
+ VMSTATE_UINT64_TEST(mig_io_win_size, SpaprPhbState, pre_2_8_migration),
|
|
|
+ VMSTATE_STRUCT_ARRAY(lsi_table, SpaprPhbState, PCI_NUM_PINS, 0,
|
|
|
vmstate_spapr_pci_lsi, struct spapr_pci_lsi),
|
|
|
- VMSTATE_INT32(msi_devs_num, sPAPRPHBState),
|
|
|
- VMSTATE_STRUCT_VARRAY_ALLOC(msi_devs, sPAPRPHBState, msi_devs_num, 0,
|
|
|
+ VMSTATE_INT32(msi_devs_num, SpaprPhbState),
|
|
|
+ VMSTATE_STRUCT_VARRAY_ALLOC(msi_devs, SpaprPhbState, msi_devs_num, 0,
|
|
|
vmstate_spapr_pci_msi, spapr_pci_msi_mig),
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
},
|
|
@@ -2027,7 +2027,7 @@ static const VMStateDescription vmstate_spapr_pci = {
|
|
|
static const char *spapr_phb_root_bus_path(PCIHostState *host_bridge,
|
|
|
PCIBus *rootbus)
|
|
|
{
|
|
|
- sPAPRPHBState *sphb = SPAPR_PCI_HOST_BRIDGE(host_bridge);
|
|
|
+ SpaprPhbState *sphb = SPAPR_PCI_HOST_BRIDGE(host_bridge);
|
|
|
|
|
|
return sphb->dtbusname;
|
|
|
}
|
|
@@ -2055,7 +2055,7 @@ static void spapr_phb_class_init(ObjectClass *klass, void *data)
|
|
|
static const TypeInfo spapr_phb_info = {
|
|
|
.name = TYPE_SPAPR_PCI_HOST_BRIDGE,
|
|
|
.parent = TYPE_PCI_HOST_BRIDGE,
|
|
|
- .instance_size = sizeof(sPAPRPHBState),
|
|
|
+ .instance_size = sizeof(SpaprPhbState),
|
|
|
.instance_finalize = spapr_phb_finalizefn,
|
|
|
.class_init = spapr_phb_class_init,
|
|
|
.interfaces = (InterfaceInfo[]) {
|
|
@@ -2064,19 +2064,19 @@ static const TypeInfo spapr_phb_info = {
|
|
|
}
|
|
|
};
|
|
|
|
|
|
-typedef struct sPAPRFDT {
|
|
|
+typedef struct SpaprFdt {
|
|
|
void *fdt;
|
|
|
int node_off;
|
|
|
- sPAPRPHBState *sphb;
|
|
|
-} sPAPRFDT;
|
|
|
+ SpaprPhbState *sphb;
|
|
|
+} SpaprFdt;
|
|
|
|
|
|
static void spapr_populate_pci_devices_dt(PCIBus *bus, PCIDevice *pdev,
|
|
|
void *opaque)
|
|
|
{
|
|
|
PCIBus *sec_bus;
|
|
|
- sPAPRFDT *p = opaque;
|
|
|
+ SpaprFdt *p = opaque;
|
|
|
int offset;
|
|
|
- sPAPRFDT s_fdt;
|
|
|
+ SpaprFdt s_fdt;
|
|
|
|
|
|
offset = spapr_create_pci_child_dt(p->sphb, pdev, p->fdt, p->node_off);
|
|
|
if (!offset) {
|
|
@@ -2128,7 +2128,7 @@ static void spapr_phb_pci_enumerate_bridge(PCIBus *bus, PCIDevice *pdev,
|
|
|
pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, *bus_no, 1);
|
|
|
}
|
|
|
|
|
|
-static void spapr_phb_pci_enumerate(sPAPRPHBState *phb)
|
|
|
+static void spapr_phb_pci_enumerate(SpaprPhbState *phb)
|
|
|
{
|
|
|
PCIBus *bus = PCI_HOST_BRIDGE(phb)->bus;
|
|
|
unsigned int bus_no = 0;
|
|
@@ -2139,7 +2139,7 @@ static void spapr_phb_pci_enumerate(sPAPRPHBState *phb)
|
|
|
|
|
|
}
|
|
|
|
|
|
-int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t intc_phandle, void *fdt,
|
|
|
+int spapr_populate_pci_dt(SpaprPhbState *phb, uint32_t intc_phandle, void *fdt,
|
|
|
uint32_t nr_msis, int *node_offset)
|
|
|
{
|
|
|
int bus_off, i, j, ret;
|
|
@@ -2187,10 +2187,10 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, uint32_t intc_phandle, void *fdt,
|
|
|
cpu_to_be32(0x0),
|
|
|
cpu_to_be32(0x0),
|
|
|
cpu_to_be32(phb->numa_node)};
|
|
|
- sPAPRTCETable *tcet;
|
|
|
+ SpaprTceTable *tcet;
|
|
|
PCIBus *bus = PCI_HOST_BRIDGE(phb)->bus;
|
|
|
- sPAPRFDT s_fdt;
|
|
|
- sPAPRDRConnector *drc;
|
|
|
+ SpaprFdt s_fdt;
|
|
|
+ SpaprDrc *drc;
|
|
|
|
|
|
/* Start populating the FDT */
|
|
|
nodename = g_strdup_printf("pci@%" PRIx64, phb->buid);
|
|
@@ -2345,8 +2345,8 @@ static int spapr_switch_one_vga(DeviceState *dev, void *opaque)
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void spapr_pci_switch_vga(bool big_endian)
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{
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- sPAPRMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
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- sPAPRPHBState *sphb;
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+ SpaprMachineState *spapr = SPAPR_MACHINE(qdev_get_machine());
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+ SpaprPhbState *sphb;
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/*
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* For backward compatibility with existing guests, we switch
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