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@@ -995,7 +995,7 @@ static uint64_t ehci_port_read(void *ptr, hwaddr addr,
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uint32_t val;
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uint32_t val;
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val = s->portsc[addr >> 2];
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val = s->portsc[addr >> 2];
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- trace_usb_ehci_portsc_read(addr + PORTSC_BEGIN, addr >> 2, val);
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+ trace_usb_ehci_portsc_read(addr + s->portscbase, addr >> 2, val);
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return val;
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return val;
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}
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}
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@@ -1036,7 +1036,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
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uint32_t old = *portsc;
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uint32_t old = *portsc;
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USBDevice *dev = s->ports[port].dev;
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USBDevice *dev = s->ports[port].dev;
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- trace_usb_ehci_portsc_write(addr + PORTSC_BEGIN, addr >> 2, val);
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+ trace_usb_ehci_portsc_write(addr + s->portscbase, addr >> 2, val);
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/* Clear rwc bits */
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/* Clear rwc bits */
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*portsc &= ~(val & PORTSC_RWC_MASK);
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*portsc &= ~(val & PORTSC_RWC_MASK);
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@@ -1069,7 +1069,7 @@ static void ehci_port_write(void *ptr, hwaddr addr,
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*portsc &= ~PORTSC_RO_MASK;
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*portsc &= ~PORTSC_RO_MASK;
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*portsc |= val;
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*portsc |= val;
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- trace_usb_ehci_portsc_change(addr + PORTSC_BEGIN, addr >> 2, *portsc, old);
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+ trace_usb_ehci_portsc_change(addr + s->portscbase, addr >> 2, *portsc, old);
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}
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}
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static void ehci_opreg_write(void *ptr, hwaddr addr,
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static void ehci_opreg_write(void *ptr, hwaddr addr,
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@@ -2512,8 +2512,14 @@ void usb_ehci_realize(EHCIState *s, DeviceState *dev, Error **errp)
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{
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{
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int i;
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int i;
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+ if (s->portnr > NB_PORTS) {
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+ error_setg(errp, "Too many ports! Max. port number is %d.",
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+ NB_PORTS);
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+ return;
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+ }
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+
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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usb_bus_new(&s->bus, &ehci_bus_ops, dev);
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- for (i = 0; i < NB_PORTS; i++) {
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+ for (i = 0; i < s->portnr; i++) {
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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usb_register_port(&s->bus, &s->ports[i], s, i, &ehci_port_ops,
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USB_SPEED_MASK_HIGH);
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USB_SPEED_MASK_HIGH);
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s->ports[i].dev = 0;
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s->ports[i].dev = 0;
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@@ -2533,7 +2539,7 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
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s->caps[0x01] = 0x00;
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s->caps[0x01] = 0x00;
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s->caps[0x02] = 0x00;
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s->caps[0x02] = 0x00;
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s->caps[0x03] = 0x01; /* HC version */
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s->caps[0x03] = 0x01; /* HC version */
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- s->caps[0x04] = NB_PORTS; /* Number of downstream ports */
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+ s->caps[0x04] = s->portnr; /* Number of downstream ports */
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s->caps[0x05] = 0x00; /* No companion ports at present */
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s->caps[0x05] = 0x00; /* No companion ports at present */
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s->caps[0x06] = 0x00;
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s->caps[0x06] = 0x00;
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s->caps[0x07] = 0x00;
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s->caps[0x07] = 0x00;
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@@ -2549,13 +2555,13 @@ void usb_ehci_init(EHCIState *s, DeviceState *dev)
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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memory_region_init_io(&s->mem_caps, &ehci_mmio_caps_ops, s,
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"capabilities", CAPA_SIZE);
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"capabilities", CAPA_SIZE);
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memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
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memory_region_init_io(&s->mem_opreg, &ehci_mmio_opreg_ops, s,
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- "operational", PORTSC_BEGIN);
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+ "operational", s->portscbase);
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memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
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memory_region_init_io(&s->mem_ports, &ehci_mmio_port_ops, s,
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- "ports", PORTSC_END - PORTSC_BEGIN);
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+ "ports", 4 * s->portnr);
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memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
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memory_region_add_subregion(&s->mem, s->capsbase, &s->mem_caps);
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memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
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memory_region_add_subregion(&s->mem, s->opregbase, &s->mem_opreg);
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- memory_region_add_subregion(&s->mem, s->opregbase + PORTSC_BEGIN,
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+ memory_region_add_subregion(&s->mem, s->opregbase + s->portscbase,
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&s->mem_ports);
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&s->mem_ports);
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}
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}
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