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@@ -38,7 +38,7 @@ static int pci_unin_map_irq(PCIDevice *pci_dev, int irq_num)
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static void pci_unin_set_irq(void *opaque, int irq_num, int level)
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{
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- UNINState *s = opaque;
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+ UNINHostState *s = opaque;
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trace_unin_set_irq(unin_irq_line[irq_num], level);
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qemu_set_irq(s->irqs[irq_num], level);
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@@ -81,7 +81,7 @@ static uint32_t unin_get_config_reg(uint32_t reg, uint32_t addr)
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static void unin_data_write(void *opaque, hwaddr addr,
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uint64_t val, unsigned len)
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{
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- UNINState *s = opaque;
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+ UNINHostState *s = opaque;
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PCIHostState *phb = PCI_HOST_BRIDGE(s);
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trace_unin_data_write(addr, len, val);
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pci_data_write(phb->bus,
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@@ -92,7 +92,7 @@ static void unin_data_write(void *opaque, hwaddr addr,
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static uint64_t unin_data_read(void *opaque, hwaddr addr,
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unsigned len)
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{
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- UNINState *s = opaque;
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+ UNINHostState *s = opaque;
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PCIHostState *phb = PCI_HOST_BRIDGE(s);
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uint32_t val;
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@@ -109,7 +109,7 @@ static const MemoryRegionOps unin_data_ops = {
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.endianness = DEVICE_LITTLE_ENDIAN,
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};
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-static void pci_unin_init_irqs(UNINState *s)
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+static void pci_unin_init_irqs(UNINHostState *s)
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{
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int i;
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@@ -120,7 +120,7 @@ static void pci_unin_init_irqs(UNINState *s)
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static void pci_unin_main_realize(DeviceState *dev, Error **errp)
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{
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- UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
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+ UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(dev);
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PCIHostState *h = PCI_HOST_BRIDGE(dev);
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h->bus = pci_register_root_bus(dev, NULL,
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@@ -142,7 +142,7 @@ static void pci_unin_main_realize(DeviceState *dev, Error **errp)
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static void pci_unin_main_init(Object *obj)
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{
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- UNINState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
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+ UNINHostState *s = UNI_NORTH_PCI_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@@ -175,7 +175,7 @@ static void pci_unin_main_init(Object *obj)
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static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
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{
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- UNINState *s = U3_AGP_HOST_BRIDGE(dev);
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+ UNINHostState *s = U3_AGP_HOST_BRIDGE(dev);
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PCIHostState *h = PCI_HOST_BRIDGE(dev);
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h->bus = pci_register_root_bus(dev, NULL,
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@@ -191,7 +191,7 @@ static void pci_u3_agp_realize(DeviceState *dev, Error **errp)
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static void pci_u3_agp_init(Object *obj)
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{
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- UNINState *s = U3_AGP_HOST_BRIDGE(obj);
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+ UNINHostState *s = U3_AGP_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@@ -223,7 +223,7 @@ static void pci_u3_agp_init(Object *obj)
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static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
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{
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- UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
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+ UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(dev);
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PCIHostState *h = PCI_HOST_BRIDGE(dev);
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h->bus = pci_register_root_bus(dev, NULL,
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@@ -239,7 +239,7 @@ static void pci_unin_agp_realize(DeviceState *dev, Error **errp)
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static void pci_unin_agp_init(Object *obj)
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{
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- UNINState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
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+ UNINHostState *s = UNI_NORTH_AGP_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@@ -260,7 +260,7 @@ static void pci_unin_agp_init(Object *obj)
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static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
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{
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- UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
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+ UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(dev);
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PCIHostState *h = PCI_HOST_BRIDGE(dev);
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h->bus = pci_register_root_bus(dev, NULL,
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@@ -276,7 +276,7 @@ static void pci_unin_internal_realize(DeviceState *dev, Error **errp)
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static void pci_unin_internal_init(Object *obj)
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{
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- UNINState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
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+ UNINHostState *s = UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE(obj);
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SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
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PCIHostState *h = PCI_HOST_BRIDGE(obj);
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@@ -466,7 +466,7 @@ static void pci_unin_main_class_init(ObjectClass *klass, void *data)
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static const TypeInfo pci_unin_main_info = {
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.name = TYPE_UNI_NORTH_PCI_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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- .instance_size = sizeof(UNINState),
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+ .instance_size = sizeof(UNINHostState),
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.instance_init = pci_unin_main_init,
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.class_init = pci_unin_main_class_init,
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};
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@@ -482,7 +482,7 @@ static void pci_u3_agp_class_init(ObjectClass *klass, void *data)
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static const TypeInfo pci_u3_agp_info = {
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.name = TYPE_U3_AGP_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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- .instance_size = sizeof(UNINState),
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+ .instance_size = sizeof(UNINHostState),
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.instance_init = pci_u3_agp_init,
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.class_init = pci_u3_agp_class_init,
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};
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@@ -498,7 +498,7 @@ static void pci_unin_agp_class_init(ObjectClass *klass, void *data)
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static const TypeInfo pci_unin_agp_info = {
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.name = TYPE_UNI_NORTH_AGP_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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- .instance_size = sizeof(UNINState),
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+ .instance_size = sizeof(UNINHostState),
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.instance_init = pci_unin_agp_init,
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.class_init = pci_unin_agp_class_init,
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};
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@@ -514,7 +514,7 @@ static void pci_unin_internal_class_init(ObjectClass *klass, void *data)
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static const TypeInfo pci_unin_internal_info = {
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.name = TYPE_UNI_NORTH_INTERNAL_PCI_HOST_BRIDGE,
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.parent = TYPE_PCI_HOST_BRIDGE,
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- .instance_size = sizeof(UNINState),
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+ .instance_size = sizeof(UNINHostState),
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.instance_init = pci_unin_internal_init,
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.class_init = pci_unin_internal_class_init,
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};
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