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@@ -13,6 +13,7 @@
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#include "boards.h"
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#include "loader.h"
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#include "elf.h"
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+#include "exec-memory.h"
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#define SYS_FREQ 66000000
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@@ -27,6 +28,7 @@
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#define PCSR_PRE_MASK 0x0f00
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typedef struct {
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+ MemoryRegion iomem;
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qemu_irq irq;
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ptimer_state *timer;
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uint16_t pcsr;
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@@ -43,7 +45,7 @@ static void m5208_timer_update(m5208_timer_state *s)
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}
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static void m5208_timer_write(void *opaque, target_phys_addr_t offset,
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- uint32_t value)
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+ uint64_t value, unsigned size)
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{
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m5208_timer_state *s = (m5208_timer_state *)opaque;
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int prescale;
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@@ -104,7 +106,8 @@ static void m5208_timer_trigger(void *opaque)
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m5208_timer_update(s);
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}
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-static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr)
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+static uint64_t m5208_timer_read(void *opaque, target_phys_addr_t addr,
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+ unsigned size)
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{
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m5208_timer_state *s = (m5208_timer_state *)opaque;
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switch (addr) {
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@@ -120,19 +123,14 @@ static uint32_t m5208_timer_read(void *opaque, target_phys_addr_t addr)
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}
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}
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-static CPUReadMemoryFunc * const m5208_timer_readfn[] = {
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- m5208_timer_read,
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- m5208_timer_read,
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- m5208_timer_read
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+static const MemoryRegionOps m5208_timer_ops = {
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+ .read = m5208_timer_read,
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+ .write = m5208_timer_write,
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+ .endianness = DEVICE_NATIVE_ENDIAN,
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};
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-static CPUWriteMemoryFunc * const m5208_timer_writefn[] = {
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- m5208_timer_write,
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- m5208_timer_write,
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- m5208_timer_write
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-};
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-
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-static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr)
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+static uint64_t m5208_sys_read(void *opaque, target_phys_addr_t addr,
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+ unsigned size)
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{
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switch (addr) {
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case 0x110: /* SDCS0 */
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@@ -154,45 +152,36 @@ static uint32_t m5208_sys_read(void *opaque, target_phys_addr_t addr)
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}
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static void m5208_sys_write(void *opaque, target_phys_addr_t addr,
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- uint32_t value)
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+ uint64_t value, unsigned size)
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{
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hw_error("m5208_sys_write: Bad offset 0x%x\n", (int)addr);
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}
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-static CPUReadMemoryFunc * const m5208_sys_readfn[] = {
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- m5208_sys_read,
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- m5208_sys_read,
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- m5208_sys_read
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-};
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-
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-static CPUWriteMemoryFunc * const m5208_sys_writefn[] = {
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- m5208_sys_write,
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- m5208_sys_write,
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- m5208_sys_write
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+static const MemoryRegionOps m5208_sys_ops = {
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+ .read = m5208_sys_read,
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+ .write = m5208_sys_write,
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+ .endianness = DEVICE_NATIVE_ENDIAN,
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};
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-static void mcf5208_sys_init(qemu_irq *pic)
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+static void mcf5208_sys_init(MemoryRegion *address_space, qemu_irq *pic)
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{
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- int iomemtype;
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+ MemoryRegion *iomem = g_new(MemoryRegion, 1);
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m5208_timer_state *s;
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QEMUBH *bh;
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int i;
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- iomemtype = cpu_register_io_memory(m5208_sys_readfn,
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- m5208_sys_writefn, NULL,
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- DEVICE_NATIVE_ENDIAN);
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/* SDRAMC. */
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- cpu_register_physical_memory(0xfc0a8000, 0x00004000, iomemtype);
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+ memory_region_init_io(iomem, &m5208_sys_ops, NULL, "m5208-sys", 0x00004000);
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+ memory_region_add_subregion(address_space, 0xfc0a8000, iomem);
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/* Timers. */
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for (i = 0; i < 2; i++) {
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s = (m5208_timer_state *)g_malloc0(sizeof(m5208_timer_state));
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bh = qemu_bh_new(m5208_timer_trigger, s);
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s->timer = ptimer_init(bh);
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- iomemtype = cpu_register_io_memory(m5208_timer_readfn,
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- m5208_timer_writefn, s,
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- DEVICE_NATIVE_ENDIAN);
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- cpu_register_physical_memory(0xfc080000 + 0x4000 * i, 0x00004000,
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- iomemtype);
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+ memory_region_init_io(&s->iomem, &m5208_timer_ops, s,
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+ "m5208-timer", 0x00004000);
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+ memory_region_add_subregion(address_space, 0xfc080000 + 0x4000 * i,
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+ &s->iomem);
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s->irq = pic[4 + i];
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}
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}
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@@ -207,6 +196,9 @@ static void mcf5208evb_init(ram_addr_t ram_size,
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uint64_t elf_entry;
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target_phys_addr_t entry;
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qemu_irq *pic;
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+ MemoryRegion *address_space_mem = get_system_memory();
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+ MemoryRegion *ram = g_new(MemoryRegion, 1);
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+ MemoryRegion *sram = g_new(MemoryRegion, 1);
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if (!cpu_model)
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cpu_model = "m5208";
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@@ -221,12 +213,12 @@ static void mcf5208evb_init(ram_addr_t ram_size,
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/* TODO: Configure BARs. */
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/* DRAM at 0x40000000 */
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- cpu_register_physical_memory(0x40000000, ram_size,
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- qemu_ram_alloc(NULL, "mcf5208.ram", ram_size) | IO_MEM_RAM);
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+ memory_region_init_ram(ram, NULL, "mcf5208.ram", ram_size);
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+ memory_region_add_subregion(address_space_mem, 0x40000000, ram);
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/* Internal SRAM. */
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- cpu_register_physical_memory(0x80000000, 16384,
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- qemu_ram_alloc(NULL, "mcf5208.sram", 16384) | IO_MEM_RAM);
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+ memory_region_init_ram(sram, NULL, "mcf5208.sram", 16384);
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+ memory_region_add_subregion(address_space_mem, 0x80000000, sram);
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/* Internal peripherals. */
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pic = mcf_intc_init(0xfc048000, env);
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@@ -235,7 +227,7 @@ static void mcf5208evb_init(ram_addr_t ram_size,
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mcf_uart_mm_init(0xfc064000, pic[27], serial_hds[1]);
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mcf_uart_mm_init(0xfc068000, pic[28], serial_hds[2]);
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- mcf5208_sys_init(pic);
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+ mcf5208_sys_init(address_space_mem, pic);
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if (nb_nics > 1) {
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fprintf(stderr, "Too many NICs\n");
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