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@@ -94,11 +94,11 @@ static void ppc_heathrow_init(MachineState *machine)
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PCIBus *pci_bus;
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PCIBus *pci_bus;
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PCIDevice *macio;
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PCIDevice *macio;
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MACIOIDEState *macio_ide;
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MACIOIDEState *macio_ide;
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- DeviceState *dev;
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+ DeviceState *dev, *pic_dev;
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+ SysBusDevice *sbd;
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BusState *adb_bus;
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BusState *adb_bus;
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int bios_size, ndrv_size;
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int bios_size, ndrv_size;
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uint8_t *ndrv_file;
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uint8_t *ndrv_file;
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- MemoryRegion *pic_mem;
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uint16_t ppc_boot_device;
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uint16_t ppc_boot_device;
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
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void *fw_cfg;
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void *fw_cfg;
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@@ -257,7 +257,7 @@ static void ppc_heathrow_init(MachineState *machine)
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error_report("Only 6xx bus is supported on heathrow machine");
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error_report("Only 6xx bus is supported on heathrow machine");
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exit(1);
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exit(1);
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}
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}
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- pic = heathrow_pic_init(&pic_mem, 1, heathrow_irqs);
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+ pic_dev = heathrow_pic_init(1, heathrow_irqs, &pic);
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pci_bus = pci_grackle_init(0xfec00000, pic,
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pci_bus = pci_grackle_init(0xfec00000, pic,
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get_system_memory(),
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get_system_memory(),
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get_system_io());
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get_system_io());
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@@ -280,7 +280,8 @@ static void ppc_heathrow_init(MachineState *machine)
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qdev_connect_gpio_out(dev, 5, pic[0x0E]); /* IDE-1 */
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qdev_connect_gpio_out(dev, 5, pic[0x0E]); /* IDE-1 */
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qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE-1 DMA */
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qdev_connect_gpio_out(dev, 6, pic[0x03]); /* IDE-1 DMA */
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qdev_prop_set_uint64(dev, "frequency", tbfreq);
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qdev_prop_set_uint64(dev, "frequency", tbfreq);
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- macio_init(macio, pic_mem);
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+ sbd = SYS_BUS_DEVICE(pic_dev);
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+ macio_init(macio, sysbus_mmio_get_region(sbd, 0));
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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macio_ide = MACIO_IDE(object_resolve_path_component(OBJECT(macio),
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"ide[0]"));
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"ide[0]"));
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