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@@ -6,6 +6,7 @@
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#include "hw/ppc/spapr.h"
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#include "hw/ppc/spapr_cpu_core.h"
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#include "hw/ppc/spapr_nested.h"
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+#include "mmu-book3s-v3.h"
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void spapr_nested_reset(SpaprMachineState *spapr)
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{
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@@ -16,6 +17,35 @@ void spapr_nested_reset(SpaprMachineState *spapr)
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}
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#ifdef CONFIG_TCG
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+
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+bool spapr_get_pate_nested_hv(SpaprMachineState *spapr, PowerPCCPU *cpu,
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+ target_ulong lpid, ppc_v3_pate_t *entry)
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+{
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+ uint64_t patb, pats;
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+
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+ assert(lpid != 0);
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+
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+ patb = spapr->nested_ptcr & PTCR_PATB;
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+ pats = spapr->nested_ptcr & PTCR_PATS;
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+
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+ /* Check if partition table is properly aligned */
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+ if (patb & MAKE_64BIT_MASK(0, pats + 12)) {
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+ return false;
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+ }
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+
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+ /* Calculate number of entries */
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+ pats = 1ull << (pats + 12 - 4);
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+ if (pats <= lpid) {
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+ return false;
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+ }
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+
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+ /* Grab entry */
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+ patb += 16 * lpid;
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+ entry->dw0 = ldq_phys(CPU(cpu)->as, patb);
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+ entry->dw1 = ldq_phys(CPU(cpu)->as, patb + 8);
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+ return true;
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+}
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+
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#define PRTS_MASK 0x1f
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static target_ulong h_set_ptbl(PowerPCCPU *cpu,
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@@ -413,4 +443,10 @@ void spapr_unregister_nested_hv(void)
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{
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/* DO NOTHING */
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}
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+
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+bool spapr_get_pate_nested_hv(SpaprMachineState *spapr, PowerPCCPU *cpu,
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+ target_ulong lpid, ppc_v3_pate_t *entry)
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+{
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+ return false;
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+}
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#endif
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