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@@ -87,6 +87,12 @@ DeviceState *pl011_create(hwaddr addr, qemu_irq irq, Chardev *chr)
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#define CR_DTR (1 << 10)
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#define CR_DTR (1 << 10)
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#define CR_LBE (1 << 7)
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#define CR_LBE (1 << 7)
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+/* Integer Baud Rate Divider, UARTIBRD */
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+#define IBRD_MASK 0x3f
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+
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+/* Fractional Baud Rate Divider, UARTFBRD */
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+#define FBRD_MASK 0xffff
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+
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static const unsigned char pl011_id_arm[8] =
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static const unsigned char pl011_id_arm[8] =
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{ 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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{ 0x11, 0x10, 0x14, 0x00, 0x0d, 0xf0, 0x05, 0xb1 };
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static const unsigned char pl011_id_luminary[8] =
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static const unsigned char pl011_id_luminary[8] =
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@@ -374,11 +380,11 @@ static void pl011_write(void *opaque, hwaddr offset,
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s->ilpr = value;
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s->ilpr = value;
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break;
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break;
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case 9: /* UARTIBRD */
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case 9: /* UARTIBRD */
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- s->ibrd = value;
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+ s->ibrd = value & IBRD_MASK;
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pl011_trace_baudrate_change(s);
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pl011_trace_baudrate_change(s);
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break;
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break;
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case 10: /* UARTFBRD */
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case 10: /* UARTFBRD */
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- s->fbrd = value;
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+ s->fbrd = value & FBRD_MASK;
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pl011_trace_baudrate_change(s);
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pl011_trace_baudrate_change(s);
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break;
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break;
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case 11: /* UARTLCR_H */
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case 11: /* UARTLCR_H */
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@@ -531,6 +537,9 @@ static int pl011_post_load(void *opaque, int version_id)
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s->read_pos = 0;
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s->read_pos = 0;
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}
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}
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+ s->ibrd &= IBRD_MASK;
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+ s->fbrd &= FBRD_MASK;
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+
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return 0;
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return 0;
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}
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}
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