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@@ -34,6 +34,26 @@
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#define BASE_TO_IRQ(base) ((base >> 12) & 0x1F)
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+static uint64_t clock_read(void *opaque, hwaddr addr, unsigned int size)
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+{
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+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " [%u]\n",
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+ __func__, addr, size);
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+ return 1;
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+}
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+
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+static void clock_write(void *opaque, hwaddr addr, uint64_t data,
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+ unsigned int size)
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+{
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+ qemu_log_mask(LOG_UNIMP, "%s: 0x%" HWADDR_PRIx " <- 0x%" PRIx64 " [%u]\n",
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+ __func__, addr, data, size);
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+}
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+
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+static const MemoryRegionOps clock_ops = {
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+ .read = clock_read,
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+ .write = clock_write
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+};
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+
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+
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static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
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{
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NRF51State *s = NRF51_SOC(dev_soc);
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@@ -130,6 +150,12 @@ static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp)
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BASE_TO_IRQ(base_addr)));
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}
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+ /* STUB Peripherals */
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+ memory_region_init_io(&s->clock, NULL, &clock_ops, NULL,
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+ "nrf51_soc.clock", 0x1000);
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+ memory_region_add_subregion_overlap(&s->container,
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+ NRF51_IOMEM_BASE, &s->clock, -1);
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+
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create_unimplemented_device("nrf51_soc.io", NRF51_IOMEM_BASE,
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NRF51_IOMEM_SIZE);
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create_unimplemented_device("nrf51_soc.ficr", NRF51_FICR_BASE,
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