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@@ -144,11 +144,7 @@ static int vfp_gdb_get_reg(CPUARMState *env, GByteArray *buf, int reg)
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}
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switch (reg - nregs) {
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case 0:
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- return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPSID]);
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- case 1:
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return gdb_get_reg32(buf, vfp_get_fpscr(env));
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- case 2:
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- return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPEXC]);
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}
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return 0;
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}
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@@ -173,12 +169,30 @@ static int vfp_gdb_set_reg(CPUARMState *env, uint8_t *buf, int reg)
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}
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switch (reg - nregs) {
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case 0:
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- env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf);
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+ vfp_set_fpscr(env, ldl_p(buf));
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return 4;
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+ }
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+ return 0;
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+}
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+
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+static int vfp_gdb_get_sysreg(CPUARMState *env, GByteArray *buf, int reg)
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+{
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+ switch (reg) {
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+ case 0:
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+ return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPSID]);
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case 1:
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- vfp_set_fpscr(env, ldl_p(buf));
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+ return gdb_get_reg32(buf, env->vfp.xregs[ARM_VFP_FPEXC]);
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+ }
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+ return 0;
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+}
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+
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+static int vfp_gdb_set_sysreg(CPUARMState *env, uint8_t *buf, int reg)
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+{
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+ switch (reg) {
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+ case 0:
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+ env->vfp.xregs[ARM_VFP_FPSID] = ldl_p(buf);
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return 4;
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- case 2:
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+ case 1:
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env->vfp.xregs[ARM_VFP_FPEXC] = ldl_p(buf) & (1 << 30);
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return 4;
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}
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@@ -434,15 +448,25 @@ void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu)
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34, "aarch64-fpu.xml", 0);
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}
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#endif
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- } else if (arm_feature(env, ARM_FEATURE_NEON)) {
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- gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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- 51, "arm-neon.xml", 0);
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- } else if (cpu_isar_feature(aa32_simd_r32, cpu)) {
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- gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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- 35, "arm-vfp3.xml", 0);
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- } else if (cpu_isar_feature(aa32_vfp_simd, cpu)) {
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- gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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- 19, "arm-vfp.xml", 0);
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+ } else {
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+ if (arm_feature(env, ARM_FEATURE_NEON)) {
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+ gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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+ 49, "arm-neon.xml", 0);
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+ } else if (cpu_isar_feature(aa32_simd_r32, cpu)) {
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+ gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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+ 33, "arm-vfp3.xml", 0);
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+ } else if (cpu_isar_feature(aa32_vfp_simd, cpu)) {
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+ gdb_register_coprocessor(cs, vfp_gdb_get_reg, vfp_gdb_set_reg,
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+ 17, "arm-vfp.xml", 0);
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+ }
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+ if (!arm_feature(env, ARM_FEATURE_M)) {
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+ /*
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+ * A and R profile have FP sysregs FPEXC and FPSID that we
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+ * expose to gdb.
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+ */
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+ gdb_register_coprocessor(cs, vfp_gdb_get_sysreg, vfp_gdb_set_sysreg,
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+ 2, "arm-vfp-sysregs.xml", 0);
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+ }
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}
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gdb_register_coprocessor(cs, arm_gdb_get_sysreg, arm_gdb_set_sysreg,
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arm_gen_dynamic_sysreg_xml(cs, cs->gdb_num_regs),
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