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@@ -15,7 +15,6 @@
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#include "ssi.h"
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#include "qemu-char.h"
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#include "blockdev.h"
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-#include "exec-memory.h"
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static struct {
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target_phys_addr_t io_base;
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@@ -2060,7 +2059,8 @@ static void pxa2xx_reset(void *opaque, int line, int level)
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}
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/* Initialise a PXA270 integrated chip (ARM based core). */
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-PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
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+PXA2xxState *pxa270_init(MemoryRegion *address_space,
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+ unsigned int sdram_size, const char *revision)
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{
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PXA2xxState *s;
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int iomemtype, i;
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@@ -2116,7 +2116,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
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for (i = 0; pxa270_serial[i].io_base; i++) {
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if (serial_hds[i]) {
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- serial_mm_init(get_system_memory(), pxa270_serial[i].io_base, 2,
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+ serial_mm_init(address_space, pxa270_serial[i].io_base, 2,
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qdev_get_gpio_in(s->pic, pxa270_serial[i].irqn),
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14857000 / 16, serial_hds[i],
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DEVICE_NATIVE_ENDIAN);
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@@ -2199,7 +2199,7 @@ PXA2xxState *pxa270_init(unsigned int sdram_size, const char *revision)
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}
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/* Initialise a PXA255 integrated chip (ARM based core). */
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-PXA2xxState *pxa255_init(unsigned int sdram_size)
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+PXA2xxState *pxa255_init(MemoryRegion *address_space, unsigned int sdram_size)
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{
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PXA2xxState *s;
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int iomemtype, i;
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@@ -2248,7 +2248,7 @@ PXA2xxState *pxa255_init(unsigned int sdram_size)
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for (i = 0; pxa255_serial[i].io_base; i++) {
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if (serial_hds[i]) {
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- serial_mm_init(get_system_memory(), pxa255_serial[i].io_base, 2,
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+ serial_mm_init(address_space, pxa255_serial[i].io_base, 2,
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qdev_get_gpio_in(s->pic, pxa255_serial[i].irqn),
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14745600 / 16, serial_hds[i],
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DEVICE_NATIVE_ENDIAN);
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