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@@ -57,19 +57,6 @@
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#define VIA_TIMER_FREQ (4700000 / 6)
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-static void via_update_irq(PMUState *s)
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-{
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- MOS6522PMUState *mps = MOS6522_PMU(&s->mos6522_pmu);
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- MOS6522State *ms = MOS6522(mps);
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-
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- bool new_state = !!(ms->ifr & ms->ier & (SR_INT | T1_INT | T2_INT));
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-
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- if (new_state != s->via_irq_state) {
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- s->via_irq_state = new_state;
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- qemu_set_irq(s->via_irq, new_state);
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- }
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-}
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-
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static void via_set_sr_int(void *opaque)
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{
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PMUState *s = opaque;
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@@ -808,28 +795,9 @@ static void mos6522_pmu_portB_write(MOS6522State *s)
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MOS6522PMUState *mps = container_of(s, MOS6522PMUState, parent_obj);
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PMUState *ps = container_of(mps, PMUState, mos6522_pmu);
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- if ((s->pcr & 0xe0) == 0x20 || (s->pcr & 0xe0) == 0x60) {
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- s->ifr &= ~CB2_INT;
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- }
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- s->ifr &= ~CB1_INT;
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-
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- via_update_irq(ps);
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pmu_update(ps);
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}
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-static void mos6522_pmu_portA_write(MOS6522State *s)
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-{
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- MOS6522PMUState *mps = container_of(s, MOS6522PMUState, parent_obj);
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- PMUState *ps = container_of(mps, PMUState, mos6522_pmu);
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-
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- if ((s->pcr & 0x0e) == 0x02 || (s->pcr & 0x0e) == 0x06) {
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- s->ifr &= ~CA2_INT;
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- }
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- s->ifr &= ~CA1_INT;
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-
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- via_update_irq(ps);
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-}
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-
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static void mos6522_pmu_reset(DeviceState *dev)
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{
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MOS6522State *ms = MOS6522(dev);
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@@ -853,7 +821,6 @@ static void mos6522_pmu_class_init(ObjectClass *oc, void *data)
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device_class_set_parent_reset(dc, mos6522_pmu_reset,
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&mdc->parent_reset);
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mdc->portB_write = mos6522_pmu_portB_write;
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- mdc->portA_write = mos6522_pmu_portA_write;
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}
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static const TypeInfo mos6522_pmu_type_info = {
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