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+Arm Musca boards (``musca-a``, ``musca-b1``)
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+============================================
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+
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+The Arm Musca development boards are a reference implementation
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+of a system using the SSE-200 Subsystem for Embedded. They are
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+dual Cortex-M33 systems.
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+
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+QEMU provides models of the A and B1 variants of this board.
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+
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+Unimplemented devices:
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+
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+- SPI
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+- |I2C|
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+- |I2S|
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+- PWM
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+- QSPI
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+- Timer
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+- SCC
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+- GPIO
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+- eFlash
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+- MHU
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+- PVT
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+- SDIO
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+- CryptoCell
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+
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+Note that (like the real hardware) the Musca-A machine is
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+asymmetric: CPU 0 does not have the FPU or DSP extensions,
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+but CPU 1 does. Also like the real hardware, the memory maps
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+for the A and B1 variants differ significantly, so guest
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+software must be built for the right variant.
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+
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