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@@ -235,8 +235,16 @@ static void uart_parameters_setup(CadenceUARTState *s)
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static int uart_can_receive(void *opaque)
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static int uart_can_receive(void *opaque)
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{
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{
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CadenceUARTState *s = opaque;
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CadenceUARTState *s = opaque;
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- int ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
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- uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
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+ int ret;
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+ uint32_t ch_mode;
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+
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+ /* ignore characters when unclocked or in reset */
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+ if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
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+ return 0;
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+ }
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+
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+ ret = MAX(CADENCE_UART_RX_FIFO_SIZE, CADENCE_UART_TX_FIFO_SIZE);
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+ ch_mode = s->r[R_MR] & UART_MR_CHMODE;
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if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
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if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
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ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
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ret = MIN(ret, CADENCE_UART_RX_FIFO_SIZE - s->rx_count);
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@@ -358,11 +366,6 @@ static void uart_receive(void *opaque, const uint8_t *buf, int size)
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CadenceUARTState *s = opaque;
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CadenceUARTState *s = opaque;
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uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
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uint32_t ch_mode = s->r[R_MR] & UART_MR_CHMODE;
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- /* ignore characters when unclocked or in reset */
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- if (!clock_is_enabled(s->refclk) || device_is_in_reset(DEVICE(s))) {
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- return;
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- }
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-
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if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
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if (ch_mode == NORMAL_MODE || ch_mode == ECHO_MODE) {
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uart_write_rx_fifo(opaque, buf, size);
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uart_write_rx_fifo(opaque, buf, size);
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}
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}
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