global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)

These are references to 'loglevel' that aren't on a simple 'if (loglevel &
X) qemu_log()' statement.

Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>



git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6340 c046a42c-6fe2-441c-8c8c-71466251a162

cpu-exec.c

@@ -532,7 +532,7 @@ int cpu_exec(CPUState *env1)
                     }
                 }
 #ifdef DEBUG_EXEC
-                if ((loglevel & CPU_LOG_TB_CPU)) {
+                if (qemu_loglevel_mask(CPU_LOG_TB_CPU)) {
                     /* restore flags in standard format */
                     regs_to_env();
 #if defined(TARGET_I386)

hw/ppc_prep.c

@@ -52,7 +52,7 @@
 #if defined (HARD_DEBUG_PPC_IO)
 #define PPC_IO_DPRINTF(fmt, args...)                     \
 do {                                                     \
-    if (loglevel & CPU_LOG_IOPORT) {                     \
+    if (qemu_loglevel_mask(CPU_LOG_IOPORT)) {            \
         qemu_log("%s: " fmt, __func__ , ##args); \
     } else {                                             \
         printf("%s : " fmt, __func__ , ##args);          \

target-alpha/translate.c

@@ -2442,7 +2442,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
     }
 #if defined ALPHA_DEBUG_DISAS
     log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
         log_target_disas(pc_start, ctx.pc - pc_start, 1);
         qemu_log("\n");

target-arm/translate.c

@@ -8870,7 +8870,7 @@ done_generating:
     *gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         qemu_log("----------------\n");
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
         log_target_disas(pc_start, dc->pc - pc_start, env->thumb);

target-cris/translate.c

@@ -3035,7 +3035,7 @@ cris_decoder(DisasContext *dc)
 	unsigned int insn_len = 2;
 	int i;
 
-	if (unlikely(loglevel & CPU_LOG_TB_OP))
+	if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
 		tcg_gen_debug_insn_start(dc->pc);
 
 	/* Load a halfword onto the instruction register.  */
@@ -3179,7 +3179,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
 
 	dc->cpustate_changed = 0;
 
-	if (loglevel & CPU_LOG_TB_IN_ASM) {
+	if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
 		qemu_log(
 			"srch=%d pc=%x %x flg=%llx bt=%x ds=%u ccs=%x\n"
 			"pid=%x usp=%x\n"
@@ -3331,7 +3331,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
 
 #ifdef DEBUG_DISAS
 #if !DISAS_CRIS
-	if (loglevel & CPU_LOG_TB_IN_ASM) {
+	if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
 		log_target_disas(pc_start, dc->pc - pc_start, 0);
 		qemu_log("\nisize=%d osize=%zd\n",
 			dc->pc - pc_start, gen_opc_ptr - gen_opc_buf);

target-i386/op_helper.c

@@ -1206,7 +1206,7 @@ void do_interrupt_user(int intno, int is_int, int error_code,
 void do_interrupt(int intno, int is_int, int error_code,
                   target_ulong next_eip, int is_hw)
 {
-    if (loglevel & CPU_LOG_INT) {
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
         if ((env->cr[0] & CR0_PE_MASK)) {
             static int count;
             qemu_log("%6d: v=%02x e=%04x i=%d cpl=%d IP=%04x:" TARGET_FMT_lx " pc=" TARGET_FMT_lx " SP=%04x:" TARGET_FMT_lx,

target-i386/translate.c

@@ -3961,7 +3961,7 @@ static target_ulong disas_insn(DisasContext *s, target_ulong pc_start)
     target_ulong next_eip, tval;
     int rex_w, rex_r;
 
-    if (unlikely(loglevel & CPU_LOG_TB_OP))
+    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
         tcg_gen_debug_insn_start(pc_start);
     s->pc = pc_start;
     prefixes = 0;
@@ -7676,7 +7676,7 @@ static inline void gen_intermediate_code_internal(CPUState *env,
 
 #ifdef DEBUG_DISAS
     log_cpu_state_mask(CPU_LOG_TB_CPU, env, X86_DUMP_CCOP);
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         int disas_flags;
         qemu_log("----------------\n");
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
@@ -7712,7 +7712,7 @@ void gen_pc_load(CPUState *env, TranslationBlock *tb,
 {
     int cc_op;
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_OP) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_OP)) {
         int i;
         qemu_log("RESTORE:\n");
         for(i = 0;i <= pc_pos; i++) {

target-m68k/translate.c

@@ -3063,7 +3063,7 @@ gen_intermediate_code_internal(CPUState *env, TranslationBlock *tb,
     *gen_opc_ptr = INDEX_op_end;
 
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         qemu_log("----------------\n");
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
         log_target_disas(pc_start, dc->pc - pc_start, 0);

target-mips/op_helper.c

@@ -1194,7 +1194,7 @@ void do_mtc0_status (target_ulong t0)
     old = env->CP0_Status;
     env->CP0_Status = (env->CP0_Status & ~mask) | val;
     compute_hflags(env);
-    if (loglevel & CPU_LOG_EXEC)
+    if (qemu_loglevel_mask(CPU_LOG_EXEC))
         do_mtc0_status_debug(old, val);
     cpu_mips_update_irq(env);
 }
@@ -1705,7 +1705,7 @@ target_ulong do_ei (void)
 
 static void debug_pre_eret (void)
 {
-    if (loglevel & CPU_LOG_EXEC) {
+    if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
         qemu_log("ERET: PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
                 env->active_tc.PC, env->CP0_EPC);
         if (env->CP0_Status & (1 << CP0St_ERL))
@@ -1718,7 +1718,7 @@ static void debug_pre_eret (void)
 
 static void debug_post_eret (void)
 {
-    if (loglevel & CPU_LOG_EXEC) {
+    if (qemu_loglevel_mask(CPU_LOG_EXEC)) {
         qemu_log("  =>  PC " TARGET_FMT_lx " EPC " TARGET_FMT_lx,
                 env->active_tc.PC, env->CP0_EPC);
         if (env->CP0_Status & (1 << CP0St_ERL))

target-mips/translate.c

@@ -8289,7 +8289,7 @@ done_generating:
     }
 #ifdef DEBUG_DISAS
     LOG_DISAS("\n");
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
         log_target_disas(pc_start, ctx.pc - pc_start, 0);
         qemu_log("\n");

target-ppc/translate.c

@@ -8334,7 +8334,7 @@ static always_inline void gen_intermediate_code_internal (CPUState *env,
 #if defined(DEBUG_DISAS)
     qemu_log_mask(CPU_LOG_TB_CPU, "---------------- excp: %04x\n", ctx.exception);
     log_cpu_state_mask(CPU_LOG_TB_CPU, env, 0);
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         int flags;
         flags = env->bfd_mach;
         flags |= ctx.le_mode << 16;

target-sh4/helper.c

@@ -105,7 +105,7 @@ void do_interrupt(CPUState * env)
 	}
     }
 
-    if (loglevel & CPU_LOG_INT) {
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
 	const char *expname;
 	switch (env->exception_index) {
 	case 0x0e0:

target-sh4/translate.c

@@ -1937,7 +1937,7 @@ gen_intermediate_code_internal(CPUState * env, TranslationBlock * tb,
 #ifdef SH4_DEBUG_DISAS
     qemu_log_mask(CPU_LOG_TB_IN_ASM, "\n");
 #endif
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
 	qemu_log("IN:\n");	/* , lookup_symbol(pc_start)); */
 	log_target_disas(pc_start, ctx.pc - pc_start, 0);
 	qemu_log("\n");

target-sparc/op_helper.c

@@ -2811,7 +2811,7 @@ void do_interrupt(CPUState *env)
     int intno = env->exception_index;
 
 #ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_INT) {
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
         static int count;
         const char *name;
 
@@ -2942,7 +2942,7 @@ void do_interrupt(CPUState *env)
     int cwp, intno = env->exception_index;
 
 #ifdef DEBUG_PCALL
-    if (loglevel & CPU_LOG_INT) {
+    if (qemu_loglevel_mask(CPU_LOG_INT)) {
         static int count;
         const char *name;
 

target-sparc/translate.c

@@ -1933,7 +1933,7 @@ static void disas_sparc_insn(DisasContext * dc)
 {
     unsigned int insn, opc, rs1, rs2, rd;
 
-    if (unlikely(loglevel & CPU_LOG_TB_OP))
+    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP)))
         tcg_gen_debug_insn_start(dc->pc);
     insn = ldl_code(dc->pc);
     opc = GET_FIELD(insn, 0, 1);
@@ -4905,7 +4905,7 @@ static inline void gen_intermediate_code_internal(TranslationBlock * tb,
         tb->icount = num_insns;
     }
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_IN_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
         qemu_log("--------------\n");
         qemu_log("IN: %s\n", lookup_symbol(pc_start));
         log_target_disas(pc_start, last_pc + 4 - pc_start, 0);

tcg/tcg.c

@@ -1878,7 +1878,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
     const TCGArg *args;
 
 #ifdef DEBUG_DISAS
-    if (unlikely(loglevel & CPU_LOG_TB_OP)) {
+    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP))) {
         qemu_log("OP:\n");
         tcg_dump_ops(s, logfile);
         qemu_log("\n");
@@ -1894,7 +1894,7 @@ static inline int tcg_gen_code_common(TCGContext *s, uint8_t *gen_code_buf,
 #endif
 
 #ifdef DEBUG_DISAS
-    if (unlikely(loglevel & CPU_LOG_TB_OP_OPT)) {
+    if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_OPT))) {
         qemu_log("OP after la:\n");
         tcg_dump_ops(s, logfile);
         qemu_log("\n");

translate-all.c

@@ -127,7 +127,7 @@ int cpu_gen_code(CPUState *env, TranslationBlock *tb, int *gen_code_size_ptr)
 #endif
 
 #ifdef DEBUG_DISAS
-    if (loglevel & CPU_LOG_TB_OUT_ASM) {
+    if (qemu_loglevel_mask(CPU_LOG_TB_OUT_ASM)) {
         qemu_log("OUT: [size=%d]\n", *gen_code_size_ptr);
         log_disas(tb->tc_ptr, *gen_code_size_ptr);
         qemu_log("\n");