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@@ -55,14 +55,14 @@ const MemoryRegionOps unassigned_io_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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-void cpu_outb(pio_addr_t addr, uint8_t val)
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+void cpu_outb(uint32_t addr, uint8_t val)
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{
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trace_cpu_out(addr, 'b', val);
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address_space_write(&address_space_io, addr, MEMTXATTRS_UNSPECIFIED,
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&val, 1);
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}
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-void cpu_outw(pio_addr_t addr, uint16_t val)
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+void cpu_outw(uint32_t addr, uint16_t val)
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{
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uint8_t buf[2];
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@@ -72,7 +72,7 @@ void cpu_outw(pio_addr_t addr, uint16_t val)
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buf, 2);
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}
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-void cpu_outl(pio_addr_t addr, uint32_t val)
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+void cpu_outl(uint32_t addr, uint32_t val)
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{
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uint8_t buf[4];
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@@ -82,7 +82,7 @@ void cpu_outl(pio_addr_t addr, uint32_t val)
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buf, 4);
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}
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-uint8_t cpu_inb(pio_addr_t addr)
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+uint8_t cpu_inb(uint32_t addr)
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{
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uint8_t val;
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@@ -92,7 +92,7 @@ uint8_t cpu_inb(pio_addr_t addr)
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return val;
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}
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-uint16_t cpu_inw(pio_addr_t addr)
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+uint16_t cpu_inw(uint32_t addr)
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{
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uint8_t buf[2];
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uint16_t val;
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@@ -103,7 +103,7 @@ uint16_t cpu_inw(pio_addr_t addr)
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return val;
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}
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-uint32_t cpu_inl(pio_addr_t addr)
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+uint32_t cpu_inl(uint32_t addr)
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{
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uint8_t buf[4];
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uint32_t val;
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