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Эх сурвалжийг харах

compiler.h: replace QEMU_NORETURN with G_NORETURN

G_NORETURN was introduced in glib 2.68, fallback to G_GNUC_NORETURN in
glib-compat.

Note that this attribute must be placed before the function declaration
(bringing a bit of consistency in qemu codebase usage).

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Message-Id: <20220420132624.2439741-20-marcandre.lureau@redhat.com>
Marc-André Lureau 3 жил өмнө
parent
commit
8905770b27
58 өөрчлөгдсөн 214 нэмэгдсэн , 191 устгасан
  1. 2 2
      accel/stubs/tcg-stub.c
  2. 1 2
      accel/tcg/internal.h
  3. 2 1
      bsd-user/signal.c
  4. 2 1
      hw/misc/mips_itu.c
  5. 10 10
      include/exec/exec-all.h
  6. 1 1
      include/exec/helper-head.h
  7. 4 0
      include/glib-compat.h
  8. 1 1
      include/hw/core/cpu.h
  9. 3 3
      include/hw/core/tcg-cpu-ops.h
  10. 1 1
      include/hw/hw.h
  11. 0 2
      include/qemu/compiler.h
  12. 2 1
      include/qemu/osdep.h
  13. 1 1
      include/qemu/thread.h
  14. 2 2
      include/tcg/tcg-ldst.h
  15. 1 1
      include/tcg/tcg.h
  16. 2 1
      linux-user/signal.c
  17. 1 1
      linux-user/user-internals.h
  18. 2 2
      monitor/hmp.c
  19. 8 4
      qemu-img.c
  20. 1 1
      scripts/checkpatch.pl
  21. 1 1
      scripts/cocci-macro-file.h
  22. 5 5
      target/alpha/cpu.h
  23. 5 5
      target/alpha/helper.c
  24. 6 6
      target/arm/internals.h
  25. 2 2
      target/arm/pauth_helper.c
  26. 4 3
      target/arm/tlb_helper.c
  27. 5 4
      target/hexagon/op_helper.c
  28. 4 4
      target/hppa/cpu.c
  29. 1 1
      target/hppa/cpu.h
  30. 2 2
      target/hppa/op_helper.c
  31. 1 1
      target/i386/tcg/bpt_helper.c
  32. 16 15
      target/i386/tcg/excp_helper.c
  33. 12 12
      target/i386/tcg/helper-tcg.h
  34. 3 3
      target/i386/tcg/misc_helper.c
  35. 4 3
      target/i386/tcg/sysemu/misc_helper.c
  36. 3 3
      target/microblaze/cpu.h
  37. 9 8
      target/mips/tcg/tcg-internal.h
  38. 3 3
      target/nios2/cpu.h
  39. 1 1
      target/openrisc/exception.c
  40. 1 1
      target/openrisc/exception.h
  41. 2 1
      target/openrisc/exception_helper.c
  42. 7 7
      target/ppc/cpu.h
  43. 3 3
      target/ppc/internal.h
  44. 5 5
      target/riscv/cpu.h
  45. 2 2
      target/riscv/op_helper.c
  46. 12 10
      target/rx/op_helper.c
  47. 3 3
      target/s390x/s390x-internal.h
  48. 12 10
      target/s390x/tcg/excp_helper.c
  49. 6 6
      target/s390x/tcg/tcg_s390x.h
  50. 3 3
      target/sh4/cpu.h
  51. 3 2
      target/sh4/op_helper.c
  52. 5 5
      target/sparc/cpu.h
  53. 4 4
      target/sparc/mmu_helper.c
  54. 3 3
      target/tricore/op_helper.c
  55. 3 3
      target/xtensa/cpu.h
  56. 2 1
      tcg/tcg.c
  57. 2 1
      tests/fp/fp-bench.c
  58. 2 1
      tests/fp/fp-test.c

+ 2 - 2
accel/stubs/tcg-stub.c

@@ -28,12 +28,12 @@ void *probe_access(CPUArchState *env, target_ulong addr, int size,
      g_assert_not_reached();
      g_assert_not_reached();
 }
 }
 
 
-void QEMU_NORETURN cpu_loop_exit(CPUState *cpu)
+G_NORETURN void cpu_loop_exit(CPUState *cpu)
 {
 {
     g_assert_not_reached();
     g_assert_not_reached();
 }
 }
 
 
-void QEMU_NORETURN cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
+G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc)
 {
 {
     g_assert_not_reached();
     g_assert_not_reached();
 }
 }

+ 1 - 2
accel/tcg/internal.h

@@ -14,8 +14,7 @@
 TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc,
 TranslationBlock *tb_gen_code(CPUState *cpu, target_ulong pc,
                               target_ulong cs_base, uint32_t flags,
                               target_ulong cs_base, uint32_t flags,
                               int cflags);
                               int cflags);
-
-void QEMU_NORETURN cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
+G_NORETURN void cpu_io_recompile(CPUState *cpu, uintptr_t retaddr);
 void page_init(void);
 void page_init(void);
 void tb_htable_init(void);
 void tb_htable_init(void);
 
 

+ 2 - 1
bsd-user/signal.c

@@ -347,7 +347,8 @@ static int core_dump_signal(int sig)
 }
 }
 
 
 /* Abort execution with signal. */
 /* Abort execution with signal. */
-static void QEMU_NORETURN dump_core_and_abort(int target_sig)
+static G_NORETURN
+void dump_core_and_abort(int target_sig)
 {
 {
     CPUArchState *env = thread_cpu->env_ptr;
     CPUArchState *env = thread_cpu->env_ptr;
     CPUState *cpu = env_cpu(env);
     CPUState *cpu = env_cpu(env);

+ 2 - 1
hw/misc/mips_itu.c

@@ -189,7 +189,8 @@ static void wake_blocked_threads(ITCStorageCell *c)
     c->blocked_threads = 0;
     c->blocked_threads = 0;
 }
 }
 
 
-static void QEMU_NORETURN block_thread_and_exit(ITCStorageCell *c)
+static G_NORETURN
+void block_thread_and_exit(ITCStorageCell *c)
 {
 {
     c->blocked_threads |= 1ULL << current_cpu->cpu_index;
     c->blocked_threads |= 1ULL << current_cpu->cpu_index;
     current_cpu->halted = 1;
     current_cpu->halted = 1;

+ 10 - 10
include/exec/exec-all.h

@@ -58,10 +58,10 @@ void restore_state_to_opc(CPUArchState *env, TranslationBlock *tb,
  */
  */
 bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
 bool cpu_restore_state(CPUState *cpu, uintptr_t searched_pc, bool will_exit);
 
 
-void QEMU_NORETURN cpu_loop_exit_noexc(CPUState *cpu);
-void QEMU_NORETURN cpu_loop_exit(CPUState *cpu);
-void QEMU_NORETURN cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc);
-void QEMU_NORETURN cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc);
+G_NORETURN void cpu_loop_exit_noexc(CPUState *cpu);
+G_NORETURN void cpu_loop_exit(CPUState *cpu);
+G_NORETURN void cpu_loop_exit_restore(CPUState *cpu, uintptr_t pc);
+G_NORETURN void cpu_loop_exit_atomic(CPUState *cpu, uintptr_t pc);
 
 
 /**
 /**
  * cpu_loop_exit_requested:
  * cpu_loop_exit_requested:
@@ -669,9 +669,9 @@ bool handle_sigsegv_accerr_write(CPUState *cpu, sigset_t *old_set,
  * Use the TCGCPUOps hook to record cpu state, do guest operating system
  * Use the TCGCPUOps hook to record cpu state, do guest operating system
  * specific things to raise SIGSEGV, and jump to the main cpu loop.
  * specific things to raise SIGSEGV, and jump to the main cpu loop.
  */
  */
-void QEMU_NORETURN cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
-                                         MMUAccessType access_type,
-                                         bool maperr, uintptr_t ra);
+G_NORETURN void cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
+                                      MMUAccessType access_type,
+                                      bool maperr, uintptr_t ra);
 
 
 /**
 /**
  * cpu_loop_exit_sigbus:
  * cpu_loop_exit_sigbus:
@@ -683,9 +683,9 @@ void QEMU_NORETURN cpu_loop_exit_sigsegv(CPUState *cpu, target_ulong addr,
  * Use the TCGCPUOps hook to record cpu state, do guest operating system
  * Use the TCGCPUOps hook to record cpu state, do guest operating system
  * specific things to raise SIGBUS, and jump to the main cpu loop.
  * specific things to raise SIGBUS, and jump to the main cpu loop.
  */
  */
-void QEMU_NORETURN cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
-                                        MMUAccessType access_type,
-                                        uintptr_t ra);
+G_NORETURN void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
+                                     MMUAccessType access_type,
+                                     uintptr_t ra);
 
 
 #else
 #else
 static inline void mmap_lock(void) {}
 static inline void mmap_lock(void) {}

+ 1 - 1
include/exec/helper-head.h

@@ -46,7 +46,7 @@
 #define dh_ctype_ptr void *
 #define dh_ctype_ptr void *
 #define dh_ctype_cptr const void *
 #define dh_ctype_cptr const void *
 #define dh_ctype_void void
 #define dh_ctype_void void
-#define dh_ctype_noreturn void QEMU_NORETURN
+#define dh_ctype_noreturn G_NORETURN void
 #define dh_ctype(t) dh_ctype_##t
 #define dh_ctype(t) dh_ctype_##t
 
 
 #ifdef NEED_CPU_H
 #ifdef NEED_CPU_H

+ 4 - 0
include/glib-compat.h

@@ -147,4 +147,8 @@ qemu_g_test_slow(void)
 
 
 #pragma GCC diagnostic pop
 #pragma GCC diagnostic pop
 
 
+#ifndef G_NORETURN
+#define G_NORETURN G_GNUC_NORETURN
+#endif
+
 #endif
 #endif

+ 1 - 1
include/hw/core/cpu.h

@@ -1015,7 +1015,7 @@ int cpu_watchpoint_address_matches(CPUState *cpu, vaddr addr, vaddr len);
  */
  */
 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
 AddressSpace *cpu_get_address_space(CPUState *cpu, int asidx);
 
 
-void QEMU_NORETURN cpu_abort(CPUState *cpu, const char *fmt, ...)
+G_NORETURN void cpu_abort(CPUState *cpu, const char *fmt, ...)
     G_GNUC_PRINTF(2, 3);
     G_GNUC_PRINTF(2, 3);
 
 
 /* $(top_srcdir)/cpu.c */
 /* $(top_srcdir)/cpu.c */

+ 3 - 3
include/hw/core/tcg-cpu-ops.h

@@ -78,9 +78,9 @@ struct TCGCPUOps {
      * @do_unaligned_access: Callback for unaligned access handling
      * @do_unaligned_access: Callback for unaligned access handling
      * The callback must exit via raising an exception.
      * The callback must exit via raising an exception.
      */
      */
-    void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
-                                MMUAccessType access_type,
-                                int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
+    G_NORETURN void (*do_unaligned_access)(CPUState *cpu, vaddr addr,
+                                           MMUAccessType access_type,
+                                           int mmu_idx, uintptr_t retaddr);
 
 
     /**
     /**
      * @adjust_watchpoint_address: hack for cpu_check_watchpoint used by ARM
      * @adjust_watchpoint_address: hack for cpu_check_watchpoint used by ARM

+ 1 - 1
include/hw/hw.h

@@ -5,6 +5,6 @@
 #error Cannot include hw/hw.h from user emulation
 #error Cannot include hw/hw.h from user emulation
 #endif
 #endif
 
 
-void QEMU_NORETURN hw_error(const char *fmt, ...) G_GNUC_PRINTF(1, 2);
+G_NORETURN void hw_error(const char *fmt, ...) G_GNUC_PRINTF(1, 2);
 
 
 #endif
 #endif

+ 0 - 2
include/qemu/compiler.h

@@ -22,8 +22,6 @@
 #define QEMU_EXTERN_C extern
 #define QEMU_EXTERN_C extern
 #endif
 #endif
 
 
-#define QEMU_NORETURN __attribute__ ((__noreturn__))
-
 #if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
 #if defined(_WIN32) && (defined(__x86_64__) || defined(__i386__))
 # define QEMU_PACKED __attribute__((gcc_struct, packed))
 # define QEMU_PACKED __attribute__((gcc_struct, packed))
 #else
 #else

+ 2 - 1
include/qemu/osdep.h

@@ -177,7 +177,8 @@ extern "C" {
  * supports QEMU_ERROR, this will be reported at compile time; otherwise
  * supports QEMU_ERROR, this will be reported at compile time; otherwise
  * this will be reported at link time due to the missing symbol.
  * this will be reported at link time due to the missing symbol.
  */
  */
-extern void QEMU_NORETURN QEMU_ERROR("code path is reachable")
+extern G_NORETURN
+void QEMU_ERROR("code path is reachable")
     qemu_build_not_reached_always(void);
     qemu_build_not_reached_always(void);
 #if defined(__OPTIMIZE__) && !defined(__NO_INLINE__)
 #if defined(__OPTIMIZE__) && !defined(__NO_INLINE__)
 #define qemu_build_not_reached()  qemu_build_not_reached_always()
 #define qemu_build_not_reached()  qemu_build_not_reached_always()

+ 1 - 1
include/qemu/thread.h

@@ -188,7 +188,7 @@ void qemu_thread_create(QemuThread *thread, const char *name,
 void *qemu_thread_join(QemuThread *thread);
 void *qemu_thread_join(QemuThread *thread);
 void qemu_thread_get_self(QemuThread *thread);
 void qemu_thread_get_self(QemuThread *thread);
 bool qemu_thread_is_self(QemuThread *thread);
 bool qemu_thread_is_self(QemuThread *thread);
-void qemu_thread_exit(void *retval) QEMU_NORETURN;
+G_NORETURN void qemu_thread_exit(void *retval);
 void qemu_thread_naming(bool enable);
 void qemu_thread_naming(bool enable);
 
 
 struct Notifier;
 struct Notifier;

+ 2 - 2
include/tcg/tcg-ldst.h

@@ -72,8 +72,8 @@ void helper_be_stq_mmu(CPUArchState *env, target_ulong addr, uint64_t val,
 
 
 #else
 #else
 
 
-void QEMU_NORETURN helper_unaligned_ld(CPUArchState *env, target_ulong addr);
-void QEMU_NORETURN helper_unaligned_st(CPUArchState *env, target_ulong addr);
+G_NORETURN void helper_unaligned_ld(CPUArchState *env, target_ulong addr);
+G_NORETURN void helper_unaligned_st(CPUArchState *env, target_ulong addr);
 
 
 #endif /* CONFIG_SOFTMMU */
 #endif /* CONFIG_SOFTMMU */
 #endif /* TCG_LDST_H */
 #endif /* TCG_LDST_H */

+ 1 - 1
include/tcg/tcg.h

@@ -398,7 +398,7 @@ typedef TCGv_ptr TCGv_env;
 #define TCG_CALL_NO_WRITE_GLOBALS   0x0002
 #define TCG_CALL_NO_WRITE_GLOBALS   0x0002
 /* Helper can be safely suppressed if the return value is not used. */
 /* Helper can be safely suppressed if the return value is not used. */
 #define TCG_CALL_NO_SIDE_EFFECTS    0x0004
 #define TCG_CALL_NO_SIDE_EFFECTS    0x0004
-/* Helper is QEMU_NORETURN.  */
+/* Helper is G_NORETURN.  */
 #define TCG_CALL_NO_RETURN          0x0008
 #define TCG_CALL_NO_RETURN          0x0008
 
 
 /* convenience version of most used call flags */
 /* convenience version of most used call flags */

+ 2 - 1
linux-user/signal.c

@@ -725,7 +725,8 @@ void cpu_loop_exit_sigbus(CPUState *cpu, target_ulong addr,
 }
 }
 
 
 /* abort execution with signal */
 /* abort execution with signal */
-static void QEMU_NORETURN dump_core_and_abort(int target_sig)
+static G_NORETURN
+void dump_core_and_abort(int target_sig)
 {
 {
     CPUState *cpu = thread_cpu;
     CPUState *cpu = thread_cpu;
     CPUArchState *env = cpu->env_ptr;
     CPUArchState *env = cpu->env_ptr;

+ 1 - 1
linux-user/user-internals.h

@@ -64,7 +64,7 @@ abi_long do_syscall(void *cpu_env, int num, abi_long arg1,
                     abi_long arg5, abi_long arg6, abi_long arg7,
                     abi_long arg5, abi_long arg6, abi_long arg7,
                     abi_long arg8);
                     abi_long arg8);
 extern __thread CPUState *thread_cpu;
 extern __thread CPUState *thread_cpu;
-void QEMU_NORETURN cpu_loop(CPUArchState *env);
+G_NORETURN void cpu_loop(CPUArchState *env);
 const char *target_strerror(int err);
 const char *target_strerror(int err);
 int get_osversion(void);
 int get_osversion(void);
 void init_qemu_uname_release(void);
 void init_qemu_uname_release(void);

+ 2 - 2
monitor/hmp.c

@@ -308,8 +308,8 @@ void help_cmd(Monitor *mon, const char *name)
 static const char *pch;
 static const char *pch;
 static sigjmp_buf expr_env;
 static sigjmp_buf expr_env;
 
 
-static void G_GNUC_PRINTF(2, 3) QEMU_NORETURN
-expr_error(Monitor *mon, const char *fmt, ...)
+static G_NORETURN G_GNUC_PRINTF(2, 3)
+void expr_error(Monitor *mon, const char *fmt, ...)
 {
 {
     va_list ap;
     va_list ap;
     va_start(ap, fmt);
     va_start(ap, fmt);

+ 8 - 4
qemu-img.c

@@ -100,7 +100,8 @@ static void format_print(void *opaque, const char *name)
     printf(" %s", name);
     printf(" %s", name);
 }
 }
 
 
-static void QEMU_NORETURN G_GNUC_PRINTF(1, 2) error_exit(const char *fmt, ...)
+static G_NORETURN G_GNUC_PRINTF(1, 2)
+void error_exit(const char *fmt, ...)
 {
 {
     va_list ap;
     va_list ap;
 
 
@@ -112,18 +113,21 @@ static void QEMU_NORETURN G_GNUC_PRINTF(1, 2) error_exit(const char *fmt, ...)
     exit(EXIT_FAILURE);
     exit(EXIT_FAILURE);
 }
 }
 
 
-static void QEMU_NORETURN missing_argument(const char *option)
+static G_NORETURN
+void missing_argument(const char *option)
 {
 {
     error_exit("missing argument for option '%s'", option);
     error_exit("missing argument for option '%s'", option);
 }
 }
 
 
-static void QEMU_NORETURN unrecognized_option(const char *option)
+static G_NORETURN
+void unrecognized_option(const char *option)
 {
 {
     error_exit("unrecognized option '%s'", option);
     error_exit("unrecognized option '%s'", option);
 }
 }
 
 
 /* Please keep in synch with docs/tools/qemu-img.rst */
 /* Please keep in synch with docs/tools/qemu-img.rst */
-static void QEMU_NORETURN help(void)
+static G_NORETURN
+void help(void)
 {
 {
     const char *help_msg =
     const char *help_msg =
            QEMU_IMG_VERSION
            QEMU_IMG_VERSION

+ 1 - 1
scripts/checkpatch.pl

@@ -223,7 +223,7 @@ our $Sparse	= qr{
 our $Attribute	= qr{
 our $Attribute	= qr{
 			const|
 			const|
 			volatile|
 			volatile|
-			QEMU_NORETURN|
+			G_NORETURN|
 			G_GNUC_WARN_UNUSED_RESULT|
 			G_GNUC_WARN_UNUSED_RESULT|
 			G_GNUC_NULL_TERMINATED|
 			G_GNUC_NULL_TERMINATED|
 			QEMU_PACKED|
 			QEMU_PACKED|

+ 1 - 1
scripts/cocci-macro-file.h

@@ -19,7 +19,7 @@
  */
  */
 
 
 /* From qemu/compiler.h */
 /* From qemu/compiler.h */
-#define QEMU_NORETURN __attribute__ ((__noreturn__))
+#define G_NORETURN __attribute__ ((__noreturn__))
 #define G_GNUC_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
 #define G_GNUC_WARN_UNUSED_RESULT __attribute__((warn_unused_result))
 #define G_GNUC_NULL_TERMINATED __attribute__((sentinel))
 #define G_GNUC_NULL_TERMINATED __attribute__((sentinel))
 
 

+ 5 - 5
target/alpha/cpu.h

@@ -434,8 +434,8 @@ void alpha_translate_init(void);
 #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
 #define CPU_RESOLVING_TYPE TYPE_ALPHA_CPU
 
 
 void alpha_cpu_list(void);
 void alpha_cpu_list(void);
-void QEMU_NORETURN dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
-void QEMU_NORETURN arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
+G_NORETURN void dynamic_excp(CPUAlphaState *, uintptr_t, int, int);
+G_NORETURN void arith_excp(CPUAlphaState *, uintptr_t, int, uint64_t);
 
 
 uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
 uint64_t cpu_alpha_load_fpcr (CPUAlphaState *env);
 void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
 void cpu_alpha_store_fpcr (CPUAlphaState *env, uint64_t val);
@@ -452,9 +452,9 @@ void alpha_cpu_record_sigbus(CPUState *cs, vaddr address,
 bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 bool alpha_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr);
                         bool probe, uintptr_t retaddr);
-void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                   MMUAccessType access_type, int mmu_idx,
-                                   uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void alpha_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                              MMUAccessType access_type, int mmu_idx,
+                                              uintptr_t retaddr);
 void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
 void alpha_cpu_do_transaction_failed(CPUState *cs, hwaddr physaddr,
                                      vaddr addr, unsigned size,
                                      vaddr addr, unsigned size,
                                      MMUAccessType access_type,
                                      MMUAccessType access_type,

+ 5 - 5
target/alpha/helper.c

@@ -514,7 +514,7 @@ void alpha_cpu_dump_state(CPUState *cs, FILE *f, int flags)
 
 
 /* This should only be called from translate, via gen_excp.
 /* This should only be called from translate, via gen_excp.
    We expect that ENV->PC has already been updated.  */
    We expect that ENV->PC has already been updated.  */
-void QEMU_NORETURN helper_excp(CPUAlphaState *env, int excp, int error)
+G_NORETURN void helper_excp(CPUAlphaState *env, int excp, int error)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -524,8 +524,8 @@ void QEMU_NORETURN helper_excp(CPUAlphaState *env, int excp, int error)
 }
 }
 
 
 /* This may be called from any of the helpers to set up EXCEPTION_INDEX.  */
 /* This may be called from any of the helpers to set up EXCEPTION_INDEX.  */
-void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
-                                int excp, int error)
+G_NORETURN void dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
+                             int excp, int error)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -539,8 +539,8 @@ void QEMU_NORETURN dynamic_excp(CPUAlphaState *env, uintptr_t retaddr,
     cpu_loop_exit(cs);
     cpu_loop_exit(cs);
 }
 }
 
 
-void QEMU_NORETURN arith_excp(CPUAlphaState *env, uintptr_t retaddr,
-                              int exc, uint64_t mask)
+G_NORETURN void arith_excp(CPUAlphaState *env, uintptr_t retaddr,
+                           int exc, uint64_t mask)
 {
 {
     env->trap_arg0 = exc;
     env->trap_arg0 = exc;
     env->trap_arg1 = mask;
     env->trap_arg1 = mask;

+ 6 - 6
target/arm/internals.h

@@ -102,13 +102,13 @@ FIELD(V7M_EXCRET, RES1, 7, 25) /* including the must-be-1 prefix */
  * and target exception level. This should be called from helper functions,
  * and target exception level. This should be called from helper functions,
  * and never returns because we will longjump back up to the CPU main loop.
  * and never returns because we will longjump back up to the CPU main loop.
  */
  */
-void QEMU_NORETURN raise_exception(CPUARMState *env, uint32_t excp,
-                                   uint32_t syndrome, uint32_t target_el);
+G_NORETURN void raise_exception(CPUARMState *env, uint32_t excp,
+                                uint32_t syndrome, uint32_t target_el);
 
 
 /*
 /*
  * Similarly, but also use unwinding to restore cpu state.
  * Similarly, but also use unwinding to restore cpu state.
  */
  */
-void QEMU_NORETURN raise_exception_ra(CPUARMState *env, uint32_t excp,
+G_NORETURN void raise_exception_ra(CPUARMState *env, uint32_t excp,
                                       uint32_t syndrome, uint32_t target_el,
                                       uint32_t syndrome, uint32_t target_el,
                                       uintptr_t ra);
                                       uintptr_t ra);
 
 
@@ -606,9 +606,9 @@ ARMMMUIdx arm_v7m_mmu_idx_for_secstate(CPUARMState *env, bool secstate);
 bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
 bool arm_s1_regime_using_lpae_format(CPUARMState *env, ARMMMUIdx mmu_idx);
 
 
 /* Raise a data fault alignment exception for the specified virtual address */
 /* Raise a data fault alignment exception for the specified virtual address */
-void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
-                                 MMUAccessType access_type,
-                                 int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void arm_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
+                                            MMUAccessType access_type,
+                                            int mmu_idx, uintptr_t retaddr);
 
 
 /* arm_cpu_do_transaction_failed: handle a memory system error response
 /* arm_cpu_do_transaction_failed: handle a memory system error response
  * (eg "no device/memory present at address") by raising an external abort
  * (eg "no device/memory present at address") by raising an external abort

+ 2 - 2
target/arm/pauth_helper.c

@@ -382,8 +382,8 @@ static uint64_t pauth_strip(CPUARMState *env, uint64_t ptr, bool data)
     return pauth_original_ptr(ptr, param);
     return pauth_original_ptr(ptr, param);
 }
 }
 
 
-static void QEMU_NORETURN pauth_trap(CPUARMState *env, int target_el,
-                                     uintptr_t ra)
+static G_NORETURN
+void pauth_trap(CPUARMState *env, int target_el, uintptr_t ra)
 {
 {
     raise_exception_ra(env, EXCP_UDEF, syn_pactrap(), target_el, ra);
     raise_exception_ra(env, EXCP_UDEF, syn_pactrap(), target_el, ra);
 }
 }

+ 4 - 3
target/arm/tlb_helper.c

@@ -79,9 +79,10 @@ static uint32_t compute_fsr_fsc(CPUARMState *env, ARMMMUFaultInfo *fi,
     return fsr;
     return fsr;
 }
 }
 
 
-static void QEMU_NORETURN arm_deliver_fault(ARMCPU *cpu, vaddr addr,
-                                            MMUAccessType access_type,
-                                            int mmu_idx, ARMMMUFaultInfo *fi)
+static G_NORETURN
+void arm_deliver_fault(ARMCPU *cpu, vaddr addr,
+                       MMUAccessType access_type,
+                       int mmu_idx, ARMMMUFaultInfo *fi)
 {
 {
     CPUARMState *env = &cpu->env;
     CPUARMState *env = &cpu->env;
     int target_el;
     int target_el;

+ 5 - 4
target/hexagon/op_helper.c

@@ -34,9 +34,10 @@
 #define SF_MANTBITS    23
 #define SF_MANTBITS    23
 
 
 /* Exceptions processing helpers */
 /* Exceptions processing helpers */
-static void QEMU_NORETURN do_raise_exception_err(CPUHexagonState *env,
-                                                 uint32_t exception,
-                                                 uintptr_t pc)
+static G_NORETURN
+void do_raise_exception_err(CPUHexagonState *env,
+                            uint32_t exception,
+                            uintptr_t pc)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
     qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
     qemu_log_mask(CPU_LOG_INT, "%s: %d\n", __func__, exception);
@@ -44,7 +45,7 @@ static void QEMU_NORETURN do_raise_exception_err(CPUHexagonState *env,
     cpu_loop_exit_restore(cs, pc);
     cpu_loop_exit_restore(cs, pc);
 }
 }
 
 
-void QEMU_NORETURN HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp)
+G_NORETURN void HELPER(raise_exception)(CPUHexagonState *env, uint32_t excp)
 {
 {
     do_raise_exception_err(env, excp, 0);
     do_raise_exception_err(env, excp, 0);
 }
 }

+ 4 - 4
target/hppa/cpu.c

@@ -73,10 +73,10 @@ static void hppa_cpu_disas_set_info(CPUState *cs, disassemble_info *info)
 }
 }
 
 
 #ifndef CONFIG_USER_ONLY
 #ifndef CONFIG_USER_ONLY
-static void QEMU_NORETURN
-hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                             MMUAccessType access_type, int mmu_idx,
-                             uintptr_t retaddr)
+static G_NORETURN
+void hppa_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                  MMUAccessType access_type, int mmu_idx,
+                                  uintptr_t retaddr)
 {
 {
     HPPACPU *cpu = HPPA_CPU(cs);
     HPPACPU *cpu = HPPA_CPU(cs);
     CPUHPPAState *env = &cpu->env;
     CPUHPPAState *env = &cpu->env;

+ 1 - 1
target/hppa/cpu.h

@@ -339,6 +339,6 @@ extern const VMStateDescription vmstate_hppa_cpu;
 void hppa_cpu_alarm_timer(void *);
 void hppa_cpu_alarm_timer(void *);
 int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr);
 int hppa_artype_for_page(CPUHPPAState *env, target_ulong vaddr);
 #endif
 #endif
-void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra);
+G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra);
 
 
 #endif /* HPPA_CPU_H */
 #endif /* HPPA_CPU_H */

+ 2 - 2
target/hppa/op_helper.c

@@ -28,7 +28,7 @@
 #include "fpu/softfloat.h"
 #include "fpu/softfloat.h"
 #include "trace.h"
 #include "trace.h"
 
 
-void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
+G_NORETURN void HELPER(excp)(CPUHPPAState *env, int excp)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -36,7 +36,7 @@ void QEMU_NORETURN HELPER(excp)(CPUHPPAState *env, int excp)
     cpu_loop_exit(cs);
     cpu_loop_exit(cs);
 }
 }
 
 
-void QEMU_NORETURN hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
+G_NORETURN void hppa_dynamic_excp(CPUHPPAState *env, int excp, uintptr_t ra)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 

+ 1 - 1
target/i386/tcg/bpt_helper.c

@@ -22,7 +22,7 @@
 #include "exec/helper-proto.h"
 #include "exec/helper-proto.h"
 #include "helper-tcg.h"
 #include "helper-tcg.h"
 
 
-void QEMU_NORETURN helper_single_step(CPUX86State *env)
+G_NORETURN void helper_single_step(CPUX86State *env)
 {
 {
 #ifndef CONFIG_USER_ONLY
 #ifndef CONFIG_USER_ONLY
     check_hw_breakpoints(env, true);
     check_hw_breakpoints(env, true);

+ 16 - 15
target/i386/tcg/excp_helper.c

@@ -25,13 +25,13 @@
 #include "exec/helper-proto.h"
 #include "exec/helper-proto.h"
 #include "helper-tcg.h"
 #include "helper-tcg.h"
 
 
-void QEMU_NORETURN helper_raise_interrupt(CPUX86State *env, int intno,
+G_NORETURN void helper_raise_interrupt(CPUX86State *env, int intno,
                                           int next_eip_addend)
                                           int next_eip_addend)
 {
 {
     raise_interrupt(env, intno, 1, 0, next_eip_addend);
     raise_interrupt(env, intno, 1, 0, next_eip_addend);
 }
 }
 
 
-void QEMU_NORETURN helper_raise_exception(CPUX86State *env, int exception_index)
+G_NORETURN void helper_raise_exception(CPUX86State *env, int exception_index)
 {
 {
     raise_exception(env, exception_index);
     raise_exception(env, exception_index);
 }
 }
@@ -87,10 +87,11 @@ static int check_exception(CPUX86State *env, int intno, int *error_code,
  * env->eip value AFTER the interrupt instruction. It is only relevant if
  * env->eip value AFTER the interrupt instruction. It is only relevant if
  * is_int is TRUE.
  * is_int is TRUE.
  */
  */
-static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
-                                           int is_int, int error_code,
-                                           int next_eip_addend,
-                                           uintptr_t retaddr)
+static G_NORETURN
+void raise_interrupt2(CPUX86State *env, int intno,
+                      int is_int, int error_code,
+                      int next_eip_addend,
+                      uintptr_t retaddr)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -111,31 +112,31 @@ static void QEMU_NORETURN raise_interrupt2(CPUX86State *env, int intno,
 
 
 /* shortcuts to generate exceptions */
 /* shortcuts to generate exceptions */
 
 
-void QEMU_NORETURN raise_interrupt(CPUX86State *env, int intno, int is_int,
-                                   int error_code, int next_eip_addend)
+G_NORETURN void raise_interrupt(CPUX86State *env, int intno, int is_int,
+                                int error_code, int next_eip_addend)
 {
 {
     raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0);
     raise_interrupt2(env, intno, is_int, error_code, next_eip_addend, 0);
 }
 }
 
 
-void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
-                                       int error_code)
+G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
+                                    int error_code)
 {
 {
     raise_interrupt2(env, exception_index, 0, error_code, 0, 0);
     raise_interrupt2(env, exception_index, 0, error_code, 0, 0);
 }
 }
 
 
-void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
-                                          int error_code, uintptr_t retaddr)
+G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
+                                       int error_code, uintptr_t retaddr)
 {
 {
     raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr);
     raise_interrupt2(env, exception_index, 0, error_code, 0, retaddr);
 }
 }
 
 
-void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index)
+G_NORETURN void raise_exception(CPUX86State *env, int exception_index)
 {
 {
     raise_interrupt2(env, exception_index, 0, 0, 0, 0);
     raise_interrupt2(env, exception_index, 0, 0, 0, 0);
 }
 }
 
 
-void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
-                                      uintptr_t retaddr)
+G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
+                                   uintptr_t retaddr)
 {
 {
     raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
     raise_interrupt2(env, exception_index, 0, 0, 0, retaddr);
 }
 }

+ 12 - 12
target/i386/tcg/helper-tcg.h

@@ -69,27 +69,27 @@ static inline target_long lshift(target_long x, int n)
 void tcg_x86_init(void);
 void tcg_x86_init(void);
 
 
 /* excp_helper.c */
 /* excp_helper.c */
-void QEMU_NORETURN raise_exception(CPUX86State *env, int exception_index);
-void QEMU_NORETURN raise_exception_ra(CPUX86State *env, int exception_index,
-                                      uintptr_t retaddr);
-void QEMU_NORETURN raise_exception_err(CPUX86State *env, int exception_index,
-                                       int error_code);
-void QEMU_NORETURN raise_exception_err_ra(CPUX86State *env, int exception_index,
-                                          int error_code, uintptr_t retaddr);
-void QEMU_NORETURN raise_interrupt(CPUX86State *nenv, int intno, int is_int,
-                                   int error_code, int next_eip_addend);
+G_NORETURN void raise_exception(CPUX86State *env, int exception_index);
+G_NORETURN void raise_exception_ra(CPUX86State *env, int exception_index,
+                                   uintptr_t retaddr);
+G_NORETURN void raise_exception_err(CPUX86State *env, int exception_index,
+                                    int error_code);
+G_NORETURN void raise_exception_err_ra(CPUX86State *env, int exception_index,
+                                       int error_code, uintptr_t retaddr);
+G_NORETURN void raise_interrupt(CPUX86State *nenv, int intno, int is_int,
+                                int error_code, int next_eip_addend);
 
 
 /* cc_helper.c */
 /* cc_helper.c */
 extern const uint8_t parity_table[256];
 extern const uint8_t parity_table[256];
 
 
 /* misc_helper.c */
 /* misc_helper.c */
 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
 void cpu_load_eflags(CPUX86State *env, int eflags, int update_mask);
-void do_pause(CPUX86State *env) QEMU_NORETURN;
+G_NORETURN void do_pause(CPUX86State *env);
 
 
 /* sysemu/svm_helper.c */
 /* sysemu/svm_helper.c */
 #ifndef CONFIG_USER_ONLY
 #ifndef CONFIG_USER_ONLY
-void QEMU_NORETURN cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
-                              uint64_t exit_info_1, uintptr_t retaddr);
+G_NORETURN void cpu_vmexit(CPUX86State *nenv, uint32_t exit_code,
+                           uint64_t exit_info_1, uintptr_t retaddr);
 void do_vmexit(CPUX86State *env);
 void do_vmexit(CPUX86State *env);
 #endif
 #endif
 
 

+ 3 - 3
target/i386/tcg/misc_helper.c

@@ -81,7 +81,7 @@ void helper_rdtscp(CPUX86State *env)
     env->regs[R_ECX] = (uint32_t)(env->tsc_aux);
     env->regs[R_ECX] = (uint32_t)(env->tsc_aux);
 }
 }
 
 
-void QEMU_NORETURN helper_rdpmc(CPUX86State *env)
+G_NORETURN void helper_rdpmc(CPUX86State *env)
 {
 {
     if (((env->cr[4] & CR4_PCE_MASK) == 0 ) &&
     if (((env->cr[4] & CR4_PCE_MASK) == 0 ) &&
         ((env->hflags & HF_CPL_MASK) != 0)) {
         ((env->hflags & HF_CPL_MASK) != 0)) {
@@ -94,7 +94,7 @@ void QEMU_NORETURN helper_rdpmc(CPUX86State *env)
     raise_exception_err(env, EXCP06_ILLOP, 0);
     raise_exception_err(env, EXCP06_ILLOP, 0);
 }
 }
 
 
-void QEMU_NORETURN do_pause(CPUX86State *env)
+G_NORETURN void do_pause(CPUX86State *env)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -103,7 +103,7 @@ void QEMU_NORETURN do_pause(CPUX86State *env)
     cpu_loop_exit(cs);
     cpu_loop_exit(cs);
 }
 }
 
 
-void QEMU_NORETURN helper_pause(CPUX86State *env, int next_eip_addend)
+G_NORETURN void helper_pause(CPUX86State *env, int next_eip_addend)
 {
 {
     cpu_svm_check_intercept_param(env, SVM_EXIT_PAUSE, 0, GETPC());
     cpu_svm_check_intercept_param(env, SVM_EXIT_PAUSE, 0, GETPC());
     env->eip += next_eip_addend;
     env->eip += next_eip_addend;

+ 4 - 3
target/i386/tcg/sysemu/misc_helper.c

@@ -471,7 +471,8 @@ void helper_flush_page(CPUX86State *env, target_ulong addr)
     tlb_flush_page(env_cpu(env), addr);
     tlb_flush_page(env_cpu(env), addr);
 }
 }
 
 
-static void QEMU_NORETURN do_hlt(CPUX86State *env)
+static G_NORETURN
+void do_hlt(CPUX86State *env)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -481,7 +482,7 @@ static void QEMU_NORETURN do_hlt(CPUX86State *env)
     cpu_loop_exit(cs);
     cpu_loop_exit(cs);
 }
 }
 
 
-void QEMU_NORETURN helper_hlt(CPUX86State *env, int next_eip_addend)
+G_NORETURN void helper_hlt(CPUX86State *env, int next_eip_addend)
 {
 {
     cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0, GETPC());
     cpu_svm_check_intercept_param(env, SVM_EXIT_HLT, 0, GETPC());
     env->eip += next_eip_addend;
     env->eip += next_eip_addend;
@@ -498,7 +499,7 @@ void helper_monitor(CPUX86State *env, target_ulong ptr)
     cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0, GETPC());
     cpu_svm_check_intercept_param(env, SVM_EXIT_MONITOR, 0, GETPC());
 }
 }
 
 
-void QEMU_NORETURN helper_mwait(CPUX86State *env, int next_eip_addend)
+G_NORETURN void helper_mwait(CPUX86State *env, int next_eip_addend)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 

+ 3 - 3
target/microblaze/cpu.h

@@ -359,9 +359,9 @@ struct ArchCPU {
 void mb_cpu_do_interrupt(CPUState *cs);
 void mb_cpu_do_interrupt(CPUState *cs);
 bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
 bool mb_cpu_exec_interrupt(CPUState *cs, int int_req);
 #endif /* !CONFIG_USER_ONLY */
 #endif /* !CONFIG_USER_ONLY */
-void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
-                                MMUAccessType access_type,
-                                int mmu_idx, uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void mb_cpu_do_unaligned_access(CPUState *cs, vaddr vaddr,
+                                           MMUAccessType access_type,
+                                           int mmu_idx, uintptr_t retaddr);
 void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 void mb_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
 hwaddr mb_cpu_get_phys_page_attrs_debug(CPUState *cpu, vaddr addr,
                                         MemTxAttrs *attrs);
                                         MemTxAttrs *attrs);

+ 9 - 8
target/mips/tcg/tcg-internal.h

@@ -18,18 +18,19 @@
 void mips_tcg_init(void);
 void mips_tcg_init(void);
 
 
 void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
 void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb);
-void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                  MMUAccessType access_type, int mmu_idx,
-                                  uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void mips_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                             MMUAccessType access_type, int mmu_idx,
+                                             uintptr_t retaddr);
 
 
 const char *mips_exception_name(int32_t exception);
 const char *mips_exception_name(int32_t exception);
 
 
-void QEMU_NORETURN do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
-                                          int error_code, uintptr_t pc);
+G_NORETURN void do_raise_exception_err(CPUMIPSState *env, uint32_t exception,
+                                       int error_code, uintptr_t pc);
 
 
-static inline void QEMU_NORETURN do_raise_exception(CPUMIPSState *env,
-                                                    uint32_t exception,
-                                                    uintptr_t pc)
+static inline G_NORETURN
+void do_raise_exception(CPUMIPSState *env,
+                        uint32_t exception,
+                        uintptr_t pc)
 {
 {
     do_raise_exception_err(env, exception, 0, pc);
     do_raise_exception_err(env, exception, 0, pc);
 }
 }

+ 3 - 3
target/nios2/cpu.h

@@ -194,9 +194,9 @@ void nios2_cpu_do_interrupt(CPUState *cs);
 void dump_mmu(CPUNios2State *env);
 void dump_mmu(CPUNios2State *env);
 void nios2_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 void nios2_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 hwaddr nios2_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                   MMUAccessType access_type, int mmu_idx,
-                                   uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void nios2_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                              MMUAccessType access_type, int mmu_idx,
+                                              uintptr_t retaddr);
 
 
 void do_nios2_semihosting(CPUNios2State *env);
 void do_nios2_semihosting(CPUNios2State *env);
 
 

+ 1 - 1
target/openrisc/exception.c

@@ -22,7 +22,7 @@
 #include "exec/exec-all.h"
 #include "exec/exec-all.h"
 #include "exception.h"
 #include "exception.h"
 
 
-void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp)
+G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp)
 {
 {
     CPUState *cs = CPU(cpu);
     CPUState *cs = CPU(cpu);
 
 

+ 1 - 1
target/openrisc/exception.h

@@ -22,6 +22,6 @@
 
 
 #include "cpu.h"
 #include "cpu.h"
 
 
-void QEMU_NORETURN raise_exception(OpenRISCCPU *cpu, uint32_t excp);
+G_NORETURN void raise_exception(OpenRISCCPU *cpu, uint32_t excp);
 
 
 #endif /* TARGET_OPENRISC_EXCEPTION_H */
 #endif /* TARGET_OPENRISC_EXCEPTION_H */

+ 2 - 1
target/openrisc/exception_helper.c

@@ -30,7 +30,8 @@ void HELPER(exception)(CPUOpenRISCState *env, uint32_t excp)
     raise_exception(cpu, excp);
     raise_exception(cpu, excp);
 }
 }
 
 
-static void QEMU_NORETURN do_range(CPUOpenRISCState *env, uintptr_t pc)
+static G_NORETURN
+void do_range(CPUOpenRISCState *env, uintptr_t pc)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 

+ 7 - 7
target/ppc/cpu.h

@@ -2492,13 +2492,13 @@ static inline void cpu_get_tb_cpu_state(CPUPPCState *env, target_ulong *pc,
 }
 }
 #endif
 #endif
 
 
-void QEMU_NORETURN raise_exception(CPUPPCState *env, uint32_t exception);
-void QEMU_NORETURN raise_exception_ra(CPUPPCState *env, uint32_t exception,
-                                      uintptr_t raddr);
-void QEMU_NORETURN raise_exception_err(CPUPPCState *env, uint32_t exception,
-                                       uint32_t error_code);
-void QEMU_NORETURN raise_exception_err_ra(CPUPPCState *env, uint32_t exception,
-                                          uint32_t error_code, uintptr_t raddr);
+G_NORETURN void raise_exception(CPUPPCState *env, uint32_t exception);
+G_NORETURN void raise_exception_ra(CPUPPCState *env, uint32_t exception,
+                                   uintptr_t raddr);
+G_NORETURN void raise_exception_err(CPUPPCState *env, uint32_t exception,
+                                    uint32_t error_code);
+G_NORETURN void raise_exception_err_ra(CPUPPCState *env, uint32_t exception,
+                                       uint32_t error_code, uintptr_t raddr);
 
 
 /* PERFM EBB helper*/
 /* PERFM EBB helper*/
 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
 #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)

+ 3 - 3
target/ppc/internal.h

@@ -286,9 +286,9 @@ void ppc_cpu_record_sigsegv(CPUState *cs, vaddr addr,
 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                       MMUAccessType access_type, int mmu_idx,
                       MMUAccessType access_type, int mmu_idx,
                       bool probe, uintptr_t retaddr);
                       bool probe, uintptr_t retaddr);
-void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                                 MMUAccessType access_type, int mmu_idx,
-                                 uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void ppc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                            MMUAccessType access_type, int mmu_idx,
+                                            uintptr_t retaddr);
 #endif
 #endif
 
 
 #endif /* PPC_INTERNAL_H */
 #endif /* PPC_INTERNAL_H */

+ 5 - 5
target/riscv/cpu.h

@@ -451,9 +451,9 @@ void riscv_cpu_set_virt_enabled(CPURISCVState *env, bool enable);
 bool riscv_cpu_two_stage_lookup(int mmu_idx);
 bool riscv_cpu_two_stage_lookup(int mmu_idx);
 int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
 int riscv_cpu_mmu_index(CPURISCVState *env, bool ifetch);
 hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 hwaddr riscv_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
-void  riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                                    MMUAccessType access_type, int mmu_idx,
-                                    uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void  riscv_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                               MMUAccessType access_type, int mmu_idx,
+                                               uintptr_t retaddr);
 bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                         MMUAccessType access_type, int mmu_idx,
                         MMUAccessType access_type, int mmu_idx,
                         bool probe, uintptr_t retaddr);
                         bool probe, uintptr_t retaddr);
@@ -487,8 +487,8 @@ void riscv_cpu_set_aia_ireg_rmw_fn(CPURISCVState *env, uint32_t priv,
 void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv);
 void riscv_cpu_set_mode(CPURISCVState *env, target_ulong newpriv);
 
 
 void riscv_translate_init(void);
 void riscv_translate_init(void);
-void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
-                                         uint32_t exception, uintptr_t pc);
+G_NORETURN void riscv_raise_exception(CPURISCVState *env,
+                                      uint32_t exception, uintptr_t pc);
 
 
 target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
 target_ulong riscv_cpu_get_fflags(CPURISCVState *env);
 void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);
 void riscv_cpu_set_fflags(CPURISCVState *env, target_ulong);

+ 2 - 2
target/riscv/op_helper.c

@@ -24,8 +24,8 @@
 #include "exec/helper-proto.h"
 #include "exec/helper-proto.h"
 
 
 /* Exceptions processing helpers */
 /* Exceptions processing helpers */
-void QEMU_NORETURN riscv_raise_exception(CPURISCVState *env,
-                                          uint32_t exception, uintptr_t pc)
+G_NORETURN void riscv_raise_exception(CPURISCVState *env,
+                                      uint32_t exception, uintptr_t pc)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
     cs->exception_index = exception;
     cs->exception_index = exception;

+ 12 - 10
target/rx/op_helper.c

@@ -24,8 +24,9 @@
 #include "exec/cpu_ldst.h"
 #include "exec/cpu_ldst.h"
 #include "fpu/softfloat.h"
 #include "fpu/softfloat.h"
 
 
-static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
-                                                 uintptr_t retaddr);
+static inline G_NORETURN
+void raise_exception(CPURXState *env, int index,
+                     uintptr_t retaddr);
 
 
 static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte)
 static void _set_psw(CPURXState *env, uint32_t psw, uint32_t rte)
 {
 {
@@ -418,8 +419,9 @@ uint32_t helper_divu(CPURXState *env, uint32_t num, uint32_t den)
 }
 }
 
 
 /* exception */
 /* exception */
-static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
-                                                 uintptr_t retaddr)
+static inline G_NORETURN
+void raise_exception(CPURXState *env, int index,
+                     uintptr_t retaddr)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -427,22 +429,22 @@ static inline void QEMU_NORETURN raise_exception(CPURXState *env, int index,
     cpu_loop_exit_restore(cs, retaddr);
     cpu_loop_exit_restore(cs, retaddr);
 }
 }
 
 
-void QEMU_NORETURN helper_raise_privilege_violation(CPURXState *env)
+G_NORETURN void helper_raise_privilege_violation(CPURXState *env)
 {
 {
     raise_exception(env, 20, GETPC());
     raise_exception(env, 20, GETPC());
 }
 }
 
 
-void QEMU_NORETURN helper_raise_access_fault(CPURXState *env)
+G_NORETURN void helper_raise_access_fault(CPURXState *env)
 {
 {
     raise_exception(env, 21, GETPC());
     raise_exception(env, 21, GETPC());
 }
 }
 
 
-void QEMU_NORETURN helper_raise_illegal_instruction(CPURXState *env)
+G_NORETURN void helper_raise_illegal_instruction(CPURXState *env)
 {
 {
     raise_exception(env, 23, GETPC());
     raise_exception(env, 23, GETPC());
 }
 }
 
 
-void QEMU_NORETURN helper_wait(CPURXState *env)
+G_NORETURN void helper_wait(CPURXState *env)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -451,12 +453,12 @@ void QEMU_NORETURN helper_wait(CPURXState *env)
     raise_exception(env, EXCP_HLT, 0);
     raise_exception(env, EXCP_HLT, 0);
 }
 }
 
 
-void QEMU_NORETURN helper_rxint(CPURXState *env, uint32_t vec)
+G_NORETURN void helper_rxint(CPURXState *env, uint32_t vec)
 {
 {
     raise_exception(env, 0x100 + vec, 0);
     raise_exception(env, 0x100 + vec, 0);
 }
 }
 
 
-void QEMU_NORETURN helper_rxbrk(CPURXState *env)
+G_NORETURN void helper_rxbrk(CPURXState *env)
 {
 {
     raise_exception(env, 0x100, 0);
     raise_exception(env, 0x100, 0);
 }
 }

+ 3 - 3
target/s390x/s390x-internal.h

@@ -280,9 +280,9 @@ void s390_cpu_record_sigbus(CPUState *cs, vaddr address,
 bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 bool s390_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
                        MMUAccessType access_type, int mmu_idx,
                        MMUAccessType access_type, int mmu_idx,
                        bool probe, uintptr_t retaddr);
                        bool probe, uintptr_t retaddr);
-void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                                   MMUAccessType access_type, int mmu_idx,
-                                   uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                              MMUAccessType access_type, int mmu_idx,
+                                              uintptr_t retaddr);
 #endif
 #endif
 
 
 
 

+ 12 - 10
target/s390x/tcg/excp_helper.c

@@ -34,8 +34,8 @@
 #include "hw/boards.h"
 #include "hw/boards.h"
 #endif
 #endif
 
 
-void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
-                                              uint32_t code, uintptr_t ra)
+G_NORETURN void tcg_s390_program_interrupt(CPUS390XState *env,
+                                           uint32_t code, uintptr_t ra)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 
@@ -46,8 +46,8 @@ void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
     cpu_loop_exit(cs);
     cpu_loop_exit(cs);
 }
 }
 
 
-void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
-                                           uintptr_t ra)
+G_NORETURN void tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
+                                        uintptr_t ra)
 {
 {
     g_assert(dxc <= 0xff);
     g_assert(dxc <= 0xff);
 #if !defined(CONFIG_USER_ONLY)
 #if !defined(CONFIG_USER_ONLY)
@@ -63,8 +63,8 @@ void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
     tcg_s390_program_interrupt(env, PGM_DATA, ra);
     tcg_s390_program_interrupt(env, PGM_DATA, ra);
 }
 }
 
 
-void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc,
-                                             uintptr_t ra)
+G_NORETURN void tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc,
+                                          uintptr_t ra)
 {
 {
     g_assert(vxc <= 0xff);
     g_assert(vxc <= 0xff);
 #if !defined(CONFIG_USER_ONLY)
 #if !defined(CONFIG_USER_ONLY)
@@ -88,7 +88,8 @@ void HELPER(data_exception)(CPUS390XState *env, uint32_t dxc)
  * this is only for the atomic operations, for which we want to raise a
  * this is only for the atomic operations, for which we want to raise a
  * specification exception.
  * specification exception.
  */
  */
-static void QEMU_NORETURN do_unaligned_access(CPUState *cs, uintptr_t retaddr)
+static G_NORETURN
+void do_unaligned_access(CPUState *cs, uintptr_t retaddr)
 {
 {
     S390CPU *cpu = S390_CPU(cs);
     S390CPU *cpu = S390_CPU(cs);
     CPUS390XState *env = &cpu->env;
     CPUS390XState *env = &cpu->env;
@@ -620,9 +621,10 @@ void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
     do_unaligned_access(cs, retaddr);
     do_unaligned_access(cs, retaddr);
 }
 }
 
 
-static void QEMU_NORETURN monitor_event(CPUS390XState *env,
-                                        uint64_t monitor_code,
-                                        uint8_t monitor_class, uintptr_t ra)
+static G_NORETURN
+void monitor_event(CPUS390XState *env,
+                   uint64_t monitor_code,
+                   uint8_t monitor_class, uintptr_t ra)
 {
 {
     /* Store the Monitor Code and the Monitor Class Number into the lowcore */
     /* Store the Monitor Code and the Monitor Class Number into the lowcore */
     stq_phys(env_cpu(env)->as,
     stq_phys(env_cpu(env)->as,

+ 6 - 6
target/s390x/tcg/tcg_s390x.h

@@ -14,11 +14,11 @@
 #define TCG_S390X_H
 #define TCG_S390X_H
 
 
 void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque);
 void tcg_s390_tod_updated(CPUState *cs, run_on_cpu_data opaque);
-void QEMU_NORETURN tcg_s390_program_interrupt(CPUS390XState *env,
-                                              uint32_t code, uintptr_t ra);
-void QEMU_NORETURN tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
-                                           uintptr_t ra);
-void QEMU_NORETURN tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc,
-                                             uintptr_t ra);
+G_NORETURN void tcg_s390_program_interrupt(CPUS390XState *env,
+                                           uint32_t code, uintptr_t ra);
+G_NORETURN void tcg_s390_data_exception(CPUS390XState *env, uint32_t dxc,
+                                        uintptr_t ra);
+G_NORETURN void tcg_s390_vector_exception(CPUS390XState *env, uint32_t vxc,
+                                          uintptr_t ra);
 
 
 #endif /* TCG_S390X_H */
 #endif /* TCG_S390X_H */

+ 3 - 3
target/sh4/cpu.h

@@ -210,9 +210,9 @@ void superh_cpu_dump_state(CPUState *cpu, FILE *f, int flags);
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 hwaddr superh_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int superh_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 int superh_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                    MMUAccessType access_type, int mmu_idx,
-                                    uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void superh_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                               MMUAccessType access_type, int mmu_idx,
+                                               uintptr_t retaddr);
 
 
 void sh4_translate_init(void);
 void sh4_translate_init(void);
 void sh4_cpu_list(void);
 void sh4_cpu_list(void);

+ 3 - 2
target/sh4/op_helper.c

@@ -57,8 +57,9 @@ void helper_ldtlb(CPUSH4State *env)
 #endif
 #endif
 }
 }
 
 
-static inline void QEMU_NORETURN raise_exception(CPUSH4State *env, int index,
-                                                 uintptr_t retaddr)
+static inline G_NORETURN
+void raise_exception(CPUSH4State *env, int index,
+                     uintptr_t retaddr)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
 
 

+ 5 - 5
target/sparc/cpu.h

@@ -575,11 +575,11 @@ void sparc_cpu_do_interrupt(CPUState *cpu);
 hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 hwaddr sparc_cpu_get_phys_page_debug(CPUState *cpu, vaddr addr);
 int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int sparc_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 int sparc_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                                 MMUAccessType access_type,
-                                                 int mmu_idx,
-                                                 uintptr_t retaddr);
-void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t) QEMU_NORETURN;
+G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                              MMUAccessType access_type,
+                                              int mmu_idx,
+                                              uintptr_t retaddr);
+G_NORETURN void cpu_raise_exception_ra(CPUSPARCState *, int, uintptr_t);
 
 
 #ifndef NO_CPU_IO_DEFS
 #ifndef NO_CPU_IO_DEFS
 /* cpu_init.c */
 /* cpu_init.c */

+ 4 - 4
target/sparc/mmu_helper.c

@@ -925,10 +925,10 @@ hwaddr sparc_cpu_get_phys_page_debug(CPUState *cs, vaddr addr)
 }
 }
 
 
 #ifndef CONFIG_USER_ONLY
 #ifndef CONFIG_USER_ONLY
-void QEMU_NORETURN sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
-                                                 MMUAccessType access_type,
-                                                 int mmu_idx,
-                                                 uintptr_t retaddr)
+G_NORETURN void sparc_cpu_do_unaligned_access(CPUState *cs, vaddr addr,
+                                              MMUAccessType access_type,
+                                              int mmu_idx,
+                                              uintptr_t retaddr)
 {
 {
     SPARCCPU *cpu = SPARC_CPU(cs);
     SPARCCPU *cpu = SPARC_CPU(cs);
     CPUSPARCState *env = &cpu->env;
     CPUSPARCState *env = &cpu->env;

+ 3 - 3
target/tricore/op_helper.c

@@ -25,9 +25,9 @@
 
 
 /* Exception helpers */
 /* Exception helpers */
 
 
-static void QEMU_NORETURN
-raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
-                              uintptr_t pc, uint32_t fcd_pc)
+static G_NORETURN
+void raise_exception_sync_internal(CPUTriCoreState *env, uint32_t class, int tin,
+                                   uintptr_t pc, uint32_t fcd_pc)
 {
 {
     CPUState *cs = env_cpu(env);
     CPUState *cs = env_cpu(env);
     /* in case we come from a helper-call we need to restore the PC */
     /* in case we come from a helper-call we need to restore the PC */

+ 3 - 3
target/xtensa/cpu.h

@@ -581,9 +581,9 @@ void xtensa_count_regs(const XtensaConfig *config,
                        unsigned *n_regs, unsigned *n_core_regs);
                        unsigned *n_regs, unsigned *n_core_regs);
 int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int xtensa_cpu_gdb_read_register(CPUState *cpu, GByteArray *buf, int reg);
 int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
 int xtensa_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg);
-void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
-                                    MMUAccessType access_type, int mmu_idx,
-                                    uintptr_t retaddr) QEMU_NORETURN;
+G_NORETURN void xtensa_cpu_do_unaligned_access(CPUState *cpu, vaddr addr,
+                                               MMUAccessType access_type, int mmu_idx,
+                                               uintptr_t retaddr);
 
 
 #define cpu_list xtensa_cpu_list
 #define cpu_list xtensa_cpu_list
 
 

+ 2 - 1
tcg/tcg.c

@@ -320,7 +320,8 @@ static void set_jmp_reset_offset(TCGContext *s, int which)
 }
 }
 
 
 /* Signal overflow, starting over with fewer guest insns. */
 /* Signal overflow, starting over with fewer guest insns. */
-static void QEMU_NORETURN tcg_raise_tb_overflow(TCGContext *s)
+static G_NORETURN
+void tcg_raise_tb_overflow(TCGContext *s)
 {
 {
     siglongjmp(s->jmp_trans, -2);
     siglongjmp(s->jmp_trans, -2);
 }
 }

+ 2 - 1
tests/fp/fp-bench.c

@@ -545,7 +545,8 @@ static int round_name_to_mode(const char *name)
     return -1;
     return -1;
 }
 }
 
 
-static void QEMU_NORETURN die_host_rounding(enum rounding rounding)
+static G_NORETURN
+void die_host_rounding(enum rounding rounding)
 {
 {
     fprintf(stderr, "fatal: '%s' rounding not supported on this host\n",
     fprintf(stderr, "fatal: '%s' rounding not supported on this host\n",
             round_names[rounding]);
             round_names[rounding]);

+ 2 - 1
tests/fp/fp-test.c

@@ -921,7 +921,8 @@ static void parse_args(int argc, char *argv[])
     }
     }
 }
 }
 
 
-static void QEMU_NORETURN run_test(void)
+static G_NORETURN
+void run_test(void)
 {
 {
     unsigned int i;
     unsigned int i;