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@@ -9,19 +9,19 @@
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/* MIPSnet register offsets */
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-#define MIPSNET_DEV_ID 0x00
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-#define MIPSNET_BUSY 0x08
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-#define MIPSNET_RX_DATA_COUNT 0x0c
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-#define MIPSNET_TX_DATA_COUNT 0x10
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-#define MIPSNET_INT_CTL 0x14
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-# define MIPSNET_INTCTL_TXDONE 0x00000001
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-# define MIPSNET_INTCTL_RXDONE 0x00000002
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-# define MIPSNET_INTCTL_TESTBIT 0x80000000
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-#define MIPSNET_INTERRUPT_INFO 0x18
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-#define MIPSNET_RX_DATA_BUFFER 0x1c
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-#define MIPSNET_TX_DATA_BUFFER 0x20
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-
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-#define MAX_ETH_FRAME_SIZE 1514
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+#define MIPSNET_DEV_ID 0x00
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+#define MIPSNET_BUSY 0x08
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+#define MIPSNET_RX_DATA_COUNT 0x0c
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+#define MIPSNET_TX_DATA_COUNT 0x10
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+#define MIPSNET_INT_CTL 0x14
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+# define MIPSNET_INTCTL_TXDONE 0x00000001
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+# define MIPSNET_INTCTL_RXDONE 0x00000002
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+# define MIPSNET_INTCTL_TESTBIT 0x80000000
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+#define MIPSNET_INTERRUPT_INFO 0x18
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+#define MIPSNET_RX_DATA_BUFFER 0x1c
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+#define MIPSNET_TX_DATA_BUFFER 0x20
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+
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+#define MAX_ETH_FRAME_SIZE 1514
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#define TYPE_MIPS_NET "mipsnet"
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#define MIPS_NET(obj) OBJECT_CHECK(MIPSnetState, (obj), TYPE_MIPS_NET)
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@@ -64,8 +64,9 @@ static void mipsnet_update_irq(MIPSnetState *s)
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static int mipsnet_buffer_full(MIPSnetState *s)
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{
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- if (s->rx_count >= MAX_ETH_FRAME_SIZE)
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+ if (s->rx_count >= MAX_ETH_FRAME_SIZE) {
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return 1;
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+ }
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return 0;
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}
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@@ -73,18 +74,21 @@ static int mipsnet_can_receive(NetClientState *nc)
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{
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MIPSnetState *s = qemu_get_nic_opaque(nc);
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- if (s->busy)
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+ if (s->busy) {
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return 0;
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+ }
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return !mipsnet_buffer_full(s);
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}
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-static ssize_t mipsnet_receive(NetClientState *nc, const uint8_t *buf, size_t size)
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+static ssize_t mipsnet_receive(NetClientState *nc,
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+ const uint8_t *buf, size_t size)
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{
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MIPSnetState *s = qemu_get_nic_opaque(nc);
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trace_mipsnet_receive(size);
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- if (!mipsnet_can_receive(nc))
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+ if (!mipsnet_can_receive(nc)) {
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return 0;
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+ }
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if (size >= sizeof(s->rx_buffer)) {
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return 0;
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@@ -115,10 +119,10 @@ static uint64_t mipsnet_ioport_read(void *opaque, hwaddr addr,
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addr &= 0x3f;
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switch (addr) {
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case MIPSNET_DEV_ID:
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- ret = be32_to_cpu(0x4d495053); /* MIPS */
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+ ret = be32_to_cpu(0x4d495053); /* MIPS */
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break;
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case MIPSNET_DEV_ID + 4:
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- ret = be32_to_cpu(0x4e455430); /* NET0 */
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+ ret = be32_to_cpu(0x4e455430); /* NET0 */
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break;
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case MIPSNET_BUSY:
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ret = s->busy;
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