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@@ -229,7 +229,6 @@ void helper_rdmsr(CPUX86State *env)
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#else
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void helper_wrmsr(CPUX86State *env)
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{
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- X86CPU *x86_cpu = env_archcpu(env);
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uint64_t val;
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cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 1, GETPC());
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@@ -372,9 +371,6 @@ void helper_wrmsr(CPUX86State *env)
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env->msr_bndcfgs = val;
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cpu_sync_bndcs_hflags(env);
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break;
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- case MSR_IA32_UCODE_REV:
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- val = x86_cpu->ucode_rev;
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- break;
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default:
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if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL
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&& (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL +
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@@ -393,6 +389,7 @@ void helper_wrmsr(CPUX86State *env)
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void helper_rdmsr(CPUX86State *env)
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{
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+ X86CPU *x86_cpu = env_archcpu(env);
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uint64_t val;
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cpu_svm_check_intercept_param(env, SVM_EXIT_MSR, 0, GETPC());
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@@ -526,6 +523,9 @@ void helper_rdmsr(CPUX86State *env)
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case MSR_IA32_BNDCFGS:
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val = env->msr_bndcfgs;
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break;
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+ case MSR_IA32_UCODE_REV:
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+ val = x86_cpu->ucode_rev;
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+ break;
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default:
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if ((uint32_t)env->regs[R_ECX] >= MSR_MC0_CTL
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&& (uint32_t)env->regs[R_ECX] < MSR_MC0_CTL +
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