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@@ -276,7 +276,7 @@ uint8_t *spd_data_generate(enum sdram_type type, ram_addr_t ram_size)
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spd[18] = 12; /* ~CAS latencies supported */
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spd[18] = 12; /* ~CAS latencies supported */
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spd[19] = (type == DDR2 ? 0 : 1); /* reserved / ~CS latencies supported */
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spd[19] = (type == DDR2 ? 0 : 1); /* reserved / ~CS latencies supported */
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spd[20] = 2; /* DIMM type / ~WE latencies */
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spd[20] = 2; /* DIMM type / ~WE latencies */
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- /* module features */
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+ spd[21] = (type < DDR2 ? 0x20 : 0); /* module features */
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/* memory chip features */
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/* memory chip features */
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spd[23] = 0x12; /* clock cycle time @ medium CAS latency */
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spd[23] = 0x12; /* clock cycle time @ medium CAS latency */
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/* data access time */
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/* data access time */
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