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@@ -742,6 +742,7 @@ static void sdhci_do_adma(SDHCIState *s)
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unsigned int begin, length;
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unsigned int begin, length;
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const uint16_t block_size = s->blksize & BLOCK_SIZE_MASK;
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const uint16_t block_size = s->blksize & BLOCK_SIZE_MASK;
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ADMADescr dscr = {};
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ADMADescr dscr = {};
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+ MemTxResult res;
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int i;
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int i;
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if (s->trnmod & SDHC_TRNS_BLK_CNT_EN && !s->blkcnt) {
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if (s->trnmod & SDHC_TRNS_BLK_CNT_EN && !s->blkcnt) {
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@@ -790,10 +791,13 @@ static void sdhci_do_adma(SDHCIState *s)
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s->data_count = block_size;
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s->data_count = block_size;
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length -= block_size - begin;
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length -= block_size - begin;
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}
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}
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- dma_memory_write(s->dma_as, dscr.addr,
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- &s->fifo_buffer[begin],
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- s->data_count - begin,
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- MEMTXATTRS_UNSPECIFIED);
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+ res = dma_memory_write(s->dma_as, dscr.addr,
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+ &s->fifo_buffer[begin],
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+ s->data_count - begin,
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+ MEMTXATTRS_UNSPECIFIED);
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+ if (res != MEMTX_OK) {
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+ break;
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+ }
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dscr.addr += s->data_count - begin;
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dscr.addr += s->data_count - begin;
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if (s->data_count == block_size) {
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if (s->data_count == block_size) {
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s->data_count = 0;
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s->data_count = 0;
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@@ -816,10 +820,13 @@ static void sdhci_do_adma(SDHCIState *s)
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s->data_count = block_size;
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s->data_count = block_size;
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length -= block_size - begin;
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length -= block_size - begin;
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}
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}
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- dma_memory_read(s->dma_as, dscr.addr,
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- &s->fifo_buffer[begin],
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- s->data_count - begin,
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- MEMTXATTRS_UNSPECIFIED);
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+ res = dma_memory_read(s->dma_as, dscr.addr,
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+ &s->fifo_buffer[begin],
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+ s->data_count - begin,
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+ MEMTXATTRS_UNSPECIFIED);
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+ if (res != MEMTX_OK) {
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+ break;
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+ }
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dscr.addr += s->data_count - begin;
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dscr.addr += s->data_count - begin;
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if (s->data_count == block_size) {
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if (s->data_count == block_size) {
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sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
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sdbus_write_data(&s->sdbus, s->fifo_buffer, block_size);
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@@ -833,7 +840,16 @@ static void sdhci_do_adma(SDHCIState *s)
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}
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}
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}
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}
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}
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}
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- s->admasysaddr += dscr.incr;
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+ if (res != MEMTX_OK) {
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+ if (s->errintstsen & SDHC_EISEN_ADMAERR) {
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+ trace_sdhci_error("Set ADMA error flag");
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+ s->errintsts |= SDHC_EIS_ADMAERR;
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+ s->norintsts |= SDHC_NIS_ERR;
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+ }
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+ sdhci_update_irq(s);
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+ } else {
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+ s->admasysaddr += dscr.incr;
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+ }
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break;
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break;
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case SDHC_ADMA_ATTR_ACT_LINK: /* link to next descriptor table */
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case SDHC_ADMA_ATTR_ACT_LINK: /* link to next descriptor table */
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s->admasysaddr = dscr.addr;
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s->admasysaddr = dscr.addr;
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