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@@ -63,6 +63,12 @@
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#define PA_VERREG 0x32
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#define PA_VERREG 0x32
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#define PA_OUTPORT 0x36
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#define PA_OUTPORT 0x36
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+enum r2d_fpga_irq {
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+ PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T,
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+ SDCARD, PCI_INTA, PCI_INTB, EXT, TP,
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+ NR_IRQS
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+};
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+
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typedef struct {
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typedef struct {
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uint16_t bcr;
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uint16_t bcr;
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uint16_t irlmsk;
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uint16_t irlmsk;
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@@ -88,15 +94,10 @@ typedef struct {
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/* output pin */
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/* output pin */
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qemu_irq irl;
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qemu_irq irl;
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+ IRQState irq[NR_IRQS];
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MemoryRegion iomem;
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MemoryRegion iomem;
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} r2d_fpga_t;
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} r2d_fpga_t;
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-enum r2d_fpga_irq {
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- PCI_INTD, CF_IDE, CF_CD, PCI_INTC, SM501, KEY, RTC_A, RTC_T,
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- SDCARD, PCI_INTA, PCI_INTB, EXT, TP,
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- NR_IRQS
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-};
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-
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static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = {
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static const struct { short irl; uint16_t msk; } irqtab[NR_IRQS] = {
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[CF_IDE] = { 1, 1 << 9 },
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[CF_IDE] = { 1, 1 << 9 },
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[CF_CD] = { 2, 1 << 8 },
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[CF_CD] = { 2, 1 << 8 },
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@@ -186,8 +187,8 @@ static const MemoryRegionOps r2d_fpga_ops = {
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.endianness = DEVICE_NATIVE_ENDIAN,
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.endianness = DEVICE_NATIVE_ENDIAN,
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};
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};
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-static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
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- hwaddr base, qemu_irq irl)
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+static r2d_fpga_t *r2d_fpga_init(MemoryRegion *sysmem,
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+ hwaddr base, qemu_irq irl)
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{
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{
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r2d_fpga_t *s;
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r2d_fpga_t *s;
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@@ -197,7 +198,10 @@ static qemu_irq *r2d_fpga_init(MemoryRegion *sysmem,
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memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
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memory_region_init_io(&s->iomem, NULL, &r2d_fpga_ops, s, "r2d-fpga", 0x40);
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memory_region_add_subregion(sysmem, base, &s->iomem);
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memory_region_add_subregion(sysmem, base, &s->iomem);
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- return qemu_allocate_irqs(r2d_fpga_irq_set, s, NR_IRQS);
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+
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+ qemu_init_irqs(s->irq, NR_IRQS, r2d_fpga_irq_set, s);
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+
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+ return s;
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}
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}
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typedef struct ResetData {
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typedef struct ResetData {
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@@ -239,13 +243,13 @@ static void r2d_init(MachineState *machine)
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ResetData *reset_info;
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ResetData *reset_info;
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struct SH7750State *s;
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struct SH7750State *s;
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MemoryRegion *sdram = g_new(MemoryRegion, 1);
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MemoryRegion *sdram = g_new(MemoryRegion, 1);
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- qemu_irq *irq;
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DriveInfo *dinfo;
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DriveInfo *dinfo;
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DeviceState *dev;
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DeviceState *dev;
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SysBusDevice *busdev;
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SysBusDevice *busdev;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *address_space_mem = get_system_memory();
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PCIBus *pci_bus;
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PCIBus *pci_bus;
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USBBus *usb_bus;
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USBBus *usb_bus;
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+ r2d_fpga_t *fpga;
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cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
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cpu = SUPERH_CPU(cpu_create(machine->cpu_type));
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env = &cpu->env;
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env = &cpu->env;
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@@ -260,7 +264,7 @@ static void r2d_init(MachineState *machine)
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memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
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memory_region_add_subregion(address_space_mem, SDRAM_BASE, sdram);
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/* Register peripherals */
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/* Register peripherals */
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s = sh7750_init(cpu, address_space_mem);
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s = sh7750_init(cpu, address_space_mem);
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- irq = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
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+ fpga = r2d_fpga_init(address_space_mem, 0x04000000, sh7750_irl(s));
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dev = qdev_new("sh_pci");
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dev = qdev_new("sh_pci");
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busdev = SYS_BUS_DEVICE(dev);
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busdev = SYS_BUS_DEVICE(dev);
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@@ -268,10 +272,10 @@ static void r2d_init(MachineState *machine)
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pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
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pci_bus = PCI_BUS(qdev_get_child_bus(dev, "pci"));
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sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
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sysbus_mmio_map(busdev, 0, P4ADDR(0x1e200000));
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sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
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sysbus_mmio_map(busdev, 1, A7ADDR(0x1e200000));
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- sysbus_connect_irq(busdev, 0, irq[PCI_INTA]);
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- sysbus_connect_irq(busdev, 1, irq[PCI_INTB]);
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- sysbus_connect_irq(busdev, 2, irq[PCI_INTC]);
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- sysbus_connect_irq(busdev, 3, irq[PCI_INTD]);
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+ sysbus_connect_irq(busdev, 0, &fpga->irq[PCI_INTA]);
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+ sysbus_connect_irq(busdev, 1, &fpga->irq[PCI_INTB]);
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+ sysbus_connect_irq(busdev, 2, &fpga->irq[PCI_INTC]);
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+ sysbus_connect_irq(busdev, 3, &fpga->irq[PCI_INTD]);
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dev = qdev_new("sysbus-sm501");
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dev = qdev_new("sysbus-sm501");
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busdev = SYS_BUS_DEVICE(dev);
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busdev = SYS_BUS_DEVICE(dev);
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@@ -281,13 +285,13 @@ static void r2d_init(MachineState *machine)
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sysbus_realize_and_unref(busdev, &error_fatal);
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sysbus_realize_and_unref(busdev, &error_fatal);
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sysbus_mmio_map(busdev, 0, 0x10000000);
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sysbus_mmio_map(busdev, 0, 0x10000000);
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sysbus_mmio_map(busdev, 1, 0x13e00000);
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sysbus_mmio_map(busdev, 1, 0x13e00000);
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- sysbus_connect_irq(busdev, 0, irq[SM501]);
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+ sysbus_connect_irq(busdev, 0, &fpga->irq[SM501]);
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/* onboard CF (True IDE mode, Master only). */
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/* onboard CF (True IDE mode, Master only). */
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dinfo = drive_get(IF_IDE, 0, 0);
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dinfo = drive_get(IF_IDE, 0, 0);
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dev = qdev_new("mmio-ide");
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dev = qdev_new("mmio-ide");
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busdev = SYS_BUS_DEVICE(dev);
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busdev = SYS_BUS_DEVICE(dev);
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- sysbus_connect_irq(busdev, 0, irq[CF_IDE]);
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+ sysbus_connect_irq(busdev, 0, &fpga->irq[CF_IDE]);
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qdev_prop_set_uint32(dev, "shift", 1);
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qdev_prop_set_uint32(dev, "shift", 1);
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sysbus_realize_and_unref(busdev, &error_fatal);
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sysbus_realize_and_unref(busdev, &error_fatal);
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sysbus_mmio_map(busdev, 0, 0x14001000);
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sysbus_mmio_map(busdev, 0, 0x14001000);
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