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@@ -12,6 +12,8 @@
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#include <zlib.h> /* For crc32 */
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#include <zlib.h> /* For crc32 */
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#include "exec/semihost.h"
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#include "exec/semihost.h"
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+#define ARM_CPU_FREQ 1000000000 /* FIXME: 1 GHz, should be configurable */
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+
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#ifndef CONFIG_USER_ONLY
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#ifndef CONFIG_USER_ONLY
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static inline bool get_phys_addr(CPUARMState *env, target_ulong address,
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static inline bool get_phys_addr(CPUARMState *env, target_ulong address,
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int access_type, ARMMMUIdx mmu_idx,
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int access_type, ARMMMUIdx mmu_idx,
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@@ -706,8 +708,8 @@ void pmccntr_sync(CPUARMState *env)
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{
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{
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uint64_t temp_ticks;
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uint64_t temp_ticks;
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- temp_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
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- get_ticks_per_sec(), 1000000);
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+ temp_ticks = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
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+ ARM_CPU_FREQ, NANOSECONDS_PER_SECOND);
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if (env->cp15.c9_pmcr & PMCRD) {
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if (env->cp15.c9_pmcr & PMCRD) {
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/* Increment once every 64 processor clock cycles */
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/* Increment once every 64 processor clock cycles */
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@@ -745,8 +747,8 @@ static uint64_t pmccntr_read(CPUARMState *env, const ARMCPRegInfo *ri)
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return env->cp15.c15_ccnt;
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return env->cp15.c15_ccnt;
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}
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}
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- total_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
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- get_ticks_per_sec(), 1000000);
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+ total_ticks = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
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+ ARM_CPU_FREQ, NANOSECONDS_PER_SECOND);
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if (env->cp15.c9_pmcr & PMCRD) {
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if (env->cp15.c9_pmcr & PMCRD) {
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/* Increment once every 64 processor clock cycles */
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/* Increment once every 64 processor clock cycles */
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@@ -766,8 +768,8 @@ static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri,
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return;
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return;
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}
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}
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- total_ticks = muldiv64(qemu_clock_get_us(QEMU_CLOCK_VIRTUAL),
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- get_ticks_per_sec(), 1000000);
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+ total_ticks = muldiv64(qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL),
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+ ARM_CPU_FREQ, NANOSECONDS_PER_SECOND);
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if (env->cp15.c9_pmcr & PMCRD) {
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if (env->cp15.c9_pmcr & PMCRD) {
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/* Increment once every 64 processor clock cycles */
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/* Increment once every 64 processor clock cycles */
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