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@@ -689,17 +689,6 @@ static void armsse_forward_sec_resp_cfg(ARMSSE *s)
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qdev_connect_gpio_out(dev_splitter, 2, s->sec_resp_cfg_in);
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}
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-static void armsse_mainclk_update(void *opaque, ClockEvent event)
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-{
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- ARMSSE *s = ARM_SSE(opaque);
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-
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- /*
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- * Set system_clock_scale from our Clock input; this is what
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- * controls the tick rate of the CPU SysTick timer.
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- */
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- system_clock_scale = clock_ticks_to_ns(s->mainclk, 1);
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-}
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-
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static void armsse_init(Object *obj)
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{
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ARMSSE *s = ARM_SSE(obj);
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@@ -711,8 +700,7 @@ static void armsse_init(Object *obj)
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assert(info->sram_banks <= MAX_SRAM_BANKS);
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assert(info->num_cpus <= SSE_MAX_CPUS);
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- s->mainclk = qdev_init_clock_in(DEVICE(s), "MAINCLK",
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- armsse_mainclk_update, s, ClockUpdate);
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+ s->mainclk = qdev_init_clock_in(DEVICE(s), "MAINCLK", NULL, NULL, 0);
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s->s32kclk = qdev_init_clock_in(DEVICE(s), "S32KCLK", NULL, NULL, 0);
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memory_region_init(&s->container, obj, "armsse-container", UINT64_MAX);
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@@ -1654,9 +1642,6 @@ static void armsse_realize(DeviceState *dev, Error **errp)
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* devices in the ARMSSE.
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*/
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sysbus_init_mmio(SYS_BUS_DEVICE(s), &s->container);
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-
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- /* Set initial system_clock_scale from MAINCLK */
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- armsse_mainclk_update(s, ClockUpdate);
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}
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static void armsse_idau_check(IDAUInterface *ii, uint32_t address,
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