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@@ -29,13 +29,6 @@
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/* #define DEBUG_MIIM */
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/* #define DEBUG_MIIM */
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-#define MIIM_CONTROL 0
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-#define MIIM_STATUS 1
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-#define MIIM_PHY_ID_1 2
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-#define MIIM_PHY_ID_2 3
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-#define MIIM_T2_STATUS 10
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-#define MIIM_EXT_STATUS 15
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-
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static void miim_read_cycle(eTSEC *etsec)
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static void miim_read_cycle(eTSEC *etsec)
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{
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{
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uint8_t phy;
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uint8_t phy;
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@@ -47,14 +40,14 @@ static void miim_read_cycle(eTSEC *etsec)
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addr = etsec->regs[MIIMADD].value & 0x1F;
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addr = etsec->regs[MIIMADD].value & 0x1F;
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switch (addr) {
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switch (addr) {
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- case MIIM_CONTROL:
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+ case MII_BMCR:
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value = etsec->phy_control;
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value = etsec->phy_control;
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break;
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break;
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- case MIIM_STATUS:
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+ case MII_BMSR:
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value = etsec->phy_status;
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value = etsec->phy_status;
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break;
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break;
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- case MIIM_T2_STATUS:
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- value = 0x1800; /* Local and remote receivers OK */
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+ case MII_STAT1000:
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+ value = MII_STAT1000_LOK | MII_STAT1000_ROK;
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break;
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break;
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default:
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default:
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value = 0x0;
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value = 0x0;
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@@ -84,8 +77,8 @@ static void miim_write_cycle(eTSEC *etsec)
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#endif
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#endif
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switch (addr) {
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switch (addr) {
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- case MIIM_CONTROL:
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- etsec->phy_control = value & ~(0x8100);
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+ case MII_BMCR:
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+ etsec->phy_control = value & ~(MII_BMCR_RESET | MII_BMCR_FD);
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break;
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break;
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default:
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default:
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break;
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break;
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