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@@ -246,7 +246,7 @@ static uint64_t pci_vpb_reg_read(void *opaque, hwaddr addr,
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static const MemoryRegionOps pci_vpb_reg_ops = {
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static const MemoryRegionOps pci_vpb_reg_ops = {
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.read = pci_vpb_reg_read,
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.read = pci_vpb_reg_read,
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.write = pci_vpb_reg_write,
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.write = pci_vpb_reg_write,
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- .endianness = DEVICE_NATIVE_ENDIAN,
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+ .endianness = DEVICE_LITTLE_ENDIAN,
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.valid = {
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.valid = {
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.min_access_size = 4,
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.min_access_size = 4,
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.max_access_size = 4,
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.max_access_size = 4,
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@@ -312,7 +312,7 @@ static uint64_t pci_vpb_config_read(void *opaque, hwaddr addr,
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static const MemoryRegionOps pci_vpb_config_ops = {
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static const MemoryRegionOps pci_vpb_config_ops = {
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.read = pci_vpb_config_read,
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.read = pci_vpb_config_read,
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.write = pci_vpb_config_write,
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.write = pci_vpb_config_write,
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- .endianness = DEVICE_NATIVE_ENDIAN,
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+ .endianness = DEVICE_LITTLE_ENDIAN,
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};
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};
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static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
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static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
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