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@@ -795,6 +795,8 @@ static uint64_t sm501_system_config_read(void *opaque, hwaddr addr,
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case SM501_ARBTRTN_CONTROL:
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ret = s->arbitration_control;
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break;
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+ case SM501_COMMAND_LIST_STATUS:
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+ ret = 0x00180002; /* FIFOs are empty, everything idle */
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case SM501_IRQ_MASK:
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ret = s->irq_mask;
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break;
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@@ -812,6 +814,9 @@ static uint64_t sm501_system_config_read(void *opaque, hwaddr addr,
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case SM501_POWER_MODE_CONTROL:
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ret = s->power_mode_control;
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break;
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+ case SM501_ENDIAN_CONTROL:
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+ ret = 0; /* Only default little endian mode is supported */
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+ break;
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default:
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printf("sm501 system config : not implemented register read."
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@@ -865,6 +870,12 @@ static void sm501_system_config_write(void *opaque, hwaddr addr,
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case SM501_POWER_MODE_CONTROL:
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s->power_mode_control = value & 0x00000003;
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break;
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+ case SM501_ENDIAN_CONTROL:
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+ if (value & 0x00000001) {
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+ printf("sm501 system config : big endian mode not implemented.\n");
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+ abort();
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+ }
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+ break;
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default:
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printf("sm501 system config : not implemented register write."
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@@ -924,6 +935,9 @@ static uint64_t sm501_disp_ctrl_read(void *opaque, hwaddr addr,
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case SM501_DC_PANEL_PANNING_CONTROL:
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ret = s->dc_panel_panning_control;
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break;
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+ case SM501_DC_PANEL_COLOR_KEY:
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+ /* Not implemented yet */
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+ break;
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case SM501_DC_PANEL_FB_ADDR:
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ret = s->dc_panel_fb_addr;
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break;
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@@ -1035,6 +1049,9 @@ static void sm501_disp_ctrl_write(void *opaque, hwaddr addr,
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case SM501_DC_PANEL_PANNING_CONTROL:
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s->dc_panel_panning_control = value & 0xFF3FFF3F;
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break;
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+ case SM501_DC_PANEL_COLOR_KEY:
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+ /* Not implemented yet */
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+ break;
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case SM501_DC_PANEL_FB_ADDR:
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s->dc_panel_fb_addr = value & 0x8FFFFFF0;
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break;
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