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@@ -699,8 +699,8 @@ static void pnv_ipmi_bt_init(ISABus *bus, IPMIBmc *bmc, uint32_t irq)
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{
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ISADevice *dev = isa_new("isa-ipmi-bt");
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- object_property_set_link(OBJECT(dev), OBJECT(bmc), "bmc", &error_fatal);
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- object_property_set_int(OBJECT(dev), irq, "irq", &error_fatal);
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+ object_property_set_link(OBJECT(dev), "bmc", OBJECT(bmc), &error_fatal);
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+ object_property_set_int(OBJECT(dev), "irq", irq, &error_fatal);
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isa_realize_and_unref(dev, bus, &error_fatal);
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}
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@@ -828,27 +828,27 @@ static void pnv_init(MachineState *machine)
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* way to specify different ranges for each chip
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*/
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if (i == 0) {
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- object_property_set_int(chip, machine->ram_size, "ram-size",
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+ object_property_set_int(chip, "ram-size", machine->ram_size,
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&error_fatal);
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}
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snprintf(chip_name, sizeof(chip_name), "chip[%d]", PNV_CHIP_HWID(i));
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object_property_add_child(OBJECT(pnv), chip_name, chip);
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- object_property_set_int(chip, PNV_CHIP_HWID(i), "chip-id",
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+ object_property_set_int(chip, "chip-id", PNV_CHIP_HWID(i),
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+ &error_fatal);
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+ object_property_set_int(chip, "nr-cores", machine->smp.cores,
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+ &error_fatal);
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+ object_property_set_int(chip, "nr-threads", machine->smp.threads,
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&error_fatal);
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- object_property_set_int(chip, machine->smp.cores,
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- "nr-cores", &error_fatal);
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- object_property_set_int(chip, machine->smp.threads,
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- "nr-threads", &error_fatal);
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/*
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* The POWER8 machine use the XICS interrupt interface.
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* Propagate the XICS fabric to the chip and its controllers.
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*/
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if (object_dynamic_cast(OBJECT(pnv), TYPE_XICS_FABRIC)) {
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- object_property_set_link(chip, OBJECT(pnv), "xics", &error_abort);
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+ object_property_set_link(chip, "xics", OBJECT(pnv), &error_abort);
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}
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if (object_dynamic_cast(OBJECT(pnv), TYPE_XIVE_FABRIC)) {
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- object_property_set_link(chip, OBJECT(pnv), "xive-fabric",
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+ object_property_set_link(chip, "xive-fabric", OBJECT(pnv),
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&error_abort);
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}
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sysbus_realize_and_unref(SYS_BUS_DEVICE(chip), &error_fatal);
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@@ -1136,10 +1136,10 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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}
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/* Processor Service Interface (PSI) Host Bridge */
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- object_property_set_int(OBJECT(&chip8->psi), PNV_PSIHB_BASE(chip),
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- "bar", &error_fatal);
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- object_property_set_link(OBJECT(&chip8->psi), OBJECT(chip8->xics),
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- ICS_PROP_XICS, &error_abort);
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+ object_property_set_int(OBJECT(&chip8->psi), "bar", PNV_PSIHB_BASE(chip),
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+ &error_fatal);
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+ object_property_set_link(OBJECT(&chip8->psi), ICS_PROP_XICS,
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+ OBJECT(chip8->xics), &error_abort);
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if (!qdev_realize(DEVICE(&chip8->psi), NULL, &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1148,7 +1148,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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&PNV_PSI(psi8)->xscom_regs);
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/* Create LPC controller */
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- object_property_set_link(OBJECT(&chip8->lpc), OBJECT(&chip8->psi), "psi",
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+ object_property_set_link(OBJECT(&chip8->lpc), "psi", OBJECT(&chip8->psi),
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&error_abort);
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qdev_realize(DEVICE(&chip8->lpc), NULL, &error_fatal);
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pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip8->lpc.xscom_regs);
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@@ -1168,7 +1168,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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}
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/* Create the simplified OCC model */
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- object_property_set_link(OBJECT(&chip8->occ), OBJECT(&chip8->psi), "psi",
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+ object_property_set_link(OBJECT(&chip8->occ), "psi", OBJECT(&chip8->psi),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip8->occ), NULL, &local_err)) {
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error_propagate(errp, local_err);
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@@ -1181,7 +1181,7 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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&chip8->occ.sram_regs);
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/* HOMER */
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- object_property_set_link(OBJECT(&chip8->homer), OBJECT(chip), "chip",
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+ object_property_set_link(OBJECT(&chip8->homer), "chip", OBJECT(chip),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip8->homer), NULL, &local_err)) {
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error_propagate(errp, local_err);
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@@ -1199,8 +1199,8 @@ static void pnv_chip_power8_realize(DeviceState *dev, Error **errp)
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PnvPHB3 *phb = &chip8->phbs[i];
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PnvPBCQState *pbcq = &phb->pbcq;
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- object_property_set_int(OBJECT(phb), i, "index", &error_fatal);
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- object_property_set_int(OBJECT(phb), chip->chip_id, "chip-id",
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+ object_property_set_int(OBJECT(phb), "index", i, &error_fatal);
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+ object_property_set_int(OBJECT(phb), "chip-id", chip->chip_id,
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&error_fatal);
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if (!sysbus_realize(SYS_BUS_DEVICE(phb), &local_err)) {
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error_propagate(errp, local_err);
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@@ -1347,7 +1347,7 @@ static void pnv_chip_quad_realize(Pnv9Chip *chip9, Error **errp)
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sizeof(*eq), TYPE_PNV_QUAD,
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&error_fatal, NULL);
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- object_property_set_int(OBJECT(eq), core_id, "id", &error_fatal);
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+ object_property_set_int(OBJECT(eq), "id", core_id, &error_fatal);
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qdev_realize(DEVICE(eq), NULL, &error_fatal);
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pnv_xscom_add_subregion(chip, PNV9_XSCOM_EQ_BASE(eq->id),
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@@ -1368,18 +1368,18 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp)
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uint32_t pec_nest_base;
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uint32_t pec_pci_base;
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- object_property_set_int(OBJECT(pec), i, "index", &error_fatal);
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+ object_property_set_int(OBJECT(pec), "index", i, &error_fatal);
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/*
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* PEC0 -> 1 stack
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* PEC1 -> 2 stacks
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* PEC2 -> 3 stacks
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*/
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- object_property_set_int(OBJECT(pec), i + 1, "num-stacks",
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+ object_property_set_int(OBJECT(pec), "num-stacks", i + 1,
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+ &error_fatal);
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+ object_property_set_int(OBJECT(pec), "chip-id", chip->chip_id,
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&error_fatal);
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- object_property_set_int(OBJECT(pec), chip->chip_id, "chip-id",
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- &error_fatal);
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- object_property_set_link(OBJECT(pec), OBJECT(get_system_memory()),
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- "system-memory", &error_abort);
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+ object_property_set_link(OBJECT(pec), "system-memory",
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+ OBJECT(get_system_memory()), &error_abort);
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if (!qdev_realize(DEVICE(pec), NULL, &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1396,14 +1396,15 @@ static void pnv_chip_power9_phb_realize(PnvChip *chip, Error **errp)
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PnvPhb4PecStack *stack = &pec->stacks[j];
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Object *obj = OBJECT(&stack->phb);
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- object_property_set_int(obj, phb_id, "index", &error_fatal);
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- object_property_set_int(obj, chip->chip_id, "chip-id",
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+ object_property_set_int(obj, "index", phb_id, &error_fatal);
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+ object_property_set_int(obj, "chip-id", chip->chip_id,
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&error_fatal);
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- object_property_set_int(obj, PNV_PHB4_VERSION, "version",
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+ object_property_set_int(obj, "version", PNV_PHB4_VERSION,
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&error_fatal);
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- object_property_set_int(obj, PNV_PHB4_DEVICE_ID, "device-id",
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+ object_property_set_int(obj, "device-id", PNV_PHB4_DEVICE_ID,
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&error_fatal);
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- object_property_set_link(obj, OBJECT(stack), "stack", &error_abort);
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+ object_property_set_link(obj, "stack", OBJECT(stack),
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+ &error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(obj), &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1453,15 +1454,15 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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}
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/* XIVE interrupt controller (POWER9) */
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- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_IC_BASE(chip),
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- "ic-bar", &error_fatal);
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- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_VC_BASE(chip),
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- "vc-bar", &error_fatal);
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- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_PC_BASE(chip),
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- "pc-bar", &error_fatal);
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- object_property_set_int(OBJECT(&chip9->xive), PNV9_XIVE_TM_BASE(chip),
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- "tm-bar", &error_fatal);
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- object_property_set_link(OBJECT(&chip9->xive), OBJECT(chip), "chip",
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+ object_property_set_int(OBJECT(&chip9->xive), "ic-bar",
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+ PNV9_XIVE_IC_BASE(chip), &error_fatal);
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+ object_property_set_int(OBJECT(&chip9->xive), "vc-bar",
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+ PNV9_XIVE_VC_BASE(chip), &error_fatal);
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+ object_property_set_int(OBJECT(&chip9->xive), "pc-bar",
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+ PNV9_XIVE_PC_BASE(chip), &error_fatal);
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+ object_property_set_int(OBJECT(&chip9->xive), "tm-bar",
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+ PNV9_XIVE_TM_BASE(chip), &error_fatal);
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+ object_property_set_link(OBJECT(&chip9->xive), "chip", OBJECT(chip),
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&error_abort);
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if (!sysbus_realize(SYS_BUS_DEVICE(&chip9->xive), &local_err)) {
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error_propagate(errp, local_err);
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@@ -1471,8 +1472,8 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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&chip9->xive.xscom_regs);
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/* Processor Service Interface (PSI) Host Bridge */
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- object_property_set_int(OBJECT(&chip9->psi), PNV9_PSIHB_BASE(chip),
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- "bar", &error_fatal);
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+ object_property_set_int(OBJECT(&chip9->psi), "bar", PNV9_PSIHB_BASE(chip),
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+ &error_fatal);
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if (!qdev_realize(DEVICE(&chip9->psi), NULL, &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1481,7 +1482,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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&PNV_PSI(psi9)->xscom_regs);
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/* LPC */
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- object_property_set_link(OBJECT(&chip9->lpc), OBJECT(&chip9->psi), "psi",
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+ object_property_set_link(OBJECT(&chip9->lpc), "psi", OBJECT(&chip9->psi),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip9->lpc), NULL, &local_err)) {
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error_propagate(errp, local_err);
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@@ -1494,7 +1495,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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(uint64_t) PNV9_LPCM_BASE(chip));
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/* Create the simplified OCC model */
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- object_property_set_link(OBJECT(&chip9->occ), OBJECT(&chip9->psi), "psi",
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+ object_property_set_link(OBJECT(&chip9->occ), "psi", OBJECT(&chip9->psi),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip9->occ), NULL, &local_err)) {
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error_propagate(errp, local_err);
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@@ -1507,7 +1508,7 @@ static void pnv_chip_power9_realize(DeviceState *dev, Error **errp)
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&chip9->occ.sram_regs);
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/* HOMER */
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- object_property_set_link(OBJECT(&chip9->homer), OBJECT(chip), "chip",
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+ object_property_set_link(OBJECT(&chip9->homer), "chip", OBJECT(chip),
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&error_abort);
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if (!qdev_realize(DEVICE(&chip9->homer), NULL, &local_err)) {
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error_propagate(errp, local_err);
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@@ -1588,8 +1589,8 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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}
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/* Processor Service Interface (PSI) Host Bridge */
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- object_property_set_int(OBJECT(&chip10->psi), PNV10_PSIHB_BASE(chip),
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- "bar", &error_fatal);
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+ object_property_set_int(OBJECT(&chip10->psi), "bar",
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+ PNV10_PSIHB_BASE(chip), &error_fatal);
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if (!qdev_realize(DEVICE(&chip10->psi), NULL, &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1598,8 +1599,8 @@ static void pnv_chip_power10_realize(DeviceState *dev, Error **errp)
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&PNV_PSI(&chip10->psi)->xscom_regs);
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/* LPC */
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- object_property_set_link(OBJECT(&chip10->lpc), OBJECT(&chip10->psi), "psi",
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- &error_abort);
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+ object_property_set_link(OBJECT(&chip10->lpc), "psi",
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+ OBJECT(&chip10->psi), &error_abort);
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if (!qdev_realize(DEVICE(&chip10->lpc), NULL, &local_err)) {
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error_propagate(errp, local_err);
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return;
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@@ -1707,16 +1708,15 @@ static void pnv_chip_core_realize(PnvChip *chip, Error **errp)
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snprintf(core_name, sizeof(core_name), "core[%d]", core_hwid);
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object_property_add_child(OBJECT(chip), core_name, OBJECT(pnv_core));
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chip->cores[i] = pnv_core;
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- object_property_set_int(OBJECT(pnv_core), chip->nr_threads,
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- "nr-threads", &error_fatal);
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- object_property_set_int(OBJECT(pnv_core), core_hwid,
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- CPU_CORE_PROP_CORE_ID, &error_fatal);
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- object_property_set_int(OBJECT(pnv_core),
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- pcc->core_pir(chip, core_hwid),
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- "pir", &error_fatal);
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- object_property_set_int(OBJECT(pnv_core), pnv->fw_load_addr,
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- "hrmor", &error_fatal);
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- object_property_set_link(OBJECT(pnv_core), OBJECT(chip), "chip",
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+ object_property_set_int(OBJECT(pnv_core), "nr-threads",
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+ chip->nr_threads, &error_fatal);
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+ object_property_set_int(OBJECT(pnv_core), CPU_CORE_PROP_CORE_ID,
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+ core_hwid, &error_fatal);
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+ object_property_set_int(OBJECT(pnv_core), "pir",
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+ pcc->core_pir(chip, core_hwid), &error_fatal);
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+ object_property_set_int(OBJECT(pnv_core), "hrmor", pnv->fw_load_addr,
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+ &error_fatal);
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+ object_property_set_link(OBJECT(pnv_core), "chip", OBJECT(chip),
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&error_abort);
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qdev_realize(DEVICE(pnv_core), NULL, &error_fatal);
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