|
@@ -46,22 +46,25 @@
|
|
|
#ifndef CONFIG_USER_ONLY
|
|
|
static int cpu_common_post_load(void *opaque, int version_id)
|
|
|
{
|
|
|
- CPUState *cpu = opaque;
|
|
|
-
|
|
|
- /*
|
|
|
- * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
|
|
|
- * version_id is increased.
|
|
|
- */
|
|
|
- cpu->interrupt_request &= ~0x01;
|
|
|
- tlb_flush(cpu);
|
|
|
-
|
|
|
- /*
|
|
|
- * loadvm has just updated the content of RAM, bypassing the
|
|
|
- * usual mechanisms that ensure we flush TBs for writes to
|
|
|
- * memory we've translated code from. So we must flush all TBs,
|
|
|
- * which will now be stale.
|
|
|
- */
|
|
|
- tb_flush(cpu);
|
|
|
+ if (tcg_enabled()) {
|
|
|
+ CPUState *cpu = opaque;
|
|
|
+
|
|
|
+ /*
|
|
|
+ * 0x01 was CPU_INTERRUPT_EXIT. This line can be removed when the
|
|
|
+ * version_id is increased.
|
|
|
+ */
|
|
|
+ cpu->interrupt_request &= ~0x01;
|
|
|
+
|
|
|
+ tlb_flush(cpu);
|
|
|
+
|
|
|
+ /*
|
|
|
+ * loadvm has just updated the content of RAM, bypassing the
|
|
|
+ * usual mechanisms that ensure we flush TBs for writes to
|
|
|
+ * memory we've translated code from. So we must flush all TBs,
|
|
|
+ * which will now be stale.
|
|
|
+ */
|
|
|
+ tb_flush(cpu);
|
|
|
+ }
|
|
|
|
|
|
return 0;
|
|
|
}
|