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@@ -297,16 +297,10 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address,
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root->msi.base |= (uint64_t)val << 32;
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break;
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- case DESIGNWARE_PCIE_MSI_INTR0_ENABLE: {
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- const bool update_msi_mapping = !root->msi.intr[0].enable ^ !!val;
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-
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+ case DESIGNWARE_PCIE_MSI_INTR0_ENABLE:
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root->msi.intr[0].enable = val;
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-
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- if (update_msi_mapping) {
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- designware_pcie_root_update_msi_mapping(root);
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- }
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+ designware_pcie_root_update_msi_mapping(root);
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break;
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- }
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case DESIGNWARE_PCIE_MSI_INTR0_MASK:
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root->msi.intr[0].mask = val;
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