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@@ -90,10 +90,13 @@ struct NeXTPC {
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uint32_t scr1;
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uint32_t scr2;
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- uint8_t scsi_csr_1;
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- uint8_t scsi_csr_2;
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uint32_t int_mask;
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uint32_t int_status;
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+ uint8_t scsi_csr_1;
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+ uint8_t scsi_csr_2;
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+
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+ qemu_irq scsi_reset;
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+ qemu_irq scsi_dma;
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NextRtc rtc;
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};
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@@ -466,7 +469,7 @@ static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value)
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DPRINTF("SCSICSR FIFO Flush\n");
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/* will have to add another irq to the esp if this is needed */
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/* esp_puflush_fifo(esp_g); */
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- /* qemu_irq_pulse(s->scsi_dma); */
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+ qemu_irq_pulse(s->scsi_dma);
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}
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if (value & SCSICSR_ENABLE) {
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@@ -486,9 +489,9 @@ static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value)
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if (value & SCSICSR_RESET) {
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DPRINTF("SCSICSR Reset\n");
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/* I think this should set DMADIR. CPUDMA and INTMASK to 0 */
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- /* qemu_irq_raise(s->scsi_reset); */
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- /* s->scsi_csr_1 &= ~(SCSICSR_INTMASK |0x80|0x1); */
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-
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+ qemu_irq_raise(s->scsi_reset);
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+ s->scsi_csr_1 &= ~(SCSICSR_INTMASK | 0x80 | 0x1);
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+ qemu_irq_lower(s->scsi_reset);
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}
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if (value & SCSICSR_DMADIR) {
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DPRINTF("SCSICSR DMAdir\n");
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@@ -496,10 +499,11 @@ static void scr_writeb(NeXTPC *s, hwaddr addr, uint32_t value)
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if (value & SCSICSR_CPUDMA) {
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DPRINTF("SCSICSR CPUDMA\n");
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/* qemu_irq_raise(s->scsi_dma); */
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-
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s->int_status |= 0x4000000;
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} else {
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+ /* fprintf(stderr,"SCSICSR CPUDMA disabled\n"); */
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s->int_status &= ~(0x4000000);
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+ /* qemu_irq_lower(s->scsi_dma); */
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}
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if (value & SCSICSR_INTMASK) {
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DPRINTF("SCSICSR INTMASK\n");
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@@ -828,6 +832,103 @@ static void next_irq(void *opaque, int number, int level)
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}
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}
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+static void nextdma_write(void *opaque, uint8_t *buf, int size, int type)
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+{
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+ uint32_t base_addr;
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+ int irq = 0;
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+ uint8_t align = 16;
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+ NeXTState *next_state = NEXT_MACHINE(qdev_get_machine());
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+
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+ if (type == NEXTDMA_ENRX || type == NEXTDMA_ENTX) {
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+ align = 32;
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+ }
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+ /* Most DMA is supposedly 16 byte aligned */
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+ if ((size % align) != 0) {
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+ size -= size % align;
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+ size += align;
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+ }
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+
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+ /*
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+ * prom sets the dma start using initbuf while the bootloader uses next
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+ * so we check to see if initbuf is 0
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+ */
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+ if (next_state->dma[type].next_initbuf == 0) {
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+ base_addr = next_state->dma[type].next;
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+ } else {
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+ base_addr = next_state->dma[type].next_initbuf;
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+ }
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+
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+ cpu_physical_memory_write(base_addr, buf, size);
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+
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+ next_state->dma[type].next_initbuf = 0;
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+
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+ /* saved limit is checked to calculate packet size by both, rom and netbsd */
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+ next_state->dma[type].saved_limit = (next_state->dma[type].next + size);
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+ next_state->dma[type].saved_next = (next_state->dma[type].next);
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+
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+ /*
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+ * 32 bytes under savedbase seems to be some kind of register
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+ * of which the purpose is unknown as of yet
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+ */
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+ /* stl_phys(s->rx_dma.base-32,0xFFFFFFFF); */
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+
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+ if (!(next_state->dma[type].csr & DMA_SUPDATE)) {
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+ next_state->dma[type].next = next_state->dma[type].start;
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+ next_state->dma[type].limit = next_state->dma[type].stop;
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+ }
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+
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+ /* Set dma registers and raise an irq */
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+ next_state->dma[type].csr |= DMA_COMPLETE; /* DON'T CHANGE THIS! */
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+
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+ switch (type) {
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+ case NEXTDMA_SCSI:
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+ irq = NEXT_SCSI_DMA_I;
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+ break;
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+ }
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+
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+ next_irq(opaque, irq, 1);
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+ next_irq(opaque, irq, 0);
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+}
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+
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+static void nextscsi_read(void *opaque, uint8_t *buf, int len)
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+{
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+ DPRINTF("SCSI READ: %x\n", len);
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+ abort();
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+}
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+
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+static void nextscsi_write(void *opaque, uint8_t *buf, int size)
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+{
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+ DPRINTF("SCSI WRITE: %i\n", size);
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+ nextdma_write(opaque, buf, size, NEXTDMA_SCSI);
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+}
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+
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+static void next_scsi_init(DeviceState *pcdev, M68kCPU *cpu)
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+{
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+ struct NeXTPC *next_pc = NEXT_PC(pcdev);
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+ DeviceState *dev;
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+ SysBusDevice *sysbusdev;
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+ SysBusESPState *sysbus_esp;
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+ ESPState *esp;
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+
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+ dev = qdev_new(TYPE_SYSBUS_ESP);
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+ sysbus_esp = SYSBUS_ESP(dev);
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+ esp = &sysbus_esp->esp;
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+ esp->dma_memory_read = nextscsi_read;
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+ esp->dma_memory_write = nextscsi_write;
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+ esp->dma_opaque = pcdev;
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+ sysbus_esp->it_shift = 0;
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+ esp->dma_enabled = 1;
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+ sysbusdev = SYS_BUS_DEVICE(dev);
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+ sysbus_realize_and_unref(sysbusdev, &error_fatal);
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+ sysbus_connect_irq(sysbusdev, 0, qdev_get_gpio_in(pcdev, NEXT_SCSI_I));
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+ sysbus_mmio_map(sysbusdev, 0, 0x2114000);
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+
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+ next_pc->scsi_reset = qdev_get_gpio_in(dev, 0);
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+ next_pc->scsi_dma = qdev_get_gpio_in(dev, 1);
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+
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+ scsi_bus_legacy_handle_cmdline(&esp->bus);
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+}
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+
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static void next_escc_init(DeviceState *pcdev)
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{
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DeviceState *dev;
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@@ -945,12 +1046,12 @@ static void next_cube_init(MachineState *machine)
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M68kCPU *cpu;
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CPUM68KState *env;
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MemoryRegion *rom = g_new(MemoryRegion, 1);
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+ MemoryRegion *rom2 = g_new(MemoryRegion, 1);
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MemoryRegion *dmamem = g_new(MemoryRegion, 1);
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MemoryRegion *bmapm1 = g_new(MemoryRegion, 1);
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MemoryRegion *bmapm2 = g_new(MemoryRegion, 1);
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MemoryRegion *sysmem = get_system_memory();
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const char *bios_name = machine->firmware ?: ROM_FILE;
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- DeviceState *dev;
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DeviceState *pcdev;
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/* Initialize the cpu core */
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@@ -974,9 +1075,7 @@ static void next_cube_init(MachineState *machine)
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memory_region_add_subregion(sysmem, 0x04000000, machine->ram);
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/* Framebuffer */
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- dev = qdev_new(TYPE_NEXTFB);
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- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0B000000);
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+ sysbus_create_simple(TYPE_NEXTFB, 0x0B000000, NULL);
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/* MMIO */
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sysbus_mmio_map(SYS_BUS_DEVICE(pcdev), 0, 0x02000000);
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@@ -993,14 +1092,13 @@ static void next_cube_init(MachineState *machine)
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memory_region_add_subregion(sysmem, 0x820c0000, bmapm2);
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/* KBD */
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- dev = qdev_new(TYPE_NEXTKBD);
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- sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
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- sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, 0x0200e000);
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+ sysbus_create_simple(TYPE_NEXTKBD, 0x0200e000, NULL);
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/* Load ROM here */
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- /* still not sure if the rom should also be mapped at 0x0*/
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memory_region_init_rom(rom, NULL, "next.rom", 0x20000, &error_fatal);
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memory_region_add_subregion(sysmem, 0x01000000, rom);
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+ memory_region_init_alias(rom2, NULL, "next.rom2", rom, 0x0, 0x20000);
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+ memory_region_add_subregion(sysmem, 0x0, rom2);
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if (load_image_targphys(bios_name, 0x01000000, 0x20000) < 8) {
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if (!qtest_enabled()) {
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error_report("Failed to load firmware '%s'.", bios_name);
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@@ -1024,6 +1122,7 @@ static void next_cube_init(MachineState *machine)
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/* TODO: */
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/* Network */
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/* SCSI */
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+ next_scsi_init(pcdev, cpu);
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/* DMA */
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memory_region_init_io(dmamem, NULL, &dma_ops, machine, "next.dma", 0x5000);
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@@ -1036,6 +1135,7 @@ static void next_machine_class_init(ObjectClass *oc, void *data)
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mc->desc = "NeXT Cube";
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mc->init = next_cube_init;
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+ mc->block_default_type = IF_SCSI;
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mc->default_ram_size = RAM_SIZE;
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mc->default_ram_id = "next.ram";
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mc->default_cpu_type = M68K_CPU_TYPE_NAME("m68040");
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Stefan Hajnoczi