|
@@ -598,15 +598,23 @@ void via_isa_set_irq(PCIDevice *d, int n, int level)
|
|
qemu_set_irq(s->isa_irqs_in[n], level);
|
|
qemu_set_irq(s->isa_irqs_in[n], level);
|
|
}
|
|
}
|
|
|
|
|
|
|
|
+static void via_isa_request_i8259_irq(void *opaque, int irq, int level)
|
|
|
|
+{
|
|
|
|
+ ViaISAState *s = opaque;
|
|
|
|
+ qemu_set_irq(s->cpu_intr, level);
|
|
|
|
+}
|
|
|
|
+
|
|
static void via_isa_realize(PCIDevice *d, Error **errp)
|
|
static void via_isa_realize(PCIDevice *d, Error **errp)
|
|
{
|
|
{
|
|
ViaISAState *s = VIA_ISA(d);
|
|
ViaISAState *s = VIA_ISA(d);
|
|
DeviceState *dev = DEVICE(d);
|
|
DeviceState *dev = DEVICE(d);
|
|
PCIBus *pci_bus = pci_get_bus(d);
|
|
PCIBus *pci_bus = pci_get_bus(d);
|
|
|
|
+ qemu_irq *isa_irq;
|
|
ISABus *isa_bus;
|
|
ISABus *isa_bus;
|
|
int i;
|
|
int i;
|
|
|
|
|
|
qdev_init_gpio_out(dev, &s->cpu_intr, 1);
|
|
qdev_init_gpio_out(dev, &s->cpu_intr, 1);
|
|
|
|
+ isa_irq = qemu_allocate_irqs(via_isa_request_i8259_irq, s, 1);
|
|
isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
|
|
isa_bus = isa_bus_new(dev, pci_address_space(d), pci_address_space_io(d),
|
|
errp);
|
|
errp);
|
|
|
|
|
|
@@ -614,7 +622,7 @@ static void via_isa_realize(PCIDevice *d, Error **errp)
|
|
return;
|
|
return;
|
|
}
|
|
}
|
|
|
|
|
|
- s->isa_irqs_in = i8259_init(isa_bus, s->cpu_intr);
|
|
|
|
|
|
+ s->isa_irqs_in = i8259_init(isa_bus, *isa_irq);
|
|
isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
|
|
isa_bus_register_input_irqs(isa_bus, s->isa_irqs_in);
|
|
i8254_pit_init(isa_bus, 0x40, 0, NULL);
|
|
i8254_pit_init(isa_bus, 0x40, 0, NULL);
|
|
i8257_dma_init(isa_bus, 0);
|
|
i8257_dma_init(isa_bus, 0);
|