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@@ -185,7 +185,7 @@ static void pl011_fifo_rx_put(void *opaque, uint32_t value)
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s->read_fifo[slot] = value;
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s->read_count++;
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s->flags &= ~PL011_FLAG_RXFE;
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- trace_pl011_fifo_rx_put(value, s->read_count);
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+ trace_pl011_fifo_rx_put(value, s->read_count, pipe_depth);
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if (s->read_count == pipe_depth) {
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trace_pl011_fifo_rx_full();
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s->flags |= PL011_FLAG_RXFF;
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@@ -248,12 +248,13 @@ static void pl011_write_txdata(PL011State *s, uint8_t data)
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static uint32_t pl011_read_rxdata(PL011State *s)
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{
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uint32_t c;
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+ unsigned fifo_depth = pl011_get_fifo_depth(s);
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s->flags &= ~PL011_FLAG_RXFF;
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c = s->read_fifo[s->read_pos];
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if (s->read_count > 0) {
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s->read_count--;
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- s->read_pos = (s->read_pos + 1) & (pl011_get_fifo_depth(s) - 1);
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+ s->read_pos = (s->read_pos + 1) & (fifo_depth - 1);
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}
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if (s->read_count == 0) {
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s->flags |= PL011_FLAG_RXFE;
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@@ -261,7 +262,7 @@ static uint32_t pl011_read_rxdata(PL011State *s)
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if (s->read_count == s->read_trigger - 1) {
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s->int_level &= ~INT_RX;
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}
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- trace_pl011_read_fifo(s->read_count);
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+ trace_pl011_read_fifo(s->read_count, fifo_depth);
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s->rsr = c >> 8;
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pl011_update(s);
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qemu_chr_fe_accept_input(&s->chr);
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@@ -498,12 +499,13 @@ static int pl011_can_receive(void *opaque)
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qemu_log_mask(LOG_GUEST_ERROR,
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"PL011 receiving data on disabled RX UART\n");
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}
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- trace_pl011_can_receive(s->lcr, s->read_count, r);
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+ trace_pl011_can_receive(s->lcr, s->read_count, fifo_depth, fifo_available);
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return r;
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}
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static void pl011_receive(void *opaque, const uint8_t *buf, int size)
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{
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+ trace_pl011_receive(size);
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/*
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* In loopback mode, the RX input signal is internally disconnected
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* from the entire receiving logics; thus, all inputs are ignored,
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