|
@@ -455,9 +455,9 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
|
|
MMUAccessType access_type, int mmu_idx,
|
|
MMUAccessType access_type, int mmu_idx,
|
|
bool probe, uintptr_t retaddr)
|
|
bool probe, uintptr_t retaddr)
|
|
{
|
|
{
|
|
-#ifndef CONFIG_USER_ONLY
|
|
|
|
RISCVCPU *cpu = RISCV_CPU(cs);
|
|
RISCVCPU *cpu = RISCV_CPU(cs);
|
|
CPURISCVState *env = &cpu->env;
|
|
CPURISCVState *env = &cpu->env;
|
|
|
|
+#ifndef CONFIG_USER_ONLY
|
|
hwaddr pa = 0;
|
|
hwaddr pa = 0;
|
|
int prot;
|
|
int prot;
|
|
bool pmp_violation = false;
|
|
bool pmp_violation = false;
|
|
@@ -508,7 +508,10 @@ bool riscv_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
|
|
case MMU_DATA_STORE:
|
|
case MMU_DATA_STORE:
|
|
cs->exception_index = RISCV_EXCP_STORE_PAGE_FAULT;
|
|
cs->exception_index = RISCV_EXCP_STORE_PAGE_FAULT;
|
|
break;
|
|
break;
|
|
|
|
+ default:
|
|
|
|
+ g_assert_not_reached();
|
|
}
|
|
}
|
|
|
|
+ env->badaddr = address;
|
|
cpu_loop_exit_restore(cs, retaddr);
|
|
cpu_loop_exit_restore(cs, retaddr);
|
|
#endif
|
|
#endif
|
|
}
|
|
}
|