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@@ -61,7 +61,7 @@ unsigned int mmu_translate(CPUNios2State *env,
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Nios2MMULookup *lu,
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target_ulong vaddr, int rw, int mmu_idx)
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{
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- Nios2CPU *cpu = nios2_env_get_cpu(env);
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+ Nios2CPU *cpu = env_archcpu(env);
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int pid = (env->mmu.tlbmisc_wr & CR_TLBMISC_PID_MASK) >> 4;
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int vpn = vaddr >> 12;
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@@ -103,7 +103,7 @@ unsigned int mmu_translate(CPUNios2State *env,
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static void mmu_flush_pid(CPUNios2State *env, uint32_t pid)
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{
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CPUState *cs = env_cpu(env);
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- Nios2CPU *cpu = nios2_env_get_cpu(env);
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+ Nios2CPU *cpu = env_archcpu(env);
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int idx;
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MMU_LOG(qemu_log("TLB Flush PID %d\n", pid));
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@@ -127,7 +127,7 @@ static void mmu_flush_pid(CPUNios2State *env, uint32_t pid)
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void mmu_write(CPUNios2State *env, uint32_t rn, uint32_t v)
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{
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CPUState *cs = env_cpu(env);
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- Nios2CPU *cpu = nios2_env_get_cpu(env);
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+ Nios2CPU *cpu = env_archcpu(env);
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MMU_LOG(qemu_log("mmu_write %08X = %08X\n", rn, v));
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@@ -244,7 +244,7 @@ void mmu_write(CPUNios2State *env, uint32_t rn, uint32_t v)
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void mmu_init(CPUNios2State *env)
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{
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- Nios2CPU *cpu = nios2_env_get_cpu(env);
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+ Nios2CPU *cpu = env_archcpu(env);
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Nios2MMU *mmu = &env->mmu;
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MMU_LOG(qemu_log("mmu_init\n"));
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@@ -255,7 +255,7 @@ void mmu_init(CPUNios2State *env)
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void dump_mmu(CPUNios2State *env)
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{
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- Nios2CPU *cpu = nios2_env_get_cpu(env);
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+ Nios2CPU *cpu = env_archcpu(env);
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int i;
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qemu_printf("MMU: ways %d, entries %d, pid bits %d\n",
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