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@@ -963,16 +963,16 @@ static void gt_ctl_write(CPUARMState *env, const ARMCPRegInfo *ri,
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int timeridx = ri->crm & 1;
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int timeridx = ri->crm & 1;
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uint32_t oldval = env->cp15.c14_timer[timeridx].ctl;
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uint32_t oldval = env->cp15.c14_timer[timeridx].ctl;
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- env->cp15.c14_timer[timeridx].ctl = value & 3;
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+ env->cp15.c14_timer[timeridx].ctl = deposit64(oldval, 0, 2, value);
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if ((oldval ^ value) & 1) {
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if ((oldval ^ value) & 1) {
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/* Enable toggled */
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/* Enable toggled */
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gt_recalc_timer(cpu, timeridx);
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gt_recalc_timer(cpu, timeridx);
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- } else if ((oldval & value) & 2) {
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+ } else if ((oldval ^ value) & 2) {
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/* IMASK toggled: don't need to recalculate,
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/* IMASK toggled: don't need to recalculate,
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* just set the interrupt line based on ISTATUS
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* just set the interrupt line based on ISTATUS
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*/
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*/
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qemu_set_irq(cpu->gt_timer_outputs[timeridx],
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qemu_set_irq(cpu->gt_timer_outputs[timeridx],
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- (oldval & 4) && (value & 2));
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+ (oldval & 4) && !(value & 2));
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}
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}
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}
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}
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