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@@ -19,7 +19,6 @@
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*/
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*/
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#include "qemu/osdep.h"
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#include "qemu/osdep.h"
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-#include "qemu/main-loop.h"
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#include "qemu/module.h"
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#include "qemu/module.h"
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#include "qapi/error.h"
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#include "qapi/error.h"
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@@ -53,7 +52,6 @@ typedef struct AlteraTimer {
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MemoryRegion mmio;
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MemoryRegion mmio;
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qemu_irq irq;
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qemu_irq irq;
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uint32_t freq_hz;
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uint32_t freq_hz;
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- QEMUBH *bh;
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ptimer_state *ptimer;
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ptimer_state *ptimer;
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uint32_t regs[R_MAX];
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uint32_t regs[R_MAX];
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} AlteraTimer;
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} AlteraTimer;
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@@ -105,6 +103,7 @@ static void timer_write(void *opaque, hwaddr addr,
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break;
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break;
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case R_CONTROL:
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case R_CONTROL:
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+ ptimer_transaction_begin(t->ptimer);
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t->regs[R_CONTROL] = value & (CONTROL_ITO | CONTROL_CONT);
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t->regs[R_CONTROL] = value & (CONTROL_ITO | CONTROL_CONT);
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if ((value & CONTROL_START) &&
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if ((value & CONTROL_START) &&
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!(t->regs[R_STATUS] & STATUS_RUN)) {
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!(t->regs[R_STATUS] & STATUS_RUN)) {
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@@ -115,10 +114,12 @@ static void timer_write(void *opaque, hwaddr addr,
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ptimer_stop(t->ptimer);
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ptimer_stop(t->ptimer);
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t->regs[R_STATUS] &= ~STATUS_RUN;
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t->regs[R_STATUS] &= ~STATUS_RUN;
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}
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}
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+ ptimer_transaction_commit(t->ptimer);
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break;
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break;
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case R_PERIODL:
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case R_PERIODL:
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case R_PERIODH:
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case R_PERIODH:
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+ ptimer_transaction_begin(t->ptimer);
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t->regs[addr] = value & 0xFFFF;
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t->regs[addr] = value & 0xFFFF;
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if (t->regs[R_STATUS] & STATUS_RUN) {
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if (t->regs[R_STATUS] & STATUS_RUN) {
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ptimer_stop(t->ptimer);
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ptimer_stop(t->ptimer);
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@@ -126,6 +127,7 @@ static void timer_write(void *opaque, hwaddr addr,
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}
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}
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tvalue = (t->regs[R_PERIODH] << 16) | t->regs[R_PERIODL];
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tvalue = (t->regs[R_PERIODH] << 16) | t->regs[R_PERIODL];
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ptimer_set_limit(t->ptimer, tvalue + 1, 1);
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ptimer_set_limit(t->ptimer, tvalue + 1, 1);
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+ ptimer_transaction_commit(t->ptimer);
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break;
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break;
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case R_SNAPL:
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case R_SNAPL:
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@@ -183,9 +185,10 @@ static void altera_timer_realize(DeviceState *dev, Error **errp)
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return;
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return;
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}
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}
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- t->bh = qemu_bh_new(timer_hit, t);
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- t->ptimer = ptimer_init_with_bh(t->bh, PTIMER_POLICY_DEFAULT);
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+ t->ptimer = ptimer_init(timer_hit, t, PTIMER_POLICY_DEFAULT);
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+ ptimer_transaction_begin(t->ptimer);
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ptimer_set_freq(t->ptimer, t->freq_hz);
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ptimer_set_freq(t->ptimer, t->freq_hz);
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+ ptimer_transaction_commit(t->ptimer);
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memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
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memory_region_init_io(&t->mmio, OBJECT(t), &timer_ops, t,
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TYPE_ALTERA_TIMER, R_MAX * sizeof(uint32_t));
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TYPE_ALTERA_TIMER, R_MAX * sizeof(uint32_t));
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@@ -204,8 +207,10 @@ static void altera_timer_reset(DeviceState *dev)
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{
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{
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AlteraTimer *t = ALTERA_TIMER(dev);
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AlteraTimer *t = ALTERA_TIMER(dev);
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+ ptimer_transaction_begin(t->ptimer);
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ptimer_stop(t->ptimer);
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ptimer_stop(t->ptimer);
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ptimer_set_limit(t->ptimer, 0xffffffff, 1);
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ptimer_set_limit(t->ptimer, 0xffffffff, 1);
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+ ptimer_transaction_commit(t->ptimer);
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memset(t->regs, 0, sizeof(t->regs));
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memset(t->regs, 0, sizeof(t->regs));
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}
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}
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